diff options
Diffstat (limited to 'arch/mips/cavium-octeon/smp.c')
| -rw-r--r-- | arch/mips/cavium-octeon/smp.c | 39 |
1 files changed, 13 insertions, 26 deletions
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c index 391cefe556b3..ba78b21cc8d0 100644 --- a/arch/mips/cavium-octeon/smp.c +++ b/arch/mips/cavium-octeon/smp.c | |||
| @@ -171,41 +171,19 @@ static void octeon_boot_secondary(int cpu, struct task_struct *idle) | |||
| 171 | * After we've done initial boot, this function is called to allow the | 171 | * After we've done initial boot, this function is called to allow the |
| 172 | * board code to clean up state, if needed | 172 | * board code to clean up state, if needed |
| 173 | */ | 173 | */ |
| 174 | static void octeon_init_secondary(void) | 174 | static void __cpuinit octeon_init_secondary(void) |
| 175 | { | 175 | { |
| 176 | const int coreid = cvmx_get_core_num(); | ||
| 177 | union cvmx_ciu_intx_sum0 interrupt_enable; | ||
| 178 | unsigned int sr; | 176 | unsigned int sr; |
| 179 | 177 | ||
| 180 | #ifdef CONFIG_HOTPLUG_CPU | ||
| 181 | struct linux_app_boot_info *labi; | ||
| 182 | |||
| 183 | labi = (struct linux_app_boot_info *)PHYS_TO_XKSEG_CACHED(LABI_ADDR_IN_BOOTLOADER); | ||
| 184 | |||
| 185 | if (labi->labi_signature != LABI_SIGNATURE) | ||
| 186 | panic("The bootloader version on this board is incorrect."); | ||
| 187 | #endif | ||
| 188 | |||
| 189 | sr = set_c0_status(ST0_BEV); | 178 | sr = set_c0_status(ST0_BEV); |
| 190 | write_c0_ebase((u32)ebase); | 179 | write_c0_ebase((u32)ebase); |
| 191 | write_c0_status(sr); | 180 | write_c0_status(sr); |
| 192 | 181 | ||
| 193 | octeon_check_cpu_bist(); | 182 | octeon_check_cpu_bist(); |
| 194 | octeon_init_cvmcount(); | 183 | octeon_init_cvmcount(); |
| 195 | /* | 184 | |
| 196 | pr_info("SMP: CPU%d (CoreId %lu) started\n", cpu, coreid); | 185 | octeon_irq_setup_secondary(); |
| 197 | */ | 186 | raw_local_irq_enable(); |
| 198 | /* Enable Mailbox interrupts to this core. These are the only | ||
| 199 | interrupts allowed on line 3 */ | ||
| 200 | cvmx_write_csr(CVMX_CIU_MBOX_CLRX(coreid), 0xffffffff); | ||
| 201 | interrupt_enable.u64 = 0; | ||
| 202 | interrupt_enable.s.mbox = 0x3; | ||
| 203 | cvmx_write_csr(CVMX_CIU_INTX_EN0((coreid * 2)), interrupt_enable.u64); | ||
| 204 | cvmx_write_csr(CVMX_CIU_INTX_EN0((coreid * 2 + 1)), 0); | ||
| 205 | cvmx_write_csr(CVMX_CIU_INTX_EN1((coreid * 2)), 0); | ||
| 206 | cvmx_write_csr(CVMX_CIU_INTX_EN1((coreid * 2 + 1)), 0); | ||
| 207 | /* Enable core interrupt processing for 2,3 and 7 */ | ||
| 208 | set_c0_status(0x8c01); | ||
| 209 | } | 187 | } |
| 210 | 188 | ||
| 211 | /** | 189 | /** |
| @@ -214,6 +192,15 @@ static void octeon_init_secondary(void) | |||
| 214 | */ | 192 | */ |
| 215 | void octeon_prepare_cpus(unsigned int max_cpus) | 193 | void octeon_prepare_cpus(unsigned int max_cpus) |
| 216 | { | 194 | { |
| 195 | #ifdef CONFIG_HOTPLUG_CPU | ||
| 196 | struct linux_app_boot_info *labi; | ||
| 197 | |||
| 198 | labi = (struct linux_app_boot_info *)PHYS_TO_XKSEG_CACHED(LABI_ADDR_IN_BOOTLOADER); | ||
| 199 | |||
| 200 | if (labi->labi_signature != LABI_SIGNATURE) | ||
| 201 | panic("The bootloader version on this board is incorrect."); | ||
| 202 | #endif | ||
| 203 | |||
| 217 | cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffffffff); | 204 | cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffffffff); |
| 218 | if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_DISABLED, | 205 | if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_DISABLED, |
| 219 | "mailbox0", mailbox_interrupt)) { | 206 | "mailbox0", mailbox_interrupt)) { |
