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-rw-r--r--arch/mips/cavium-octeon/setup.c48
1 files changed, 40 insertions, 8 deletions
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index d1b5ffaf0281..69197cb6c7ea 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -32,6 +32,7 @@
32#include <asm/time.h> 32#include <asm/time.h>
33 33
34#include <asm/octeon/octeon.h> 34#include <asm/octeon/octeon.h>
35#include <asm/octeon/pci-octeon.h>
35 36
36#ifdef CONFIG_CAVIUM_DECODE_RSL 37#ifdef CONFIG_CAVIUM_DECODE_RSL
37extern void cvmx_interrupt_rsl_decode(void); 38extern void cvmx_interrupt_rsl_decode(void);
@@ -578,9 +579,6 @@ void __init prom_init(void)
578 } 579 }
579 580
580 if (strstr(arcs_cmdline, "console=") == NULL) { 581 if (strstr(arcs_cmdline, "console=") == NULL) {
581#ifdef CONFIG_GDB_CONSOLE
582 strcat(arcs_cmdline, " console=gdb");
583#else
584#ifdef CONFIG_CAVIUM_OCTEON_2ND_KERNEL 582#ifdef CONFIG_CAVIUM_OCTEON_2ND_KERNEL
585 strcat(arcs_cmdline, " console=ttyS0,115200"); 583 strcat(arcs_cmdline, " console=ttyS0,115200");
586#else 584#else
@@ -589,7 +587,6 @@ void __init prom_init(void)
589 else 587 else
590 strcat(arcs_cmdline, " console=ttyS0,115200"); 588 strcat(arcs_cmdline, " console=ttyS0,115200");
591#endif 589#endif
592#endif
593 } 590 }
594 591
595 if (octeon_is_simulation()) { 592 if (octeon_is_simulation()) {
@@ -598,13 +595,13 @@ void __init prom_init(void)
598 * the filesystem. Also specify the calibration delay 595 * the filesystem. Also specify the calibration delay
599 * to avoid calculating it every time. 596 * to avoid calculating it every time.
600 */ 597 */
601 strcat(arcs_cmdline, " rw root=1f00" 598 strcat(arcs_cmdline, " rw root=1f00 slram=root,0x40000000,+1073741824");
602 " lpj=60176 slram=root,0x40000000,+1073741824");
603 } 599 }
604 600
605 mips_hpt_frequency = octeon_get_clock_rate(); 601 mips_hpt_frequency = octeon_get_clock_rate();
606 602
607 octeon_init_cvmcount(); 603 octeon_init_cvmcount();
604 octeon_setup_delays();
608 605
609 _machine_restart = octeon_restart; 606 _machine_restart = octeon_restart;
610 _machine_halt = octeon_halt; 607 _machine_halt = octeon_halt;
@@ -613,6 +610,22 @@ void __init prom_init(void)
613 register_smp_ops(&octeon_smp_ops); 610 register_smp_ops(&octeon_smp_ops);
614} 611}
615 612
613/* Exclude a single page from the regions obtained in plat_mem_setup. */
614static __init void memory_exclude_page(u64 addr, u64 *mem, u64 *size)
615{
616 if (addr > *mem && addr < *mem + *size) {
617 u64 inc = addr - *mem;
618 add_memory_region(*mem, inc, BOOT_MEM_RAM);
619 *mem += inc;
620 *size -= inc;
621 }
622
623 if (addr == *mem && *size > PAGE_SIZE) {
624 *mem += PAGE_SIZE;
625 *size -= PAGE_SIZE;
626 }
627}
628
616void __init plat_mem_setup(void) 629void __init plat_mem_setup(void)
617{ 630{
618 uint64_t mem_alloc_size; 631 uint64_t mem_alloc_size;
@@ -663,12 +676,27 @@ void __init plat_mem_setup(void)
663 CVMX_BOOTMEM_FLAG_NO_LOCKING); 676 CVMX_BOOTMEM_FLAG_NO_LOCKING);
664#endif 677#endif
665 if (memory >= 0) { 678 if (memory >= 0) {
679 u64 size = mem_alloc_size;
680
681 /*
682 * exclude a page at the beginning and end of
683 * the 256MB PCIe 'hole' so the kernel will not
684 * try to allocate multi-page buffers that
685 * span the discontinuity.
686 */
687 memory_exclude_page(CVMX_PCIE_BAR1_PHYS_BASE,
688 &memory, &size);
689 memory_exclude_page(CVMX_PCIE_BAR1_PHYS_BASE +
690 CVMX_PCIE_BAR1_PHYS_SIZE,
691 &memory, &size);
692
666 /* 693 /*
667 * This function automatically merges address 694 * This function automatically merges address
668 * regions next to each other if they are 695 * regions next to each other if they are
669 * received in incrementing order. 696 * received in incrementing order.
670 */ 697 */
671 add_memory_region(memory, mem_alloc_size, BOOT_MEM_RAM); 698 if (size)
699 add_memory_region(memory, size, BOOT_MEM_RAM);
672 total += mem_alloc_size; 700 total += mem_alloc_size;
673 } else { 701 } else {
674 break; 702 break;
@@ -691,7 +719,10 @@ void __init plat_mem_setup(void)
691 "cvmx_bootmem_phy_alloc\n"); 719 "cvmx_bootmem_phy_alloc\n");
692} 720}
693 721
694 722/*
723 * Emit one character to the boot UART. Exported for use by the
724 * watchdog timer.
725 */
695int prom_putchar(char c) 726int prom_putchar(char c)
696{ 727{
697 uint64_t lsrval; 728 uint64_t lsrval;
@@ -705,6 +736,7 @@ int prom_putchar(char c)
705 cvmx_write_csr(CVMX_MIO_UARTX_THR(octeon_uart), c & 0xffull); 736 cvmx_write_csr(CVMX_MIO_UARTX_THR(octeon_uart), c & 0xffull);
706 return 1; 737 return 1;
707} 738}
739EXPORT_SYMBOL(prom_putchar);
708 740
709void prom_free_prom_memory(void) 741void prom_free_prom_memory(void)
710{ 742{