diff options
Diffstat (limited to 'arch/mips/cavium-octeon/setup.c')
-rw-r--r-- | arch/mips/cavium-octeon/setup.c | 103 |
1 files changed, 0 insertions, 103 deletions
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c index da559249cc2f..b321d3b16877 100644 --- a/arch/mips/cavium-octeon/setup.c +++ b/arch/mips/cavium-octeon/setup.c | |||
@@ -11,7 +11,6 @@ | |||
11 | #include <linux/delay.h> | 11 | #include <linux/delay.h> |
12 | #include <linux/interrupt.h> | 12 | #include <linux/interrupt.h> |
13 | #include <linux/io.h> | 13 | #include <linux/io.h> |
14 | #include <linux/irq.h> | ||
15 | #include <linux/serial.h> | 14 | #include <linux/serial.h> |
16 | #include <linux/smp.h> | 15 | #include <linux/smp.h> |
17 | #include <linux/types.h> | 16 | #include <linux/types.h> |
@@ -824,105 +823,3 @@ void prom_free_prom_memory(void) | |||
824 | CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB option is set */ | 823 | CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB option is set */ |
825 | octeon_hal_setup_reserved32(); | 824 | octeon_hal_setup_reserved32(); |
826 | } | 825 | } |
827 | |||
828 | static struct octeon_cf_data octeon_cf_data; | ||
829 | |||
830 | static int __init octeon_cf_device_init(void) | ||
831 | { | ||
832 | union cvmx_mio_boot_reg_cfgx mio_boot_reg_cfg; | ||
833 | unsigned long base_ptr, region_base, region_size; | ||
834 | struct platform_device *pd; | ||
835 | struct resource cf_resources[3]; | ||
836 | unsigned int num_resources; | ||
837 | int i; | ||
838 | int ret = 0; | ||
839 | |||
840 | /* Setup octeon-cf platform device if present. */ | ||
841 | base_ptr = 0; | ||
842 | if (octeon_bootinfo->major_version == 1 | ||
843 | && octeon_bootinfo->minor_version >= 1) { | ||
844 | if (octeon_bootinfo->compact_flash_common_base_addr) | ||
845 | base_ptr = | ||
846 | octeon_bootinfo->compact_flash_common_base_addr; | ||
847 | } else { | ||
848 | base_ptr = 0x1d000800; | ||
849 | } | ||
850 | |||
851 | if (!base_ptr) | ||
852 | return ret; | ||
853 | |||
854 | /* Find CS0 region. */ | ||
855 | for (i = 0; i < 8; i++) { | ||
856 | mio_boot_reg_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(i)); | ||
857 | region_base = mio_boot_reg_cfg.s.base << 16; | ||
858 | region_size = (mio_boot_reg_cfg.s.size + 1) << 16; | ||
859 | if (mio_boot_reg_cfg.s.en && base_ptr >= region_base | ||
860 | && base_ptr < region_base + region_size) | ||
861 | break; | ||
862 | } | ||
863 | if (i >= 7) { | ||
864 | /* i and i + 1 are CS0 and CS1, both must be less than 8. */ | ||
865 | goto out; | ||
866 | } | ||
867 | octeon_cf_data.base_region = i; | ||
868 | octeon_cf_data.is16bit = mio_boot_reg_cfg.s.width; | ||
869 | octeon_cf_data.base_region_bias = base_ptr - region_base; | ||
870 | memset(cf_resources, 0, sizeof(cf_resources)); | ||
871 | num_resources = 0; | ||
872 | cf_resources[num_resources].flags = IORESOURCE_MEM; | ||
873 | cf_resources[num_resources].start = region_base; | ||
874 | cf_resources[num_resources].end = region_base + region_size - 1; | ||
875 | num_resources++; | ||
876 | |||
877 | |||
878 | if (!(base_ptr & 0xfffful)) { | ||
879 | /* | ||
880 | * Boot loader signals availability of DMA (true_ide | ||
881 | * mode) by setting low order bits of base_ptr to | ||
882 | * zero. | ||
883 | */ | ||
884 | |||
885 | /* Asume that CS1 immediately follows. */ | ||
886 | mio_boot_reg_cfg.u64 = | ||
887 | cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(i + 1)); | ||
888 | region_base = mio_boot_reg_cfg.s.base << 16; | ||
889 | region_size = (mio_boot_reg_cfg.s.size + 1) << 16; | ||
890 | if (!mio_boot_reg_cfg.s.en) | ||
891 | goto out; | ||
892 | |||
893 | cf_resources[num_resources].flags = IORESOURCE_MEM; | ||
894 | cf_resources[num_resources].start = region_base; | ||
895 | cf_resources[num_resources].end = region_base + region_size - 1; | ||
896 | num_resources++; | ||
897 | |||
898 | octeon_cf_data.dma_engine = 0; | ||
899 | cf_resources[num_resources].flags = IORESOURCE_IRQ; | ||
900 | cf_resources[num_resources].start = OCTEON_IRQ_BOOTDMA; | ||
901 | cf_resources[num_resources].end = OCTEON_IRQ_BOOTDMA; | ||
902 | num_resources++; | ||
903 | } else { | ||
904 | octeon_cf_data.dma_engine = -1; | ||
905 | } | ||
906 | |||
907 | pd = platform_device_alloc("pata_octeon_cf", -1); | ||
908 | if (!pd) { | ||
909 | ret = -ENOMEM; | ||
910 | goto out; | ||
911 | } | ||
912 | pd->dev.platform_data = &octeon_cf_data; | ||
913 | |||
914 | ret = platform_device_add_resources(pd, cf_resources, num_resources); | ||
915 | if (ret) | ||
916 | goto fail; | ||
917 | |||
918 | ret = platform_device_add(pd); | ||
919 | if (ret) | ||
920 | goto fail; | ||
921 | |||
922 | return ret; | ||
923 | fail: | ||
924 | platform_device_put(pd); | ||
925 | out: | ||
926 | return ret; | ||
927 | } | ||
928 | device_initcall(octeon_cf_device_init); | ||