diff options
Diffstat (limited to 'arch/mips/cavium-octeon/dma-octeon.c')
-rw-r--r-- | arch/mips/cavium-octeon/dma-octeon.c | 23 |
1 files changed, 21 insertions, 2 deletions
diff --git a/arch/mips/cavium-octeon/dma-octeon.c b/arch/mips/cavium-octeon/dma-octeon.c index ea4febaa4bb1..b6bb92c16a47 100644 --- a/arch/mips/cavium-octeon/dma-octeon.c +++ b/arch/mips/cavium-octeon/dma-octeon.c | |||
@@ -61,6 +61,16 @@ static phys_addr_t octeon_gen1_dma_to_phys(struct device *dev, dma_addr_t daddr) | |||
61 | return daddr; | 61 | return daddr; |
62 | } | 62 | } |
63 | 63 | ||
64 | static dma_addr_t octeon_gen2_phys_to_dma(struct device *dev, phys_addr_t paddr) | ||
65 | { | ||
66 | return octeon_hole_phys_to_dma(paddr); | ||
67 | } | ||
68 | |||
69 | static phys_addr_t octeon_gen2_dma_to_phys(struct device *dev, dma_addr_t daddr) | ||
70 | { | ||
71 | return octeon_hole_dma_to_phys(daddr); | ||
72 | } | ||
73 | |||
64 | static dma_addr_t octeon_big_phys_to_dma(struct device *dev, phys_addr_t paddr) | 74 | static dma_addr_t octeon_big_phys_to_dma(struct device *dev, phys_addr_t paddr) |
65 | { | 75 | { |
66 | if (paddr >= 0x410000000ull && paddr < 0x420000000ull) | 76 | if (paddr >= 0x410000000ull && paddr < 0x420000000ull) |
@@ -262,11 +272,11 @@ void __init plat_swiotlb_setup(void) | |||
262 | 272 | ||
263 | for (i = 0 ; i < boot_mem_map.nr_map; i++) { | 273 | for (i = 0 ; i < boot_mem_map.nr_map; i++) { |
264 | struct boot_mem_map_entry *e = &boot_mem_map.map[i]; | 274 | struct boot_mem_map_entry *e = &boot_mem_map.map[i]; |
265 | if (e->type != BOOT_MEM_RAM) | 275 | if (e->type != BOOT_MEM_RAM && e->type != BOOT_MEM_INIT_RAM) |
266 | continue; | 276 | continue; |
267 | 277 | ||
268 | /* These addresses map low for PCI. */ | 278 | /* These addresses map low for PCI. */ |
269 | if (e->addr > 0x410000000ull) | 279 | if (e->addr > 0x410000000ull && !OCTEON_IS_MODEL(OCTEON_CN6XXX)) |
270 | continue; | 280 | continue; |
271 | 281 | ||
272 | addr_size += e->size; | 282 | addr_size += e->size; |
@@ -296,6 +306,11 @@ void __init plat_swiotlb_setup(void) | |||
296 | swiotlbsize = 64 * (1<<20); | 306 | swiotlbsize = 64 * (1<<20); |
297 | } | 307 | } |
298 | #endif | 308 | #endif |
309 | #ifdef CONFIG_USB_OCTEON_OHCI | ||
310 | /* OCTEON II ohci is only 32-bit. */ | ||
311 | if (OCTEON_IS_MODEL(OCTEON_CN6XXX) && max_addr >= 0x100000000ul) | ||
312 | swiotlbsize = 64 * (1<<20); | ||
313 | #endif | ||
299 | swiotlb_nslabs = swiotlbsize >> IO_TLB_SHIFT; | 314 | swiotlb_nslabs = swiotlbsize >> IO_TLB_SHIFT; |
300 | swiotlb_nslabs = ALIGN(swiotlb_nslabs, IO_TLB_SEGSIZE); | 315 | swiotlb_nslabs = ALIGN(swiotlb_nslabs, IO_TLB_SEGSIZE); |
301 | swiotlbsize = swiotlb_nslabs << IO_TLB_SHIFT; | 316 | swiotlbsize = swiotlb_nslabs << IO_TLB_SHIFT; |
@@ -330,6 +345,10 @@ struct dma_map_ops *octeon_pci_dma_map_ops; | |||
330 | void __init octeon_pci_dma_init(void) | 345 | void __init octeon_pci_dma_init(void) |
331 | { | 346 | { |
332 | switch (octeon_dma_bar_type) { | 347 | switch (octeon_dma_bar_type) { |
348 | case OCTEON_DMA_BAR_TYPE_PCIE2: | ||
349 | _octeon_pci_dma_map_ops.phys_to_dma = octeon_gen2_phys_to_dma; | ||
350 | _octeon_pci_dma_map_ops.dma_to_phys = octeon_gen2_dma_to_phys; | ||
351 | break; | ||
333 | case OCTEON_DMA_BAR_TYPE_PCIE: | 352 | case OCTEON_DMA_BAR_TYPE_PCIE: |
334 | _octeon_pci_dma_map_ops.phys_to_dma = octeon_gen1_phys_to_dma; | 353 | _octeon_pci_dma_map_ops.phys_to_dma = octeon_gen1_phys_to_dma; |
335 | _octeon_pci_dma_map_ops.dma_to_phys = octeon_gen1_dma_to_phys; | 354 | _octeon_pci_dma_map_ops.dma_to_phys = octeon_gen1_dma_to_phys; |