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-rw-r--r--arch/mips/cavium-octeon/csrc-octeon.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/mips/cavium-octeon/csrc-octeon.c b/arch/mips/cavium-octeon/csrc-octeon.c
index 96110f217dcd..0bf4bbe04ae2 100644
--- a/arch/mips/cavium-octeon/csrc-octeon.c
+++ b/arch/mips/cavium-octeon/csrc-octeon.c
@@ -50,6 +50,38 @@ static struct clocksource clocksource_mips = {
50 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 50 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
51}; 51};
52 52
53unsigned long long notrace sched_clock(void)
54{
55 /* 64-bit arithmatic can overflow, so use 128-bit. */
56#if (__GNUC__ < 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ <= 3))
57 u64 t1, t2, t3;
58 unsigned long long rv;
59 u64 mult = clocksource_mips.mult;
60 u64 shift = clocksource_mips.shift;
61 u64 cnt = read_c0_cvmcount();
62
63 asm (
64 "dmultu\t%[cnt],%[mult]\n\t"
65 "nor\t%[t1],$0,%[shift]\n\t"
66 "mfhi\t%[t2]\n\t"
67 "mflo\t%[t3]\n\t"
68 "dsll\t%[t2],%[t2],1\n\t"
69 "dsrlv\t%[rv],%[t3],%[shift]\n\t"
70 "dsllv\t%[t1],%[t2],%[t1]\n\t"
71 "or\t%[rv],%[t1],%[rv]\n\t"
72 : [rv] "=&r" (rv), [t1] "=&r" (t1), [t2] "=&r" (t2), [t3] "=&r" (t3)
73 : [cnt] "r" (cnt), [mult] "r" (mult), [shift] "r" (shift)
74 : "hi", "lo");
75 return rv;
76#else
77 /* GCC > 4.3 do it the easy way. */
78 unsigned int __attribute__((mode(TI))) t;
79 t = read_c0_cvmcount();
80 t = t * clocksource_mips.mult;
81 return (unsigned long long)(t >> clocksource_mips.shift);
82#endif
83}
84
53void __init plat_time_init(void) 85void __init plat_time_init(void)
54{ 86{
55 clocksource_mips.rating = 300; 87 clocksource_mips.rating = 300;