diff options
Diffstat (limited to 'arch/mips/cavium-octeon/Kconfig')
| -rw-r--r-- | arch/mips/cavium-octeon/Kconfig | 15 |
1 files changed, 4 insertions, 11 deletions
diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig index caae22858163..cad555ebeca3 100644 --- a/arch/mips/cavium-octeon/Kconfig +++ b/arch/mips/cavium-octeon/Kconfig | |||
| @@ -1,11 +1,7 @@ | |||
| 1 | config CAVIUM_OCTEON_SPECIFIC_OPTIONS | 1 | if CPU_CAVIUM_OCTEON |
| 2 | bool "Enable Octeon specific options" | ||
| 3 | depends on CPU_CAVIUM_OCTEON | ||
| 4 | default "y" | ||
| 5 | 2 | ||
| 6 | config CAVIUM_CN63XXP1 | 3 | config CAVIUM_CN63XXP1 |
| 7 | bool "Enable CN63XXP1 errata worarounds" | 4 | bool "Enable CN63XXP1 errata worarounds" |
| 8 | depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS | ||
| 9 | default "n" | 5 | default "n" |
| 10 | help | 6 | help |
| 11 | The CN63XXP1 chip requires build time workarounds to | 7 | The CN63XXP1 chip requires build time workarounds to |
| @@ -16,7 +12,6 @@ config CAVIUM_CN63XXP1 | |||
| 16 | 12 | ||
| 17 | config CAVIUM_OCTEON_2ND_KERNEL | 13 | config CAVIUM_OCTEON_2ND_KERNEL |
| 18 | bool "Build the kernel to be used as a 2nd kernel on the same chip" | 14 | bool "Build the kernel to be used as a 2nd kernel on the same chip" |
| 19 | depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS | ||
| 20 | default "n" | 15 | default "n" |
| 21 | help | 16 | help |
| 22 | This option configures this kernel to be linked at a different | 17 | This option configures this kernel to be linked at a different |
| @@ -26,7 +21,6 @@ config CAVIUM_OCTEON_2ND_KERNEL | |||
| 26 | 21 | ||
| 27 | config CAVIUM_OCTEON_HW_FIX_UNALIGNED | 22 | config CAVIUM_OCTEON_HW_FIX_UNALIGNED |
| 28 | bool "Enable hardware fixups of unaligned loads and stores" | 23 | bool "Enable hardware fixups of unaligned loads and stores" |
| 29 | depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS | ||
| 30 | default "y" | 24 | default "y" |
| 31 | help | 25 | help |
| 32 | Configure the Octeon hardware to automatically fix unaligned loads | 26 | Configure the Octeon hardware to automatically fix unaligned loads |
| @@ -38,7 +32,6 @@ config CAVIUM_OCTEON_HW_FIX_UNALIGNED | |||
| 38 | 32 | ||
| 39 | config CAVIUM_OCTEON_CVMSEG_SIZE | 33 | config CAVIUM_OCTEON_CVMSEG_SIZE |
| 40 | int "Number of L1 cache lines reserved for CVMSEG memory" | 34 | int "Number of L1 cache lines reserved for CVMSEG memory" |
| 41 | depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS | ||
| 42 | range 0 54 | 35 | range 0 54 |
| 43 | default 1 | 36 | default 1 |
| 44 | help | 37 | help |
| @@ -50,7 +43,6 @@ config CAVIUM_OCTEON_CVMSEG_SIZE | |||
| 50 | 43 | ||
| 51 | config CAVIUM_OCTEON_LOCK_L2 | 44 | config CAVIUM_OCTEON_LOCK_L2 |
| 52 | bool "Lock often used kernel code in the L2" | 45 | bool "Lock often used kernel code in the L2" |
| 53 | depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS | ||
| 54 | default "y" | 46 | default "y" |
| 55 | help | 47 | help |
| 56 | Enable locking parts of the kernel into the L2 cache. | 48 | Enable locking parts of the kernel into the L2 cache. |
| @@ -93,7 +85,6 @@ config CAVIUM_OCTEON_LOCK_L2_MEMCPY | |||
| 93 | config ARCH_SPARSEMEM_ENABLE | 85 | config ARCH_SPARSEMEM_ENABLE |
| 94 | def_bool y | 86 | def_bool y |
| 95 | select SPARSEMEM_STATIC | 87 | select SPARSEMEM_STATIC |
| 96 | depends on CPU_CAVIUM_OCTEON | ||
| 97 | 88 | ||
| 98 | config CAVIUM_OCTEON_HELPER | 89 | config CAVIUM_OCTEON_HELPER |
| 99 | def_bool y | 90 | def_bool y |
| @@ -107,6 +98,8 @@ config NEED_SG_DMA_LENGTH | |||
| 107 | 98 | ||
| 108 | config SWIOTLB | 99 | config SWIOTLB |
| 109 | def_bool y | 100 | def_bool y |
| 110 | depends on CPU_CAVIUM_OCTEON | ||
| 111 | select IOMMU_HELPER | 101 | select IOMMU_HELPER |
| 112 | select NEED_SG_DMA_LENGTH | 102 | select NEED_SG_DMA_LENGTH |
| 103 | |||
| 104 | |||
| 105 | endif # CPU_CAVIUM_OCTEON | ||
