1 files changed, 9 insertions, 5 deletions

diff --git a/arch/mips/bcm47xx/wgt634u.c b/arch/mips/bcm47xx/wgt634u.c
index 74d06965326f..e9f9ec8d443b 100644
--- a/arch/mips/bcm47xx/wgt634u.c
+++ b/arch/mips/bcm47xx/wgt634u.c
@@ -108,7 +108,7 @@ static irqreturn_t gpio_interrupt(int irq, void *ignored)
 
         /* Interrupts are shared, check if the current one is
            a GPIO interrupt. */
-        if (!ssb_chipco_irq_status(&ssb_bcm47xx.chipco,
+        if (!ssb_chipco_irq_status(&bcm47xx_bus.ssb.chipco,
                                    SSB_CHIPCO_IRQ_GPIO))
                 return IRQ_NONE;
 
@@ -132,22 +132,26 @@ static int __init wgt634u_init(void)
          * machine. Use the MAC address as an heuristic. Netgear Inc. has
          * been allocated ranges 00:09:5b:xx:xx:xx and 00:0f:b5:xx:xx:xx.
          */
+        u8 *et0mac;
 
-        u8 *et0mac = ssb_bcm47xx.sprom.et0mac;
+        if (bcm47xx_bus_type != BCM47XX_BUS_TYPE_SSB)
+                return -ENODEV;
+
+        et0mac = bcm47xx_bus.ssb.sprom.et0mac;
 
         if (et0mac[0] == 0x00 &&
             ((et0mac[1] == 0x09 && et0mac[2] == 0x5b) ||
              (et0mac[1] == 0x0f && et0mac[2] == 0xb5))) {
-                struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore;
+                struct ssb_mipscore *mcore = &bcm47xx_bus.ssb.mipscore;
 
                 printk(KERN_INFO "WGT634U machine detected.\n");
 
                 if (!request_irq(gpio_to_irq(WGT634U_GPIO_RESET),
                                  gpio_interrupt, IRQF_SHARED,
-                                 "WGT634U GPIO", &ssb_bcm47xx.chipco)) {
+                                 "WGT634U GPIO", &bcm47xx_bus.ssb.chipco)) {
                         gpio_direction_input(WGT634U_GPIO_RESET);
                         gpio_intmask(WGT634U_GPIO_RESET, 1);
-                        ssb_chipco_irq_mask(&ssb_bcm47xx.chipco,
+                        ssb_chipco_irq_mask(&bcm47xx_bus.ssb.chipco,
                                             SSB_CHIPCO_IRQ_GPIO,
                                             SSB_CHIPCO_IRQ_GPIO);
                 }