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-rw-r--r--arch/mips/bcm47xx/prom.c22
1 files changed, 14 insertions, 8 deletions
diff --git a/arch/mips/bcm47xx/prom.c b/arch/mips/bcm47xx/prom.c
index 0fa646c5a844..f6e9063cc4c2 100644
--- a/arch/mips/bcm47xx/prom.c
+++ b/arch/mips/bcm47xx/prom.c
@@ -126,6 +126,7 @@ static __init void prom_init_cmdline(void)
126static __init void prom_init_mem(void) 126static __init void prom_init_mem(void)
127{ 127{
128 unsigned long mem; 128 unsigned long mem;
129 unsigned long max;
129 130
130 /* Figure out memory size by finding aliases. 131 /* Figure out memory size by finding aliases.
131 * 132 *
@@ -134,21 +135,26 @@ static __init void prom_init_mem(void)
134 * want to reuse the memory used by CFE (around 4MB). That means cfe_* 135 * want to reuse the memory used by CFE (around 4MB). That means cfe_*
135 * functions stop to work at some point during the boot, we should only 136 * functions stop to work at some point during the boot, we should only
136 * call them at the beginning of the boot. 137 * call them at the beginning of the boot.
138 *
139 * BCM47XX uses 128MB for addressing the ram, if the system contains
140 * less that that amount of ram it remaps the ram more often into the
141 * available space.
142 * Accessing memory after 128MB will cause an exception.
143 * max contains the biggest possible address supported by the platform.
144 * If the method wants to try something above we assume 128MB ram.
137 */ 145 */
146 max = ((unsigned long)(prom_init) | ((128 << 20) - 1));
138 for (mem = (1 << 20); mem < (128 << 20); mem += (1 << 20)) { 147 for (mem = (1 << 20); mem < (128 << 20); mem += (1 << 20)) {
148 if (((unsigned long)(prom_init) + mem) > max) {
149 mem = (128 << 20);
150 printk(KERN_DEBUG "assume 128MB RAM\n");
151 break;
152 }
139 if (*(unsigned long *)((unsigned long)(prom_init) + mem) == 153 if (*(unsigned long *)((unsigned long)(prom_init) + mem) ==
140 *(unsigned long *)(prom_init)) 154 *(unsigned long *)(prom_init))
141 break; 155 break;
142 } 156 }
143 157
144 /* Ignoring the last page when ddr size is 128M. Cached
145 * accesses to last page is causing the processor to prefetch
146 * using address above 128M stepping out of the ddr address
147 * space.
148 */
149 if (mem == 0x8000000)
150 mem -= 0x1000;
151
152 add_memory_region(0, mem, BOOT_MEM_RAM); 158 add_memory_region(0, mem, BOOT_MEM_RAM);
153} 159}
154 160