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-rw-r--r--arch/mips/basler/excite/excite_setup.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c
index 68be19d1802e..404ca9284b30 100644
--- a/arch/mips/basler/excite/excite_setup.c
+++ b/arch/mips/basler/excite/excite_setup.c
@@ -216,7 +216,7 @@ static int __init excite_platform_init(void)
216 titan_writel(0x80021dff, GXCFG); /* XDMA reset */ 216 titan_writel(0x80021dff, GXCFG); /* XDMA reset */
217 titan_writel(0x00000000, CPXCISRA); 217 titan_writel(0x00000000, CPXCISRA);
218 titan_writel(0x00000000, CPXCISRB); /* clear pending interrupts */ 218 titan_writel(0x00000000, CPXCISRB); /* clear pending interrupts */
219#if defined (CONFIG_HIGHMEM) 219#if defined(CONFIG_HIGHMEM)
220# error change for HIGHMEM support! 220# error change for HIGHMEM support!
221#else 221#else
222 titan_writel(0x00000000, GXDMADRPFX); /* buffer address prefix */ 222 titan_writel(0x00000000, GXDMADRPFX); /* buffer address prefix */
@@ -262,12 +262,12 @@ void __init plat_mem_setup(void)
262 add_memory_region(0x00000000, memsize, BOOT_MEM_RAM); 262 add_memory_region(0x00000000, memsize, BOOT_MEM_RAM);
263 263
264 /* Set up the peripheral address map */ 264 /* Set up the peripheral address map */
265 *(boot_ocd_base + (LKB9 / sizeof (u32))) = 0; 265 *(boot_ocd_base + (LKB9 / sizeof(u32))) = 0;
266 *(boot_ocd_base + (LKB10 / sizeof (u32))) = 0; 266 *(boot_ocd_base + (LKB10 / sizeof(u32))) = 0;
267 *(boot_ocd_base + (LKB11 / sizeof (u32))) = 0; 267 *(boot_ocd_base + (LKB11 / sizeof(u32))) = 0;
268 *(boot_ocd_base + (LKB12 / sizeof (u32))) = 0; 268 *(boot_ocd_base + (LKB12 / sizeof(u32))) = 0;
269 wmb(); 269 wmb();
270 *(boot_ocd_base + (LKB0 / sizeof (u32))) = EXCITE_PHYS_OCD >> 4; 270 *(boot_ocd_base + (LKB0 / sizeof(u32))) = EXCITE_PHYS_OCD >> 4;
271 wmb(); 271 wmb();
272 272
273 ocd_writel((EXCITE_PHYS_TITAN >> 4) | 0x1UL, LKB5); 273 ocd_writel((EXCITE_PHYS_TITAN >> 4) | 0x1UL, LKB5);