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Diffstat (limited to 'arch/mips/basler/excite/excite_irq.c')
-rw-r--r--arch/mips/basler/excite/excite_irq.c122
1 files changed, 0 insertions, 122 deletions
diff --git a/arch/mips/basler/excite/excite_irq.c b/arch/mips/basler/excite/excite_irq.c
deleted file mode 100644
index 934e0a6b1011..000000000000
--- a/arch/mips/basler/excite/excite_irq.c
+++ /dev/null
@@ -1,122 +0,0 @@
1/*
2 * Copyright (C) by Basler Vision Technologies AG
3 * Author: Thomas Koeller <thomas.koeller@baslereb.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/errno.h>
21#include <linux/init.h>
22#include <linux/kernel_stat.h>
23#include <linux/module.h>
24#include <linux/signal.h>
25#include <linux/sched.h>
26#include <linux/types.h>
27#include <linux/interrupt.h>
28#include <linux/ioport.h>
29#include <linux/timex.h>
30#include <linux/slab.h>
31#include <linux/random.h>
32#include <linux/bitops.h>
33#include <asm/bootinfo.h>
34#include <asm/io.h>
35#include <asm/irq.h>
36#include <asm/irq_cpu.h>
37#include <asm/mipsregs.h>
38#include <asm/system.h>
39#include <asm/rm9k-ocd.h>
40
41#include <excite.h>
42
43extern asmlinkage void excite_handle_int(void);
44
45/*
46 * Initialize the interrupt handler
47 */
48void __init arch_init_irq(void)
49{
50 mips_cpu_irq_init();
51 rm7k_cpu_irq_init();
52 rm9k_cpu_irq_init();
53}
54
55asmlinkage void plat_irq_dispatch(void)
56{
57 const u32
58 interrupts = read_c0_cause() >> 8,
59 mask = ((read_c0_status() >> 8) & 0x000000ff) |
60 (read_c0_intcontrol() & 0x0000ff00),
61 pending = interrupts & mask;
62 u32 msgintflags, msgintmask, msgint;
63
64 /* process timer interrupt */
65 if (pending & (1 << TIMER_IRQ)) {
66 do_IRQ(TIMER_IRQ);
67 return;
68 }
69
70 /* Process PCI interrupts */
71#if USB_IRQ < 10
72 msgintflags = ocd_readl(INTP0Status0 + (USB_MSGINT / 0x20 * 0x10));
73 msgintmask = ocd_readl(INTP0Mask0 + (USB_MSGINT / 0x20 * 0x10));
74 msgint = msgintflags & msgintmask & (0x1 << (USB_MSGINT % 0x20));
75 if ((pending & (1 << USB_IRQ)) && msgint) {
76#else
77 if (pending & (1 << USB_IRQ)) {
78#endif
79 do_IRQ(USB_IRQ);
80 return;
81 }
82
83 /* Process TITAN interrupts */
84 msgintflags = ocd_readl(INTP0Status0 + (TITAN_MSGINT / 0x20 * 0x10));
85 msgintmask = ocd_readl(INTP0Mask0 + (TITAN_MSGINT / 0x20 * 0x10));
86 msgint = msgintflags & msgintmask & (0x1 << (TITAN_MSGINT % 0x20));
87 if ((pending & (1 << TITAN_IRQ)) && msgint) {
88 ocd_writel(msgint, INTP0Clear0 + (TITAN_MSGINT / 0x20 * 0x10));
89 do_IRQ(TITAN_IRQ);
90 return;
91 }
92
93 /* Process FPGA line #0 interrupts */
94 msgintflags = ocd_readl(INTP0Status0 + (FPGA0_MSGINT / 0x20 * 0x10));
95 msgintmask = ocd_readl(INTP0Mask0 + (FPGA0_MSGINT / 0x20 * 0x10));
96 msgint = msgintflags & msgintmask & (0x1 << (FPGA0_MSGINT % 0x20));
97 if ((pending & (1 << FPGA0_IRQ)) && msgint) {
98 do_IRQ(FPGA0_IRQ);
99 return;
100 }
101
102 /* Process FPGA line #1 interrupts */
103 msgintflags = ocd_readl(INTP0Status0 + (FPGA1_MSGINT / 0x20 * 0x10));
104 msgintmask = ocd_readl(INTP0Mask0 + (FPGA1_MSGINT / 0x20 * 0x10));
105 msgint = msgintflags & msgintmask & (0x1 << (FPGA1_MSGINT % 0x20));
106 if ((pending & (1 << FPGA1_IRQ)) && msgint) {
107 do_IRQ(FPGA1_IRQ);
108 return;
109 }
110
111 /* Process PHY interrupts */
112 msgintflags = ocd_readl(INTP0Status0 + (PHY_MSGINT / 0x20 * 0x10));
113 msgintmask = ocd_readl(INTP0Mask0 + (PHY_MSGINT / 0x20 * 0x10));
114 msgint = msgintflags & msgintmask & (0x1 << (PHY_MSGINT % 0x20));
115 if ((pending & (1 << PHY_IRQ)) && msgint) {
116 do_IRQ(PHY_IRQ);
117 return;
118 }
119
120 /* Process spurious interrupts */
121 spurious_interrupt();
122}