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-rw-r--r--arch/mips/au1000/pb1200/irqmap.c182
1 files changed, 182 insertions, 0 deletions
diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c
new file mode 100644
index 000000000000..59e70e5cf325
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+++ b/arch/mips/au1000/pb1200/irqmap.c
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1/*
2 * BRIEF MODULE DESCRIPTION
3 * Au1xxx irq map table
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25#include <linux/config.h>
26#include <linux/errno.h>
27#include <linux/init.h>
28#include <linux/irq.h>
29#include <linux/kernel_stat.h>
30#include <linux/module.h>
31#include <linux/signal.h>
32#include <linux/sched.h>
33#include <linux/types.h>
34#include <linux/interrupt.h>
35#include <linux/ioport.h>
36#include <linux/timex.h>
37#include <linux/slab.h>
38#include <linux/random.h>
39#include <linux/delay.h>
40
41#include <asm/bitops.h>
42#include <asm/bootinfo.h>
43#include <asm/io.h>
44#include <asm/mipsregs.h>
45#include <asm/system.h>
46#include <asm/mach-au1x00/au1000.h>
47
48#ifdef CONFIG_MIPS_PB1200
49#include <asm/mach-pb1x00/pb1200.h>
50#endif
51
52#ifdef CONFIG_MIPS_DB1200
53#include <asm/mach-db1x00/db1200.h>
54#define PB1200_INT_BEGIN DB1200_INT_BEGIN
55#define PB1200_INT_END DB1200_INT_END
56#endif
57
58au1xxx_irq_map_t au1xxx_irq_map[] = {
59 { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade
60};
61
62int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
63
64/*
65 * Support for External interrupts on the PbAu1200 Development platform.
66 */
67static volatile int pb1200_cascade_en=0;
68
69irqreturn_t pb1200_cascade_handler( int irq, void *dev_id, struct pt_regs *regs)
70{
71 unsigned short bisr = bcsr->int_status;
72 int extirq_nr = 0;
73
74 /* Clear all the edge interrupts. This has no effect on level */
75 bcsr->int_status = bisr;
76 for( ; bisr; bisr &= (bisr-1) )
77 {
78 extirq_nr = (PB1200_INT_BEGIN-1) + au_ffs(bisr);
79 /* Ack and dispatch IRQ */
80 do_IRQ(extirq_nr,regs);
81 }
82 return IRQ_RETVAL(1);
83}
84
85inline void pb1200_enable_irq(unsigned int irq_nr)
86{
87 bcsr->intset_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
88 bcsr->intset = 1<<(irq_nr - PB1200_INT_BEGIN);
89}
90
91inline void pb1200_disable_irq(unsigned int irq_nr)
92{
93 bcsr->intclr_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
94 bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN);
95}
96
97static unsigned int pb1200_startup_irq( unsigned int irq_nr )
98{
99 if (++pb1200_cascade_en == 1)
100 {
101 request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
102 0, "Pb1200 Cascade", (void *)&pb1200_cascade_handler );
103#ifdef CONFIG_MIPS_PB1200
104 /* We have a problem with CPLD rev3. Enable a workaround */
105 if( ((bcsr->whoami & BCSR_WHOAMI_CPLD)>>4) <= 3)
106 {
107 printk("\nWARNING!!!\n");
108 printk("\nWARNING!!!\n");
109 printk("\nWARNING!!!\n");
110 printk("\nWARNING!!!\n");
111 printk("\nWARNING!!!\n");
112 printk("\nWARNING!!!\n");
113 printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n");
114 printk("updated to latest revision. This software will not\n");
115 printk("work on anything less than CPLD rev4\n");
116 printk("\nWARNING!!!\n");
117 printk("\nWARNING!!!\n");
118 printk("\nWARNING!!!\n");
119 printk("\nWARNING!!!\n");
120 printk("\nWARNING!!!\n");
121 printk("\nWARNING!!!\n");
122 while(1);
123 }
124#endif
125 }
126 pb1200_enable_irq(irq_nr);
127 return 0;
128}
129
130static void pb1200_shutdown_irq( unsigned int irq_nr )
131{
132 pb1200_disable_irq(irq_nr);
133 if (--pb1200_cascade_en == 0)
134 {
135 free_irq(AU1000_GPIO_7,&pb1200_cascade_handler );
136 }
137 return;
138}
139
140static inline void pb1200_mask_and_ack_irq(unsigned int irq_nr)
141{
142 pb1200_disable_irq( irq_nr );
143}
144
145static void pb1200_end_irq(unsigned int irq_nr)
146{
147 if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
148 pb1200_enable_irq(irq_nr);
149 }
150}
151
152static struct hw_interrupt_type external_irq_type =
153{
154#ifdef CONFIG_MIPS_PB1200
155 "Pb1200 Ext",
156#endif
157#ifdef CONFIG_MIPS_DB1200
158 "Db1200 Ext",
159#endif
160 pb1200_startup_irq,
161 pb1200_shutdown_irq,
162 pb1200_enable_irq,
163 pb1200_disable_irq,
164 pb1200_mask_and_ack_irq,
165 pb1200_end_irq,
166 NULL
167};
168
169void _board_init_irq(void)
170{
171 int irq_nr;
172
173 for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++)
174 {
175 irq_desc[irq_nr].handler = &external_irq_type;
176 pb1200_disable_irq(irq_nr);
177 }
178
179 /* GPIO_7 can not be hooked here, so it is hooked upon first
180 request of any source attached to the cascade */
181}
182