1 files changed, 14 insertions, 10 deletions

diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index f113b512d7b1..e122bbc6cd88 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -209,18 +209,22 @@ unsigned long cal_r4koff(void)
                 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S);
                 au_writel(0, SYS_TOYWRITE);
                 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S);
+        } else
+                no_au1xxx_32khz = 1;
 
-                cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) *
-                        AU1000_SRC_CLK;
-        }
-        else {
-                /* The 32KHz oscillator isn't running, so assume there
-                 * isn't one and grab the processor speed from the PLL.
-                 * NOTE: some old silicon doesn't allow reading the PLL.
-                 */
+        /*
+         * On early Au1000, sys_cpupll was write-only. Since these
+         * silicon versions of Au1000 are not sold by AMD, we don't bend
+         * over backwards trying to determine the frequency.
+         */
+        if (cur_cpu_spec[0]->cpu_pll_wo)
+#ifdef CONFIG_SOC_AU1000_FREQUENCY
+                cpu_speed = CONFIG_SOC_AU1000_FREQUENCY;
+#else
+                cpu_speed = 396000000;
+#endif
+        else
                 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK;
-                no_au1xxx_32khz = 1;
-        }
         mips_hpt_frequency = cpu_speed;
         // Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16)
         set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));