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-rw-r--r--arch/mips/alchemy/xxs1500/board_setup.c93
1 files changed, 0 insertions, 93 deletions
diff --git a/arch/mips/alchemy/xxs1500/board_setup.c b/arch/mips/alchemy/xxs1500/board_setup.c
deleted file mode 100644
index 3fa83f72e014..000000000000
--- a/arch/mips/alchemy/xxs1500/board_setup.c
+++ /dev/null
@@ -1,93 +0,0 @@
1/*
2 * Copyright 2000-2003, 2008 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc. <source@mvista.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26#include <linux/gpio.h>
27#include <linux/init.h>
28#include <linux/interrupt.h>
29#include <linux/delay.h>
30#include <linux/pm.h>
31
32#include <asm/reboot.h>
33#include <asm/mach-au1x00/au1000.h>
34
35#include <prom.h>
36
37static void xxs1500_reset(char *c)
38{
39 /* Jump to the reset vector */
40 __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
41}
42
43static void xxs1500_power_off(void)
44{
45 while (1)
46 asm volatile (
47 " .set mips32 \n"
48 " wait \n"
49 " .set mips0 \n");
50}
51
52void __init board_setup(void)
53{
54 u32 pin_func;
55
56 pm_power_off = xxs1500_power_off;
57 _machine_halt = xxs1500_power_off;
58 _machine_restart = xxs1500_reset;
59
60 alchemy_gpio1_input_enable();
61 alchemy_gpio2_enable();
62
63 /* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
64 pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
65 pin_func |= SYS_PF_UR3;
66 au_writel(pin_func, SYS_PINFUNC);
67
68 /* Enable UART */
69 alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);
70 /* Enable DTR (MCR bit 0) = USB power up */
71 __raw_writel(1, (void __iomem *)KSEG1ADDR(AU1000_UART3_PHYS_ADDR + 0x18));
72 wmb();
73}
74
75static int __init xxs1500_init_irq(void)
76{
77 irq_set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH);
78 irq_set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW);
79 irq_set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW);
80 irq_set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW);
81 irq_set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW);
82 irq_set_irq_type(AU1500_GPIO207_INT, IRQF_TRIGGER_LOW);
83
84 irq_set_irq_type(AU1500_GPIO0_INT, IRQF_TRIGGER_LOW);
85 irq_set_irq_type(AU1500_GPIO1_INT, IRQF_TRIGGER_LOW);
86 irq_set_irq_type(AU1500_GPIO2_INT, IRQF_TRIGGER_LOW);
87 irq_set_irq_type(AU1500_GPIO3_INT, IRQF_TRIGGER_LOW);
88 irq_set_irq_type(AU1500_GPIO4_INT, IRQF_TRIGGER_LOW); /* CF irq */
89 irq_set_irq_type(AU1500_GPIO5_INT, IRQF_TRIGGER_LOW);
90
91 return 0;
92}
93arch_initcall(xxs1500_init_irq);