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-rw-r--r--arch/mips/alchemy/devboards/Makefile18
-rw-r--r--arch/mips/alchemy/devboards/db1x00/Makefile8
-rw-r--r--arch/mips/alchemy/devboards/db1x00/board_setup.c145
-rw-r--r--arch/mips/alchemy/devboards/db1x00/irqmap.c90
-rw-r--r--arch/mips/alchemy/devboards/pb1000/Makefile8
-rw-r--r--arch/mips/alchemy/devboards/pb1000/board_setup.c191
-rw-r--r--arch/mips/alchemy/devboards/pb1100/Makefile8
-rw-r--r--arch/mips/alchemy/devboards/pb1100/board_setup.c156
-rw-r--r--arch/mips/alchemy/devboards/pb1200/Makefile7
-rw-r--r--arch/mips/alchemy/devboards/pb1200/board_setup.c164
-rw-r--r--arch/mips/alchemy/devboards/pb1200/irqmap.c134
-rw-r--r--arch/mips/alchemy/devboards/pb1200/platform.c166
-rw-r--r--arch/mips/alchemy/devboards/pb1500/Makefile8
-rw-r--r--arch/mips/alchemy/devboards/pb1500/board_setup.c163
-rw-r--r--arch/mips/alchemy/devboards/pb1550/Makefile8
-rw-r--r--arch/mips/alchemy/devboards/pb1550/board_setup.c92
-rw-r--r--arch/mips/alchemy/devboards/pm.c229
-rw-r--r--arch/mips/alchemy/devboards/prom.c62
18 files changed, 1657 insertions, 0 deletions
diff --git a/arch/mips/alchemy/devboards/Makefile b/arch/mips/alchemy/devboards/Makefile
new file mode 100644
index 000000000000..730f9f2b30e8
--- /dev/null
+++ b/arch/mips/alchemy/devboards/Makefile
@@ -0,0 +1,18 @@
1#
2# Alchemy Develboards
3#
4
5obj-y += prom.o
6obj-$(CONFIG_PM) += pm.o
7obj-$(CONFIG_MIPS_PB1000) += pb1000/
8obj-$(CONFIG_MIPS_PB1100) += pb1100/
9obj-$(CONFIG_MIPS_PB1200) += pb1200/
10obj-$(CONFIG_MIPS_PB1500) += pb1500/
11obj-$(CONFIG_MIPS_PB1550) += pb1550/
12obj-$(CONFIG_MIPS_DB1000) += db1x00/
13obj-$(CONFIG_MIPS_DB1100) += db1x00/
14obj-$(CONFIG_MIPS_DB1200) += pb1200/
15obj-$(CONFIG_MIPS_DB1500) += db1x00/
16obj-$(CONFIG_MIPS_DB1550) += db1x00/
17obj-$(CONFIG_MIPS_BOSPORUS) += db1x00/
18obj-$(CONFIG_MIPS_MIRAGE) += db1x00/
diff --git a/arch/mips/alchemy/devboards/db1x00/Makefile b/arch/mips/alchemy/devboards/db1x00/Makefile
new file mode 100644
index 000000000000..432241ab8677
--- /dev/null
+++ b/arch/mips/alchemy/devboards/db1x00/Makefile
@@ -0,0 +1,8 @@
1#
2# Copyright 2000, 2008 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. <source@mvista.com>
4#
5# Makefile for the Alchemy Semiconductor DBAu1xx0 boards.
6#
7
8obj-y := board_setup.o irqmap.o
diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c
new file mode 100644
index 000000000000..a75ffbf99f25
--- /dev/null
+++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c
@@ -0,0 +1,145 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Alchemy Db1x00 board setup.
5 *
6 * Copyright 2000, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29
30#include <linux/init.h>
31
32#include <asm/mach-au1x00/au1000.h>
33#include <asm/mach-db1x00/db1x00.h>
34
35#include <prom.h>
36
37
38static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
39
40const char *get_system_type(void)
41{
42#ifdef CONFIG_MIPS_BOSPORUS
43 return "Alchemy Bosporus Gateway Reference";
44#else
45 return "Alchemy Db1x00";
46#endif
47}
48
49void board_reset(void)
50{
51 /* Hit BCSR.SW_RESET[RESET] */
52 bcsr->swreset = 0x0000;
53}
54
55void __init board_setup(void)
56{
57 u32 pin_func = 0;
58 char *argptr;
59
60 argptr = prom_getcmdline();
61#ifdef CONFIG_SERIAL_8250_CONSOLE
62 argptr = strstr(argptr, "console=");
63 if (argptr == NULL) {
64 argptr = prom_getcmdline();
65 strcat(argptr, " console=ttyS0,115200");
66 }
67#endif
68
69#ifdef CONFIG_FB_AU1100
70 argptr = strstr(argptr, "video=");
71 if (argptr == NULL) {
72 argptr = prom_getcmdline();
73 /* default panel */
74 /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/
75 }
76#endif
77
78#if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000)
79 /* au1000 does not support vra, au1500 and au1100 do */
80 strcat(argptr, " au1000_audio=vra");
81 argptr = prom_getcmdline();
82#endif
83
84 /* Not valid for Au1550 */
85#if defined(CONFIG_IRDA) && \
86 (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100))
87 /* Set IRFIRSEL instead of GPIO15 */
88 pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF;
89 au_writel(pin_func, SYS_PINFUNC);
90 /* Power off until the driver is in use */
91 bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK;
92 bcsr->resets |= BCSR_RESETS_IRDA_MODE_OFF;
93 au_sync();
94#endif
95 bcsr->pcmcia = 0x0000; /* turn off PCMCIA power */
96
97#ifdef CONFIG_MIPS_MIRAGE
98 /* Enable GPIO[31:0] inputs */
99 au_writel(0, SYS_PININPUTEN);
100
101 /* GPIO[20] is output, tristate the other input primary GPIOs */
102 au_writel(~(1 << 20), SYS_TRIOUTCLR);
103
104 /* Set GPIO[210:208] instead of SSI_0 */
105 pin_func = au_readl(SYS_PINFUNC) | SYS_PF_S0;
106
107 /* Set GPIO[215:211] for LEDs */
108 pin_func |= 5 << 2;
109
110 /* Set GPIO[214:213] for more LEDs */
111 pin_func |= 5 << 12;
112
113 /* Set GPIO[207:200] instead of PCMCIA/LCD */
114 pin_func |= SYS_PF_LCD | SYS_PF_PC;
115 au_writel(pin_func, SYS_PINFUNC);
116
117 /*
118 * Enable speaker amplifier. This should
119 * be part of the audio driver.
120 */
121 au_writel(au_readl(GPIO2_DIR) | 0x200, GPIO2_DIR);
122 au_writel(0x02000200, GPIO2_OUTPUT);
123#endif
124
125 au_sync();
126
127#ifdef CONFIG_MIPS_DB1000
128 printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n");
129#endif
130#ifdef CONFIG_MIPS_DB1500
131 printk(KERN_INFO "AMD Alchemy Au1500/Db1500 Board\n");
132#endif
133#ifdef CONFIG_MIPS_DB1100
134 printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n");
135#endif
136#ifdef CONFIG_MIPS_BOSPORUS
137 printk(KERN_INFO "AMD Alchemy Bosporus Board\n");
138#endif
139#ifdef CONFIG_MIPS_MIRAGE
140 printk(KERN_INFO "AMD Alchemy Mirage Board\n");
141#endif
142#ifdef CONFIG_MIPS_DB1550
143 printk(KERN_INFO "AMD Alchemy Au1550/Db1550 Board\n");
144#endif
145}
diff --git a/arch/mips/alchemy/devboards/db1x00/irqmap.c b/arch/mips/alchemy/devboards/db1x00/irqmap.c
new file mode 100644
index 000000000000..0b09025087c6
--- /dev/null
+++ b/arch/mips/alchemy/devboards/db1x00/irqmap.c
@@ -0,0 +1,90 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * Au1xxx irq map table
4 *
5 * Copyright 2003 Embedded Edge, LLC
6 * dan@embeddededge.com
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#include <linux/init.h>
30#include <linux/interrupt.h>
31
32#include <asm/mach-au1x00/au1000.h>
33
34#ifdef CONFIG_MIPS_DB1500
35char irq_tab_alchemy[][5] __initdata = {
36 [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - HPT371 */
37 [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */
38};
39#endif
40
41#ifdef CONFIG_MIPS_BOSPORUS
42char irq_tab_alchemy[][5] __initdata = {
43 [11] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 11 - miniPCI */
44 [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - SN1741 */
45 [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */
46};
47#endif
48
49#ifdef CONFIG_MIPS_MIRAGE
50char irq_tab_alchemy[][5] __initdata = {
51 [11] = { -1, INTD, INTX, INTX, INTX }, /* IDSEL 11 - SMI VGX */
52 [12] = { -1, INTX, INTX, INTC, INTX }, /* IDSEL 12 - PNX1300 */
53 [13] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 13 - miniPCI */
54};
55#endif
56
57#ifdef CONFIG_MIPS_DB1550
58char irq_tab_alchemy[][5] __initdata = {
59 [11] = { -1, INTC, INTX, INTX, INTX }, /* IDSEL 11 - on-board HPT371 */
60 [12] = { -1, INTB, INTC, INTD, INTA }, /* IDSEL 12 - PCI slot 2 (left) */
61 [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot 1 (right) */
62};
63#endif
64
65
66struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
67
68#ifndef CONFIG_MIPS_MIRAGE
69#ifdef CONFIG_MIPS_DB1550
70 { AU1000_GPIO_3, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card 0 IRQ# */
71 { AU1000_GPIO_5, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card 1 IRQ# */
72#else
73 { AU1000_GPIO_0, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card 0 Fully_Interted# */
74 { AU1000_GPIO_1, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card 0 STSCHG# */
75 { AU1000_GPIO_2, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card 0 IRQ# */
76
77 { AU1000_GPIO_3, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card 1 Fully_Interted# */
78 { AU1000_GPIO_4, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card 1 STSCHG# */
79 { AU1000_GPIO_5, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card 1 IRQ# */
80#endif
81#else
82 { AU1000_GPIO_7, IRQF_TRIGGER_RISING, 0 }, /* touchscreen pen down */
83#endif
84
85};
86
87void __init board_init_irq(void)
88{
89 au1xxx_setup_irqmap(au1xxx_irq_map, ARRAY_SIZE(au1xxx_irq_map));
90}
diff --git a/arch/mips/alchemy/devboards/pb1000/Makefile b/arch/mips/alchemy/devboards/pb1000/Makefile
new file mode 100644
index 000000000000..97c6615ba2bb
--- /dev/null
+++ b/arch/mips/alchemy/devboards/pb1000/Makefile
@@ -0,0 +1,8 @@
1#
2# Copyright 2000, 2008 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. <source@mvista.com>
4#
5# Makefile for the Alchemy Semiconductor Pb1000 board.
6#
7
8obj-y := board_setup.o
diff --git a/arch/mips/alchemy/devboards/pb1000/board_setup.c b/arch/mips/alchemy/devboards/pb1000/board_setup.c
new file mode 100644
index 000000000000..aed2fdecc709
--- /dev/null
+++ b/arch/mips/alchemy/devboards/pb1000/board_setup.c
@@ -0,0 +1,191 @@
1/*
2 * Copyright 2000, 2008 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc. <source@mvista.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26#include <linux/delay.h>
27#include <linux/init.h>
28#include <linux/interrupt.h>
29#include <asm/mach-au1x00/au1000.h>
30#include <asm/mach-pb1x00/pb1000.h>
31#include <prom.h>
32
33
34struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
35 { AU1000_GPIO_15, IRQF_TRIGGER_LOW, 0 },
36};
37
38
39const char *get_system_type(void)
40{
41 return "Alchemy Pb1000";
42}
43
44void board_reset(void)
45{
46}
47
48void __init board_init_irq(void)
49{
50 au1xxx_setup_irqmap(au1xxx_irq_map, ARRAY_SIZE(au1xxx_irq_map));
51}
52
53void __init board_setup(void)
54{
55 u32 pin_func, static_cfg0;
56 u32 sys_freqctrl, sys_clksrc;
57 u32 prid = read_c0_prid();
58
59#ifdef CONFIG_SERIAL_8250_CONSOLE
60 char *argptr = prom_getcmdline();
61 argptr = strstr(argptr, "console=");
62 if (argptr == NULL) {
63 argptr = prom_getcmdline();
64 strcat(argptr, " console=ttyS0,115200");
65 }
66#endif
67
68 /* Set AUX clock to 12 MHz * 8 = 96 MHz */
69 au_writel(8, SYS_AUXPLL);
70 au_writel(0, SYS_PINSTATERD);
71 udelay(100);
72
73#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
74 /* Zero and disable FREQ2 */
75 sys_freqctrl = au_readl(SYS_FREQCTRL0);
76 sys_freqctrl &= ~0xFFF00000;
77 au_writel(sys_freqctrl, SYS_FREQCTRL0);
78
79 /* Zero and disable USBH/USBD clocks */
80 sys_clksrc = au_readl(SYS_CLKSRC);
81 sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
82 SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
83 au_writel(sys_clksrc, SYS_CLKSRC);
84
85 sys_freqctrl = au_readl(SYS_FREQCTRL0);
86 sys_freqctrl &= ~0xFFF00000;
87
88 sys_clksrc = au_readl(SYS_CLKSRC);
89 sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
90 SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
91
92 switch (prid & 0x000000FF) {
93 case 0x00: /* DA */
94 case 0x01: /* HA */
95 case 0x02: /* HB */
96 /* CPU core freq to 48 MHz to slow it way down... */
97 au_writel(4, SYS_CPUPLL);
98
99 /*
100 * Setup 48 MHz FREQ2 from CPUPLL for USB Host
101 * FRDIV2 = 3 -> div by 8 of 384 MHz -> 48 MHz
102 */
103 sys_freqctrl |= (3 << SYS_FC_FRDIV2_BIT) | SYS_FC_FE2;
104 au_writel(sys_freqctrl, SYS_FREQCTRL0);
105
106 /* CPU core freq to 384 MHz */
107 au_writel(0x20, SYS_CPUPLL);
108
109 printk(KERN_INFO "Au1000: 48 MHz OHCI workaround enabled\n");
110 break;
111
112 default: /* HC and newer */
113 /* FREQ2 = aux / 2 = 48 MHz */
114 sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) |
115 SYS_FC_FE2 | SYS_FC_FS2;
116 au_writel(sys_freqctrl, SYS_FREQCTRL0);
117 break;
118 }
119
120 /*
121 * Route 48 MHz FREQ2 into USB Host and/or Device
122 */
123 sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MUH_BIT;
124 au_writel(sys_clksrc, SYS_CLKSRC);
125
126 /* Configure pins GPIO[14:9] as GPIO */
127 pin_func = au_readl(SYS_PINFUNC) & ~(SYS_PF_UR3 | SYS_PF_USB);
128
129 /* 2nd USB port is USB host */
130 pin_func |= SYS_PF_USB;
131
132 au_writel(pin_func, SYS_PINFUNC);
133 au_writel(0x2800, SYS_TRIOUTCLR);
134 au_writel(0x0030, SYS_OUTPUTCLR);
135#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
136
137 /* Make GPIO 15 an input (for interrupt line) */
138 pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_IRF;
139 /* We don't need I2S, so make it available for GPIO[31:29] */
140 pin_func |= SYS_PF_I2S;
141 au_writel(pin_func, SYS_PINFUNC);
142
143 au_writel(0x8000, SYS_TRIOUTCLR);
144
145 static_cfg0 = au_readl(MEM_STCFG0) & ~0xc00;
146 au_writel(static_cfg0, MEM_STCFG0);
147
148 /* configure RCE2* for LCD */
149 au_writel(0x00000004, MEM_STCFG2);
150
151 /* MEM_STTIME2 */
152 au_writel(0x09000000, MEM_STTIME2);
153
154 /* Set 32-bit base address decoding for RCE2* */
155 au_writel(0x10003ff0, MEM_STADDR2);
156
157 /*
158 * PCI CPLD setup
159 * Expand CE0 to cover PCI
160 */
161 au_writel(0x11803e40, MEM_STADDR1);
162
163 /* Burst visibility on */
164 au_writel(au_readl(MEM_STCFG0) | 0x1000, MEM_STCFG0);
165
166 au_writel(0x83, MEM_STCFG1); /* ewait enabled, flash timing */
167 au_writel(0x33030a10, MEM_STTIME1); /* slower timing for FPGA */
168
169 /* Setup the static bus controller */
170 au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
171 au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
172 au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
173
174 /*
175 * Enable Au1000 BCLK switching - note: sed1356 must not use
176 * its BCLK (Au1000 LCLK) for any timings
177 */
178 switch (prid & 0x000000FF) {
179 case 0x00: /* DA */
180 case 0x01: /* HA */
181 case 0x02: /* HB */
182 break;
183 default: /* HC and newer */
184 /*
185 * Enable sys bus clock divider when IDLE state or no bus
186 * activity.
187 */
188 au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
189 break;
190 }
191}
diff --git a/arch/mips/alchemy/devboards/pb1100/Makefile b/arch/mips/alchemy/devboards/pb1100/Makefile
new file mode 100644
index 000000000000..c586dd7e91dc
--- /dev/null
+++ b/arch/mips/alchemy/devboards/pb1100/Makefile
@@ -0,0 +1,8 @@
1#
2# Copyright 2000, 2001, 2008 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. <source@mvista.com>
4#
5# Makefile for the Alchemy Semiconductor Pb1100 board.
6#
7
8obj-y := board_setup.o
diff --git a/arch/mips/alchemy/devboards/pb1100/board_setup.c b/arch/mips/alchemy/devboards/pb1100/board_setup.c
new file mode 100644
index 000000000000..4df57fae15d4
--- /dev/null
+++ b/arch/mips/alchemy/devboards/pb1100/board_setup.c
@@ -0,0 +1,156 @@
1/*
2 * Copyright 2002, 2008 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc. <source@mvista.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26#include <linux/init.h>
27#include <linux/delay.h>
28#include <linux/interrupt.h>
29
30#include <asm/mach-au1x00/au1000.h>
31#include <asm/mach-pb1x00/pb1100.h>
32
33#include <prom.h>
34
35
36struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
37 { AU1000_GPIO_9, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card Fully_Inserted# */
38 { AU1000_GPIO_10, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card STSCHG# */
39 { AU1000_GPIO_11, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card IRQ# */
40 { AU1000_GPIO_13, IRQF_TRIGGER_LOW, 0 }, /* DC_IRQ# */
41};
42
43
44const char *get_system_type(void)
45{
46 return "Alchemy Pb1100";
47}
48
49void board_reset(void)
50{
51 /* Hit BCSR.RST_VDDI[SOFT_RESET] */
52 au_writel(0x00000000, PB1100_RST_VDDI);
53}
54
55void __init board_init_irq(void)
56{
57 au1xxx_setup_irqmap(au1xxx_irq_map, ARRAY_SIZE(au1xxx_irq_map));
58}
59
60void __init board_setup(void)
61{
62 volatile void __iomem *base = (volatile void __iomem *)0xac000000UL;
63 char *argptr;
64
65 argptr = prom_getcmdline();
66#ifdef CONFIG_SERIAL_8250_CONSOLE
67 argptr = strstr(argptr, "console=");
68 if (argptr == NULL) {
69 argptr = prom_getcmdline();
70 strcat(argptr, " console=ttyS0,115200");
71 }
72#endif
73
74#ifdef CONFIG_FB_AU1100
75 argptr = strstr(argptr, "video=");
76 if (argptr == NULL) {
77 argptr = prom_getcmdline();
78 /* default panel */
79 /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/
80 }
81#endif
82
83#if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000)
84 /* au1000 does not support vra, au1500 and au1100 do */
85 strcat(argptr, " au1000_audio=vra");
86 argptr = prom_getcmdline();
87#endif
88
89 /* Set AUX clock to 12 MHz * 8 = 96 MHz */
90 au_writel(8, SYS_AUXPLL);
91 au_writel(0, SYS_PININPUTEN);
92 udelay(100);
93
94#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
95 {
96 u32 pin_func, sys_freqctrl, sys_clksrc;
97
98 /* Configure pins GPIO[14:9] as GPIO */
99 pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
100
101 /* Zero and disable FREQ2 */
102 sys_freqctrl = au_readl(SYS_FREQCTRL0);
103 sys_freqctrl &= ~0xFFF00000;
104 au_writel(sys_freqctrl, SYS_FREQCTRL0);
105
106 /* Zero and disable USBH/USBD/IrDA clock */
107 sys_clksrc = au_readl(SYS_CLKSRC);
108 sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK);
109 au_writel(sys_clksrc, SYS_CLKSRC);
110
111 sys_freqctrl = au_readl(SYS_FREQCTRL0);
112 sys_freqctrl &= ~0xFFF00000;
113
114 sys_clksrc = au_readl(SYS_CLKSRC);
115 sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK);
116
117 /* FREQ2 = aux / 2 = 48 MHz */
118 sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) |
119 SYS_FC_FE2 | SYS_FC_FS2;
120 au_writel(sys_freqctrl, SYS_FREQCTRL0);
121
122 /*
123 * Route 48 MHz FREQ2 into USBH/USBD/IrDA
124 */
125 sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MIR_BIT;
126 au_writel(sys_clksrc, SYS_CLKSRC);
127
128 /* Setup the static bus controller */
129 au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
130 au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
131 au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
132
133 /*
134 * Get USB Functionality pin state (device vs host drive pins).
135 */
136 pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB;
137 /* 2nd USB port is USB host. */
138 pin_func |= SYS_PF_USB;
139 au_writel(pin_func, SYS_PINFUNC);
140 }
141#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
142
143 /* Enable sys bus clock divider when IDLE state or no bus activity. */
144 au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
145
146 /* Enable the RTC if not already enabled. */
147 if (!(readb(base + 0x28) & 0x20)) {
148 writeb(readb(base + 0x28) | 0x20, base + 0x28);
149 au_sync();
150 }
151 /* Put the clock in BCD mode. */
152 if (readb(base + 0x2C) & 0x4) { /* reg B */
153 writeb(readb(base + 0x2c) & ~0x4, base + 0x2c);
154 au_sync();
155 }
156}
diff --git a/arch/mips/alchemy/devboards/pb1200/Makefile b/arch/mips/alchemy/devboards/pb1200/Makefile
new file mode 100644
index 000000000000..c8c3a99fb68a
--- /dev/null
+++ b/arch/mips/alchemy/devboards/pb1200/Makefile
@@ -0,0 +1,7 @@
1#
2# Makefile for the Alchemy Semiconductor Pb1200/DBAu1200 boards.
3#
4
5obj-y := board_setup.o irqmap.o platform.o
6
7EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/alchemy/devboards/pb1200/board_setup.c b/arch/mips/alchemy/devboards/pb1200/board_setup.c
new file mode 100644
index 000000000000..94e6b7e7753d
--- /dev/null
+++ b/arch/mips/alchemy/devboards/pb1200/board_setup.c
@@ -0,0 +1,164 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Alchemy Pb1200/Db1200 board setup.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#include <linux/init.h>
28#include <linux/sched.h>
29
30#include <prom.h>
31#include <au1xxx.h>
32
33
34const char *get_system_type(void)
35{
36 return "Alchemy Pb1200";
37}
38
39void board_reset(void)
40{
41 bcsr->resets = 0;
42 bcsr->system = 0;
43}
44
45void __init board_setup(void)
46{
47 char *argptr;
48
49 argptr = prom_getcmdline();
50#ifdef CONFIG_SERIAL_8250_CONSOLE
51 argptr = strstr(argptr, "console=");
52 if (argptr == NULL) {
53 argptr = prom_getcmdline();
54 strcat(argptr, " console=ttyS0,115200");
55 }
56#endif
57#ifdef CONFIG_FB_AU1200
58 strcat(argptr, " video=au1200fb:panel:bs");
59#endif
60
61#if 0
62 {
63 u32 pin_func;
64
65 /*
66 * Enable PSC1 SYNC for AC97. Normaly done in audio driver,
67 * but it is board specific code, so put it here.
68 */
69 pin_func = au_readl(SYS_PINFUNC);
70 au_sync();
71 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
72 au_writel(pin_func, SYS_PINFUNC);
73
74 au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */
75 au_sync();
76 }
77#endif
78
79#if defined(CONFIG_I2C_AU1550)
80 {
81 u32 freq0, clksrc;
82 u32 pin_func;
83
84 /* Select SMBus in CPLD */
85 bcsr->resets &= ~BCSR_RESETS_PCS0MUX;
86
87 pin_func = au_readl(SYS_PINFUNC);
88 au_sync();
89 pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
90 /* Set GPIOs correctly */
91 pin_func |= 2 << 17;
92 au_writel(pin_func, SYS_PINFUNC);
93 au_sync();
94
95 /* The I2C driver depends on 50 MHz clock */
96 freq0 = au_readl(SYS_FREQCTRL0);
97 au_sync();
98 freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
99 freq0 |= 3 << SYS_FC_FRDIV1_BIT;
100 /* 396 MHz / (3 + 1) * 2 == 49.5 MHz */
101 au_writel(freq0, SYS_FREQCTRL0);
102 au_sync();
103 freq0 |= SYS_FC_FE1;
104 au_writel(freq0, SYS_FREQCTRL0);
105 au_sync();
106
107 clksrc = au_readl(SYS_CLKSRC);
108 au_sync();
109 clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK);
110 /* Bit 22 is EXTCLK0 for PSC0 */
111 clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT;
112 au_writel(clksrc, SYS_CLKSRC);
113 au_sync();
114 }
115#endif
116
117 /*
118 * The Pb1200 development board uses external MUX for PSC0 to
119 * support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
120 */
121#ifdef CONFIG_I2C_AU1550
122 bcsr->resets &= ~BCSR_RESETS_PCS0MUX;
123#endif
124 au_sync();
125
126#ifdef CONFIG_MIPS_PB1200
127 printk(KERN_INFO "AMD Alchemy Pb1200 Board\n");
128#endif
129#ifdef CONFIG_MIPS_DB1200
130 printk(KERN_INFO "AMD Alchemy Db1200 Board\n");
131#endif
132}
133
134int board_au1200fb_panel(void)
135{
136 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
137 int p;
138
139 p = bcsr->switches;
140 p >>= 8;
141 p &= 0x0F;
142 return p;
143}
144
145int board_au1200fb_panel_init(void)
146{
147 /* Apply power */
148 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
149
150 bcsr->board |= BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL;
151 /* printk(KERN_DEBUG "board_au1200fb_panel_init()\n"); */
152 return 0;
153}
154
155int board_au1200fb_panel_shutdown(void)
156{
157 /* Remove power */
158 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
159
160 bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
161 BCSR_BOARD_LCDBL);
162 /* printk(KERN_DEBUG "board_au1200fb_panel_shutdown()\n"); */
163 return 0;
164}
diff --git a/arch/mips/alchemy/devboards/pb1200/irqmap.c b/arch/mips/alchemy/devboards/pb1200/irqmap.c
new file mode 100644
index 000000000000..fe47498da280
--- /dev/null
+++ b/arch/mips/alchemy/devboards/pb1200/irqmap.c
@@ -0,0 +1,134 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * Au1xxx irq map table
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26#include <linux/init.h>
27#include <linux/interrupt.h>
28
29#include <asm/mach-au1x00/au1000.h>
30
31#ifdef CONFIG_MIPS_PB1200
32#include <asm/mach-pb1x00/pb1200.h>
33#endif
34
35#ifdef CONFIG_MIPS_DB1200
36#include <asm/mach-db1x00/db1200.h>
37#define PB1200_INT_BEGIN DB1200_INT_BEGIN
38#define PB1200_INT_END DB1200_INT_END
39#endif
40
41struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
42 /* This is external interrupt cascade */
43 { AU1000_GPIO_7, IRQF_TRIGGER_LOW, 0 },
44};
45
46
47/*
48 * Support for External interrupts on the Pb1200 Development platform.
49 */
50
51static void pb1200_cascade_handler(unsigned int irq, struct irq_desc *d)
52{
53 unsigned short bisr = bcsr->int_status;
54
55 for ( ; bisr; bisr &= bisr - 1)
56 generic_handle_irq(PB1200_INT_BEGIN + __ffs(bisr));
57}
58
59/* NOTE: both the enable and mask bits must be cleared, otherwise the
60 * CPLD generates tons of spurious interrupts (at least on the DB1200).
61 */
62static void pb1200_mask_irq(unsigned int irq_nr)
63{
64 bcsr->intclr_mask = 1 << (irq_nr - PB1200_INT_BEGIN);
65 bcsr->intclr = 1 << (irq_nr - PB1200_INT_BEGIN);
66 au_sync();
67}
68
69static void pb1200_maskack_irq(unsigned int irq_nr)
70{
71 bcsr->intclr_mask = 1 << (irq_nr - PB1200_INT_BEGIN);
72 bcsr->intclr = 1 << (irq_nr - PB1200_INT_BEGIN);
73 bcsr->int_status = 1 << (irq_nr - PB1200_INT_BEGIN); /* ack */
74 au_sync();
75}
76
77static void pb1200_unmask_irq(unsigned int irq_nr)
78{
79 bcsr->intset = 1 << (irq_nr - PB1200_INT_BEGIN);
80 bcsr->intset_mask = 1 << (irq_nr - PB1200_INT_BEGIN);
81 au_sync();
82}
83
84static struct irq_chip pb1200_cpld_irq_type = {
85#ifdef CONFIG_MIPS_PB1200
86 .name = "Pb1200 Ext",
87#endif
88#ifdef CONFIG_MIPS_DB1200
89 .name = "Db1200 Ext",
90#endif
91 .mask = pb1200_mask_irq,
92 .mask_ack = pb1200_maskack_irq,
93 .unmask = pb1200_unmask_irq,
94};
95
96void __init board_init_irq(void)
97{
98 unsigned int irq;
99
100 au1xxx_setup_irqmap(au1xxx_irq_map, ARRAY_SIZE(au1xxx_irq_map));
101
102#ifdef CONFIG_MIPS_PB1200
103 /* We have a problem with CPLD rev 3. */
104 if (((bcsr->whoami & BCSR_WHOAMI_CPLD) >> 4) <= 3) {
105 printk(KERN_ERR "WARNING!!!\n");
106 printk(KERN_ERR "WARNING!!!\n");
107 printk(KERN_ERR "WARNING!!!\n");
108 printk(KERN_ERR "WARNING!!!\n");
109 printk(KERN_ERR "WARNING!!!\n");
110 printk(KERN_ERR "WARNING!!!\n");
111 printk(KERN_ERR "Pb1200 must be at CPLD rev 4. Please have Pb1200\n");
112 printk(KERN_ERR "updated to latest revision. This software will\n");
113 printk(KERN_ERR "not work on anything less than CPLD rev 4.\n");
114 printk(KERN_ERR "WARNING!!!\n");
115 printk(KERN_ERR "WARNING!!!\n");
116 printk(KERN_ERR "WARNING!!!\n");
117 printk(KERN_ERR "WARNING!!!\n");
118 printk(KERN_ERR "WARNING!!!\n");
119 printk(KERN_ERR "WARNING!!!\n");
120 panic("Game over. Your score is 0.");
121 }
122#endif
123 /* mask & disable & ack all */
124 bcsr->intclr_mask = 0xffff;
125 bcsr->intclr = 0xffff;
126 bcsr->int_status = 0xffff;
127 au_sync();
128
129 for (irq = PB1200_INT_BEGIN; irq <= PB1200_INT_END; irq++)
130 set_irq_chip_and_handler_name(irq, &pb1200_cpld_irq_type,
131 handle_level_irq, "level");
132
133 set_irq_chained_handler(AU1000_GPIO_7, pb1200_cascade_handler);
134}
diff --git a/arch/mips/alchemy/devboards/pb1200/platform.c b/arch/mips/alchemy/devboards/pb1200/platform.c
new file mode 100644
index 000000000000..95303297c534
--- /dev/null
+++ b/arch/mips/alchemy/devboards/pb1200/platform.c
@@ -0,0 +1,166 @@
1/*
2 * Pb1200/DBAu1200 board platform device registration
3 *
4 * Copyright (C) 2008 MontaVista Software Inc. <source@mvista.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <linux/dma-mapping.h>
22#include <linux/init.h>
23#include <linux/leds.h>
24#include <linux/platform_device.h>
25
26#include <asm/mach-au1x00/au1xxx.h>
27#include <asm/mach-au1x00/au1100_mmc.h>
28
29static int mmc_activity;
30
31static void pb1200mmc0_set_power(void *mmc_host, int state)
32{
33 if (state)
34 bcsr->board |= BCSR_BOARD_SD0PWR;
35 else
36 bcsr->board &= ~BCSR_BOARD_SD0PWR;
37
38 au_sync_delay(1);
39}
40
41static int pb1200mmc0_card_readonly(void *mmc_host)
42{
43 return (bcsr->status & BCSR_STATUS_SD0WP) ? 1 : 0;
44}
45
46static int pb1200mmc0_card_inserted(void *mmc_host)
47{
48 return (bcsr->sig_status & BCSR_INT_SD0INSERT) ? 1 : 0;
49}
50
51static void pb1200_mmcled_set(struct led_classdev *led,
52 enum led_brightness brightness)
53{
54 if (brightness != LED_OFF) {
55 if (++mmc_activity == 1)
56 bcsr->disk_leds &= ~(1 << 8);
57 } else {
58 if (--mmc_activity == 0)
59 bcsr->disk_leds |= (1 << 8);
60 }
61}
62
63static struct led_classdev pb1200mmc_led = {
64 .brightness_set = pb1200_mmcled_set,
65};
66
67#ifndef CONFIG_MIPS_DB1200
68static void pb1200mmc1_set_power(void *mmc_host, int state)
69{
70 if (state)
71 bcsr->board |= BCSR_BOARD_SD1PWR;
72 else
73 bcsr->board &= ~BCSR_BOARD_SD1PWR;
74
75 au_sync_delay(1);
76}
77
78static int pb1200mmc1_card_readonly(void *mmc_host)
79{
80 return (bcsr->status & BCSR_STATUS_SD1WP) ? 1 : 0;
81}
82
83static int pb1200mmc1_card_inserted(void *mmc_host)
84{
85 return (bcsr->sig_status & BCSR_INT_SD1INSERT) ? 1 : 0;
86}
87#endif
88
89const struct au1xmmc_platform_data au1xmmc_platdata[2] = {
90 [0] = {
91 .set_power = pb1200mmc0_set_power,
92 .card_inserted = pb1200mmc0_card_inserted,
93 .card_readonly = pb1200mmc0_card_readonly,
94 .cd_setup = NULL, /* use poll-timer in driver */
95 .led = &pb1200mmc_led,
96 },
97#ifndef CONFIG_MIPS_DB1200
98 [1] = {
99 .set_power = pb1200mmc1_set_power,
100 .card_inserted = pb1200mmc1_card_inserted,
101 .card_readonly = pb1200mmc1_card_readonly,
102 .cd_setup = NULL, /* use poll-timer in driver */
103 .led = &pb1200mmc_led,
104 },
105#endif
106};
107
108static struct resource ide_resources[] = {
109 [0] = {
110 .start = IDE_PHYS_ADDR,
111 .end = IDE_PHYS_ADDR + IDE_PHYS_LEN - 1,
112 .flags = IORESOURCE_MEM
113 },
114 [1] = {
115 .start = IDE_INT,
116 .end = IDE_INT,
117 .flags = IORESOURCE_IRQ
118 }
119};
120
121static u64 ide_dmamask = DMA_32BIT_MASK;
122
123static struct platform_device ide_device = {
124 .name = "au1200-ide",
125 .id = 0,
126 .dev = {
127 .dma_mask = &ide_dmamask,
128 .coherent_dma_mask = DMA_32BIT_MASK,
129 },
130 .num_resources = ARRAY_SIZE(ide_resources),
131 .resource = ide_resources
132};
133
134static struct resource smc91c111_resources[] = {
135 [0] = {
136 .name = "smc91x-regs",
137 .start = SMC91C111_PHYS_ADDR,
138 .end = SMC91C111_PHYS_ADDR + 0xf,
139 .flags = IORESOURCE_MEM
140 },
141 [1] = {
142 .start = SMC91C111_INT,
143 .end = SMC91C111_INT,
144 .flags = IORESOURCE_IRQ
145 },
146};
147
148static struct platform_device smc91c111_device = {
149 .name = "smc91x",
150 .id = -1,
151 .num_resources = ARRAY_SIZE(smc91c111_resources),
152 .resource = smc91c111_resources
153};
154
155static struct platform_device *board_platform_devices[] __initdata = {
156 &ide_device,
157 &smc91c111_device
158};
159
160static int __init board_register_devices(void)
161{
162 return platform_add_devices(board_platform_devices,
163 ARRAY_SIZE(board_platform_devices));
164}
165
166arch_initcall(board_register_devices);
diff --git a/arch/mips/alchemy/devboards/pb1500/Makefile b/arch/mips/alchemy/devboards/pb1500/Makefile
new file mode 100644
index 000000000000..173b419a7479
--- /dev/null
+++ b/arch/mips/alchemy/devboards/pb1500/Makefile
@@ -0,0 +1,8 @@
1#
2# Copyright 2000, 2001, 2008 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. <source@mvista.com>
4#
5# Makefile for the Alchemy Semiconductor Pb1500 board.
6#
7
8obj-y := board_setup.o
diff --git a/arch/mips/alchemy/devboards/pb1500/board_setup.c b/arch/mips/alchemy/devboards/pb1500/board_setup.c
new file mode 100644
index 000000000000..fed3b093156a
--- /dev/null
+++ b/arch/mips/alchemy/devboards/pb1500/board_setup.c
@@ -0,0 +1,163 @@
1/*
2 * Copyright 2000, 2008 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc. <source@mvista.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26#include <linux/init.h>
27#include <linux/delay.h>
28#include <linux/interrupt.h>
29
30#include <asm/mach-au1x00/au1000.h>
31#include <asm/mach-pb1x00/pb1500.h>
32
33#include <prom.h>
34
35
36char irq_tab_alchemy[][5] __initdata = {
37 [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - HPT370 */
38 [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */
39};
40
41struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
42 { AU1500_GPIO_204, IRQF_TRIGGER_HIGH, 0 },
43 { AU1500_GPIO_201, IRQF_TRIGGER_LOW, 0 },
44 { AU1500_GPIO_202, IRQF_TRIGGER_LOW, 0 },
45 { AU1500_GPIO_203, IRQF_TRIGGER_LOW, 0 },
46 { AU1500_GPIO_205, IRQF_TRIGGER_LOW, 0 },
47};
48
49
50const char *get_system_type(void)
51{
52 return "Alchemy Pb1500";
53}
54
55void board_reset(void)
56{
57 /* Hit BCSR.RST_VDDI[SOFT_RESET] */
58 au_writel(0x00000000, PB1500_RST_VDDI);
59}
60
61void __init board_init_irq(void)
62{
63 au1xxx_setup_irqmap(au1xxx_irq_map, ARRAY_SIZE(au1xxx_irq_map));
64}
65
66void __init board_setup(void)
67{
68 u32 pin_func;
69 u32 sys_freqctrl, sys_clksrc;
70 char *argptr;
71
72 argptr = prom_getcmdline();
73#ifdef CONFIG_SERIAL_8250_CONSOLE
74 argptr = strstr(argptr, "console=");
75 if (argptr == NULL) {
76 argptr = prom_getcmdline();
77 strcat(argptr, " console=ttyS0,115200");
78 }
79#endif
80
81#if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000)
82 /* au1000 does not support vra, au1500 and au1100 do */
83 strcat(argptr, " au1000_audio=vra");
84 argptr = prom_getcmdline();
85#endif
86
87 sys_clksrc = sys_freqctrl = pin_func = 0;
88 /* Set AUX clock to 12 MHz * 8 = 96 MHz */
89 au_writel(8, SYS_AUXPLL);
90 au_writel(0, SYS_PINSTATERD);
91 udelay(100);
92
93#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
94
95 /* GPIO201 is input for PCMCIA card detect */
96 /* GPIO203 is input for PCMCIA interrupt request */
97 au_writel(au_readl(GPIO2_DIR) & ~((1 << 1) | (1 << 3)), GPIO2_DIR);
98
99 /* Zero and disable FREQ2 */
100 sys_freqctrl = au_readl(SYS_FREQCTRL0);
101 sys_freqctrl &= ~0xFFF00000;
102 au_writel(sys_freqctrl, SYS_FREQCTRL0);
103
104 /* zero and disable USBH/USBD clocks */
105 sys_clksrc = au_readl(SYS_CLKSRC);
106 sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
107 SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
108 au_writel(sys_clksrc, SYS_CLKSRC);
109
110 sys_freqctrl = au_readl(SYS_FREQCTRL0);
111 sys_freqctrl &= ~0xFFF00000;
112
113 sys_clksrc = au_readl(SYS_CLKSRC);
114 sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
115 SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
116
117 /* FREQ2 = aux/2 = 48 MHz */
118 sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) | SYS_FC_FE2 | SYS_FC_FS2;
119 au_writel(sys_freqctrl, SYS_FREQCTRL0);
120
121 /*
122 * Route 48MHz FREQ2 into USB Host and/or Device
123 */
124 sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MUH_BIT;
125 au_writel(sys_clksrc, SYS_CLKSRC);
126
127 pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB;
128 /* 2nd USB port is USB host */
129 pin_func |= SYS_PF_USB;
130 au_writel(pin_func, SYS_PINFUNC);
131#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
132
133#ifdef CONFIG_PCI
134 /* Setup PCI bus controller */
135 au_writel(0, Au1500_PCI_CMEM);
136 au_writel(0x00003fff, Au1500_CFG_BASE);
137#if defined(__MIPSEB__)
138 au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
139#else
140 au_writel(0xf, Au1500_PCI_CFG);
141#endif
142 au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV);
143 au_writel(0, Au1500_PCI_MWBASE_REV_CCL);
144 au_writel(0x02a00356, Au1500_PCI_STATCMD);
145 au_writel(0x00003c04, Au1500_PCI_HDRTYPE);
146 au_writel(0x00000008, Au1500_PCI_MBAR);
147 au_sync();
148#endif
149
150 /* Enable sys bus clock divider when IDLE state or no bus activity. */
151 au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
152
153 /* Enable the RTC if not already enabled */
154 if (!(au_readl(0xac000028) & 0x20)) {
155 printk(KERN_INFO "enabling clock ...\n");
156 au_writel((au_readl(0xac000028) | 0x20), 0xac000028);
157 }
158 /* Put the clock in BCD mode */
159 if (au_readl(0xac00002c) & 0x4) { /* reg B */
160 au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c);
161 au_sync();
162 }
163}
diff --git a/arch/mips/alchemy/devboards/pb1550/Makefile b/arch/mips/alchemy/devboards/pb1550/Makefile
new file mode 100644
index 000000000000..cff95bcdb2ca
--- /dev/null
+++ b/arch/mips/alchemy/devboards/pb1550/Makefile
@@ -0,0 +1,8 @@
1#
2# Copyright 2000, 2008 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. <source@mvista.com>
4#
5# Makefile for the Alchemy Semiconductor Pb1550 board.
6#
7
8obj-y := board_setup.o
diff --git a/arch/mips/alchemy/devboards/pb1550/board_setup.c b/arch/mips/alchemy/devboards/pb1550/board_setup.c
new file mode 100644
index 000000000000..b6e9e7d247a3
--- /dev/null
+++ b/arch/mips/alchemy/devboards/pb1550/board_setup.c
@@ -0,0 +1,92 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Alchemy Pb1550 board setup.
5 *
6 * Copyright 2000, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29
30#include <linux/init.h>
31#include <linux/interrupt.h>
32
33#include <asm/mach-au1x00/au1000.h>
34#include <asm/mach-pb1x00/pb1550.h>
35
36#include <prom.h>
37
38
39char irq_tab_alchemy[][5] __initdata = {
40 [12] = { -1, INTB, INTC, INTD, INTA }, /* IDSEL 12 - PCI slot 2 (left) */
41 [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot 1 (right) */
42};
43
44struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
45 { AU1000_GPIO_0, IRQF_TRIGGER_LOW, 0 },
46 { AU1000_GPIO_1, IRQF_TRIGGER_LOW, 0 },
47};
48
49const char *get_system_type(void)
50{
51 return "Alchemy Pb1550";
52}
53
54void board_reset(void)
55{
56 /* Hit BCSR.SYSTEM[RESET] */
57 au_writew(au_readw(0xAF00001C) & ~BCSR_SYSTEM_RESET, 0xAF00001C);
58}
59
60void __init board_init_irq(void)
61{
62 au1xxx_setup_irqmap(au1xxx_irq_map, ARRAY_SIZE(au1xxx_irq_map));
63}
64
65void __init board_setup(void)
66{
67 u32 pin_func;
68
69#ifdef CONFIG_SERIAL_8250_CONSOLE
70 char *argptr;
71 argptr = prom_getcmdline();
72 argptr = strstr(argptr, "console=");
73 if (argptr == NULL) {
74 argptr = prom_getcmdline();
75 strcat(argptr, " console=ttyS0,115200");
76 }
77#endif
78
79 /*
80 * Enable PSC1 SYNC for AC'97. Normaly done in audio driver,
81 * but it is board specific code, so put it here.
82 */
83 pin_func = au_readl(SYS_PINFUNC);
84 au_sync();
85 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
86 au_writel(pin_func, SYS_PINFUNC);
87
88 au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */
89 au_sync();
90
91 printk(KERN_INFO "AMD Alchemy Pb1550 Board\n");
92}
diff --git a/arch/mips/alchemy/devboards/pm.c b/arch/mips/alchemy/devboards/pm.c
new file mode 100644
index 000000000000..d5eb9c325ed0
--- /dev/null
+++ b/arch/mips/alchemy/devboards/pm.c
@@ -0,0 +1,229 @@
1/*
2 * Alchemy Development Board example suspend userspace interface.
3 *
4 * (c) 2008 Manuel Lauss <mano@roarinelk.homelinux.net>
5 */
6
7#include <linux/init.h>
8#include <linux/kobject.h>
9#include <linux/suspend.h>
10#include <linux/sysfs.h>
11#include <asm/mach-au1x00/au1000.h>
12
13/*
14 * Generic suspend userspace interface for Alchemy development boards.
15 * This code exports a few sysfs nodes under /sys/power/db1x/ which
16 * can be used by userspace to en/disable all au1x-provided wakeup
17 * sources and configure the timeout after which the the TOYMATCH2 irq
18 * is to trigger a wakeup.
19 */
20
21
22static unsigned long db1x_pm_sleep_secs;
23static unsigned long db1x_pm_wakemsk;
24static unsigned long db1x_pm_last_wakesrc;
25
26static int db1x_pm_enter(suspend_state_t state)
27{
28 /* enable GPIO based wakeup */
29 au_writel(1, SYS_PININPUTEN);
30
31 /* clear and setup wake cause and source */
32 au_writel(0, SYS_WAKEMSK);
33 au_sync();
34 au_writel(0, SYS_WAKESRC);
35 au_sync();
36
37 au_writel(db1x_pm_wakemsk, SYS_WAKEMSK);
38 au_sync();
39
40 /* setup 1Hz-timer-based wakeup: wait for reg access */
41 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20)
42 asm volatile ("nop");
43
44 au_writel(au_readl(SYS_TOYREAD) + db1x_pm_sleep_secs, SYS_TOYMATCH2);
45 au_sync();
46
47 /* wait for value to really hit the register */
48 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20)
49 asm volatile ("nop");
50
51 /* ...and now the sandman can come! */
52 au_sleep();
53
54 return 0;
55}
56
57static int db1x_pm_begin(suspend_state_t state)
58{
59 if (!db1x_pm_wakemsk) {
60 printk(KERN_ERR "db1x: no wakeup source activated!\n");
61 return -EINVAL;
62 }
63
64 return 0;
65}
66
67static void db1x_pm_end(void)
68{
69 /* read and store wakeup source, the clear the register. To
70 * be able to clear it, WAKEMSK must be cleared first.
71 */
72 db1x_pm_last_wakesrc = au_readl(SYS_WAKESRC);
73
74 au_writel(0, SYS_WAKEMSK);
75 au_writel(0, SYS_WAKESRC);
76 au_sync();
77
78}
79
80static struct platform_suspend_ops db1x_pm_ops = {
81 .valid = suspend_valid_only_mem,
82 .begin = db1x_pm_begin,
83 .enter = db1x_pm_enter,
84 .end = db1x_pm_end,
85};
86
87#define ATTRCMP(x) (0 == strcmp(attr->attr.name, #x))
88
89static ssize_t db1x_pmattr_show(struct kobject *kobj,
90 struct kobj_attribute *attr,
91 char *buf)
92{
93 int idx;
94
95 if (ATTRCMP(timer_timeout))
96 return sprintf(buf, "%lu\n", db1x_pm_sleep_secs);
97
98 else if (ATTRCMP(timer))
99 return sprintf(buf, "%u\n",
100 !!(db1x_pm_wakemsk & SYS_WAKEMSK_M2));
101
102 else if (ATTRCMP(wakesrc))
103 return sprintf(buf, "%lu\n", db1x_pm_last_wakesrc);
104
105 else if (ATTRCMP(gpio0) || ATTRCMP(gpio1) || ATTRCMP(gpio2) ||
106 ATTRCMP(gpio3) || ATTRCMP(gpio4) || ATTRCMP(gpio5) ||
107 ATTRCMP(gpio6) || ATTRCMP(gpio7)) {
108 idx = (attr->attr.name)[4] - '0';
109 return sprintf(buf, "%d\n",
110 !!(db1x_pm_wakemsk & SYS_WAKEMSK_GPIO(idx)));
111
112 } else if (ATTRCMP(wakemsk)) {
113 return sprintf(buf, "%08lx\n", db1x_pm_wakemsk);
114 }
115
116 return -ENOENT;
117}
118
119static ssize_t db1x_pmattr_store(struct kobject *kobj,
120 struct kobj_attribute *attr,
121 const char *instr,
122 size_t bytes)
123{
124 unsigned long l;
125 int tmp;
126
127 if (ATTRCMP(timer_timeout)) {
128 tmp = strict_strtoul(instr, 0, &l);
129 if (tmp)
130 return tmp;
131
132 db1x_pm_sleep_secs = l;
133
134 } else if (ATTRCMP(timer)) {
135 if (instr[0] != '0')
136 db1x_pm_wakemsk |= SYS_WAKEMSK_M2;
137 else
138 db1x_pm_wakemsk &= ~SYS_WAKEMSK_M2;
139
140 } else if (ATTRCMP(gpio0) || ATTRCMP(gpio1) || ATTRCMP(gpio2) ||
141 ATTRCMP(gpio3) || ATTRCMP(gpio4) || ATTRCMP(gpio5) ||
142 ATTRCMP(gpio6) || ATTRCMP(gpio7)) {
143 tmp = (attr->attr.name)[4] - '0';
144 if (instr[0] != '0') {
145 db1x_pm_wakemsk |= SYS_WAKEMSK_GPIO(tmp);
146 } else {
147 db1x_pm_wakemsk &= ~SYS_WAKEMSK_GPIO(tmp);
148 }
149
150 } else if (ATTRCMP(wakemsk)) {
151 tmp = strict_strtoul(instr, 0, &l);
152 if (tmp)
153 return tmp;
154
155 db1x_pm_wakemsk = l & 0x0000003f;
156
157 } else
158 bytes = -ENOENT;
159
160 return bytes;
161}
162
163#define ATTR(x) \
164 static struct kobj_attribute x##_attribute = \
165 __ATTR(x, 0664, db1x_pmattr_show, \
166 db1x_pmattr_store);
167
168ATTR(gpio0) /* GPIO-based wakeup enable */
169ATTR(gpio1)
170ATTR(gpio2)
171ATTR(gpio3)
172ATTR(gpio4)
173ATTR(gpio5)
174ATTR(gpio6)
175ATTR(gpio7)
176ATTR(timer) /* TOYMATCH2-based wakeup enable */
177ATTR(timer_timeout) /* timer-based wakeup timeout value, in seconds */
178ATTR(wakesrc) /* contents of SYS_WAKESRC after last wakeup */
179ATTR(wakemsk) /* direct access to SYS_WAKEMSK */
180
181#define ATTR_LIST(x) & x ## _attribute.attr
182static struct attribute *db1x_pmattrs[] = {
183 ATTR_LIST(gpio0),
184 ATTR_LIST(gpio1),
185 ATTR_LIST(gpio2),
186 ATTR_LIST(gpio3),
187 ATTR_LIST(gpio4),
188 ATTR_LIST(gpio5),
189 ATTR_LIST(gpio6),
190 ATTR_LIST(gpio7),
191 ATTR_LIST(timer),
192 ATTR_LIST(timer_timeout),
193 ATTR_LIST(wakesrc),
194 ATTR_LIST(wakemsk),
195 NULL, /* terminator */
196};
197
198static struct attribute_group db1x_pmattr_group = {
199 .name = "db1x",
200 .attrs = db1x_pmattrs,
201};
202
203/*
204 * Initialize suspend interface
205 */
206static int __init pm_init(void)
207{
208 /* init TOY to tick at 1Hz if not already done. No need to wait
209 * for confirmation since there's plenty of time from here to
210 * the next suspend cycle.
211 */
212 if (au_readl(SYS_TOYTRIM) != 32767) {
213 au_writel(32767, SYS_TOYTRIM);
214 au_sync();
215 }
216
217 db1x_pm_last_wakesrc = au_readl(SYS_WAKESRC);
218
219 au_writel(0, SYS_WAKESRC);
220 au_sync();
221 au_writel(0, SYS_WAKEMSK);
222 au_sync();
223
224 suspend_set_ops(&db1x_pm_ops);
225
226 return sysfs_create_group(power_kobj, &db1x_pmattr_group);
227}
228
229late_initcall(pm_init);
diff --git a/arch/mips/alchemy/devboards/prom.c b/arch/mips/alchemy/devboards/prom.c
new file mode 100644
index 000000000000..0042bd6b1d7d
--- /dev/null
+++ b/arch/mips/alchemy/devboards/prom.c
@@ -0,0 +1,62 @@
1/*
2 * Common code used by all Alchemy develboards.
3 *
4 * Extracted from files which had this to say:
5 *
6 * Copyright 2000, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29
30#include <linux/init.h>
31#include <linux/kernel.h>
32#include <asm/bootinfo.h>
33#include <asm/mach-au1x00/au1000.h>
34#include <prom.h>
35
36#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_DB1000) || \
37 defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_DB1100) || \
38 defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_DB1500) || \
39 defined(CONFIG_MIPS_BOSPORUS) || defined(CONFIG_MIPS_MIRAGE)
40#define ALCHEMY_BOARD_DEFAULT_MEMSIZE 0x04000000
41
42#else /* Au1550/Au1200-based develboards */
43#define ALCHEMY_BOARD_DEFAULT_MEMSIZE 0x08000000
44#endif
45
46void __init prom_init(void)
47{
48 unsigned char *memsize_str;
49 unsigned long memsize;
50
51 prom_argc = (int)fw_arg0;
52 prom_argv = (char **)fw_arg1;
53 prom_envp = (char **)fw_arg2;
54
55 prom_init_cmdline();
56 memsize_str = prom_getenv("memsize");
57 if (!memsize_str)
58 memsize = ALCHEMY_BOARD_DEFAULT_MEMSIZE;
59 else
60 strict_strtoul(memsize_str, 0, &memsize);
61 add_memory_region(0, memsize, BOOT_MEM_RAM);
62}
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-20 08:39:07 -0500