diff options
Diffstat (limited to 'arch/mips/alchemy/devboards/pm.c')
-rw-r--r-- | arch/mips/alchemy/devboards/pm.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/mips/alchemy/devboards/pm.c b/arch/mips/alchemy/devboards/pm.c index 632f9862a0fb..4bbd3133e451 100644 --- a/arch/mips/alchemy/devboards/pm.c +++ b/arch/mips/alchemy/devboards/pm.c | |||
@@ -10,6 +10,7 @@ | |||
10 | #include <linux/sysfs.h> | 10 | #include <linux/sysfs.h> |
11 | #include <asm/mach-au1x00/au1000.h> | 11 | #include <asm/mach-au1x00/au1000.h> |
12 | #include <asm/mach-au1x00/gpio.h> | 12 | #include <asm/mach-au1x00/gpio.h> |
13 | #include <asm/mach-db1x00/bcsr.h> | ||
13 | 14 | ||
14 | /* | 15 | /* |
15 | * Generic suspend userspace interface for Alchemy development boards. | 16 | * Generic suspend userspace interface for Alchemy development boards. |
@@ -26,6 +27,20 @@ static unsigned long db1x_pm_last_wakesrc; | |||
26 | 27 | ||
27 | static int db1x_pm_enter(suspend_state_t state) | 28 | static int db1x_pm_enter(suspend_state_t state) |
28 | { | 29 | { |
30 | unsigned short bcsrs[16]; | ||
31 | int i, j, hasint; | ||
32 | |||
33 | /* save CPLD regs */ | ||
34 | hasint = bcsr_read(BCSR_WHOAMI); | ||
35 | hasint = BCSR_WHOAMI_BOARD(hasint) >= BCSR_WHOAMI_DB1200; | ||
36 | j = (hasint) ? BCSR_MASKSET : BCSR_SYSTEM; | ||
37 | |||
38 | for (i = BCSR_STATUS; i <= j; i++) | ||
39 | bcsrs[i] = bcsr_read(i); | ||
40 | |||
41 | /* shut off hexleds */ | ||
42 | bcsr_write(BCSR_HEXCLEAR, 3); | ||
43 | |||
29 | /* enable GPIO based wakeup */ | 44 | /* enable GPIO based wakeup */ |
30 | alchemy_gpio1_input_enable(); | 45 | alchemy_gpio1_input_enable(); |
31 | 46 | ||
@@ -52,6 +67,23 @@ static int db1x_pm_enter(suspend_state_t state) | |||
52 | /* ...and now the sandman can come! */ | 67 | /* ...and now the sandman can come! */ |
53 | au_sleep(); | 68 | au_sleep(); |
54 | 69 | ||
70 | |||
71 | /* restore CPLD regs */ | ||
72 | for (i = BCSR_STATUS; i <= BCSR_SYSTEM; i++) | ||
73 | bcsr_write(i, bcsrs[i]); | ||
74 | |||
75 | /* restore CPLD int registers */ | ||
76 | if (hasint) { | ||
77 | bcsr_write(BCSR_INTCLR, 0xffff); | ||
78 | bcsr_write(BCSR_MASKCLR, 0xffff); | ||
79 | bcsr_write(BCSR_INTSTAT, 0xffff); | ||
80 | bcsr_write(BCSR_INTSET, bcsrs[BCSR_INTSET]); | ||
81 | bcsr_write(BCSR_MASKSET, bcsrs[BCSR_MASKSET]); | ||
82 | } | ||
83 | |||
84 | /* light up hexleds */ | ||
85 | bcsr_write(BCSR_HEXCLEAR, 0); | ||
86 | |||
55 | return 0; | 87 | return 0; |
56 | } | 88 | } |
57 | 89 | ||