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-rw-r--r--arch/mips/alchemy/devboards/pb1200.c471
1 files changed, 0 insertions, 471 deletions
diff --git a/arch/mips/alchemy/devboards/pb1200.c b/arch/mips/alchemy/devboards/pb1200.c
deleted file mode 100644
index a2676c95053b..000000000000
--- a/arch/mips/alchemy/devboards/pb1200.c
+++ /dev/null
@@ -1,471 +0,0 @@
1/*
2 * Pb1200/DBAu1200 board platform device registration
3 *
4 * Copyright (C) 2008 MontaVista Software Inc. <source@mvista.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <linux/dma-mapping.h>
22#include <linux/init.h>
23#include <linux/interrupt.h>
24#include <linux/leds.h>
25#include <linux/platform_device.h>
26#include <linux/smc91x.h>
27#include <asm/mach-au1x00/au1000.h>
28#include <asm/mach-au1x00/au1100_mmc.h>
29#include <asm/mach-au1x00/au1200fb.h>
30#include <asm/mach-au1x00/au1xxx_dbdma.h>
31#include <asm/mach-db1x00/bcsr.h>
32#include <asm/mach-pb1x00/pb1200.h>
33#include <prom.h>
34#include "platform.h"
35
36
37const char *get_system_type(void)
38{
39 return "PB1200";
40}
41
42void __init board_setup(void)
43{
44 printk(KERN_INFO "AMD Alchemy Pb1200 Board\n");
45 bcsr_init(PB1200_BCSR_PHYS_ADDR,
46 PB1200_BCSR_PHYS_ADDR + PB1200_BCSR_HEXLED_OFS);
47
48#if 0
49 {
50 u32 pin_func;
51
52 /*
53 * Enable PSC1 SYNC for AC97. Normaly done in audio driver,
54 * but it is board specific code, so put it here.
55 */
56 pin_func = au_readl(SYS_PINFUNC);
57 au_sync();
58 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
59 au_writel(pin_func, SYS_PINFUNC);
60
61 au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */
62 au_sync();
63 }
64#endif
65
66#if defined(CONFIG_I2C_AU1550)
67 {
68 u32 freq0, clksrc;
69 u32 pin_func;
70
71 /* Select SMBus in CPLD */
72 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
73
74 pin_func = au_readl(SYS_PINFUNC);
75 au_sync();
76 pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
77 /* Set GPIOs correctly */
78 pin_func |= 2 << 17;
79 au_writel(pin_func, SYS_PINFUNC);
80 au_sync();
81
82 /* The I2C driver depends on 50 MHz clock */
83 freq0 = au_readl(SYS_FREQCTRL0);
84 au_sync();
85 freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
86 freq0 |= 3 << SYS_FC_FRDIV1_BIT;
87 /* 396 MHz / (3 + 1) * 2 == 49.5 MHz */
88 au_writel(freq0, SYS_FREQCTRL0);
89 au_sync();
90 freq0 |= SYS_FC_FE1;
91 au_writel(freq0, SYS_FREQCTRL0);
92 au_sync();
93
94 clksrc = au_readl(SYS_CLKSRC);
95 au_sync();
96 clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK);
97 /* Bit 22 is EXTCLK0 for PSC0 */
98 clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT;
99 au_writel(clksrc, SYS_CLKSRC);
100 au_sync();
101 }
102#endif
103
104 /*
105 * The Pb1200 development board uses external MUX for PSC0 to
106 * support SMB/SPI. bcsr_resets bit 12: 0=SMB 1=SPI
107 */
108#ifdef CONFIG_I2C_AU1550
109 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
110#endif
111 au_sync();
112}
113
114/******************************************************************************/
115
116static int mmc_activity;
117
118static void pb1200mmc0_set_power(void *mmc_host, int state)
119{
120 if (state)
121 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD0PWR);
122 else
123 bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD0PWR, 0);
124
125 msleep(1);
126}
127
128static int pb1200mmc0_card_readonly(void *mmc_host)
129{
130 return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP) ? 1 : 0;
131}
132
133static int pb1200mmc0_card_inserted(void *mmc_host)
134{
135 return (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD0INSERT) ? 1 : 0;
136}
137
138static void pb1200_mmcled_set(struct led_classdev *led,
139 enum led_brightness brightness)
140{
141 if (brightness != LED_OFF) {
142 if (++mmc_activity == 1)
143 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
144 } else {
145 if (--mmc_activity == 0)
146 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
147 }
148}
149
150static struct led_classdev pb1200mmc_led = {
151 .brightness_set = pb1200_mmcled_set,
152};
153
154static void pb1200mmc1_set_power(void *mmc_host, int state)
155{
156 if (state)
157 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD1PWR);
158 else
159 bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD1PWR, 0);
160
161 msleep(1);
162}
163
164static int pb1200mmc1_card_readonly(void *mmc_host)
165{
166 return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD1WP) ? 1 : 0;
167}
168
169static int pb1200mmc1_card_inserted(void *mmc_host)
170{
171 return (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD1INSERT) ? 1 : 0;
172}
173
174static struct au1xmmc_platform_data pb1200mmc_platdata[2] = {
175 [0] = {
176 .set_power = pb1200mmc0_set_power,
177 .card_inserted = pb1200mmc0_card_inserted,
178 .card_readonly = pb1200mmc0_card_readonly,
179 .cd_setup = NULL, /* use poll-timer in driver */
180 .led = &pb1200mmc_led,
181 },
182 [1] = {
183 .set_power = pb1200mmc1_set_power,
184 .card_inserted = pb1200mmc1_card_inserted,
185 .card_readonly = pb1200mmc1_card_readonly,
186 .cd_setup = NULL, /* use poll-timer in driver */
187 .led = &pb1200mmc_led,
188 },
189};
190
191static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32);
192
193static struct resource au1200_mmc0_res[] = {
194 [0] = {
195 .start = AU1100_SD0_PHYS_ADDR,
196 .end = AU1100_SD0_PHYS_ADDR + 0xfff,
197 .flags = IORESOURCE_MEM,
198 },
199 [1] = {
200 .start = AU1200_SD_INT,
201 .end = AU1200_SD_INT,
202 .flags = IORESOURCE_IRQ,
203 },
204 [2] = {
205 .start = AU1200_DSCR_CMD0_SDMS_TX0,
206 .end = AU1200_DSCR_CMD0_SDMS_TX0,
207 .flags = IORESOURCE_DMA,
208 },
209 [3] = {
210 .start = AU1200_DSCR_CMD0_SDMS_RX0,
211 .end = AU1200_DSCR_CMD0_SDMS_RX0,
212 .flags = IORESOURCE_DMA,
213 }
214};
215
216static struct platform_device pb1200_mmc0_dev = {
217 .name = "au1xxx-mmc",
218 .id = 0,
219 .dev = {
220 .dma_mask = &au1xxx_mmc_dmamask,
221 .coherent_dma_mask = DMA_BIT_MASK(32),
222 .platform_data = &pb1200mmc_platdata[0],
223 },
224 .num_resources = ARRAY_SIZE(au1200_mmc0_res),
225 .resource = au1200_mmc0_res,
226};
227
228static struct resource au1200_mmc1_res[] = {
229 [0] = {
230 .start = AU1100_SD1_PHYS_ADDR,
231 .end = AU1100_SD1_PHYS_ADDR + 0xfff,
232 .flags = IORESOURCE_MEM,
233 },
234 [1] = {
235 .start = AU1200_SD_INT,
236 .end = AU1200_SD_INT,
237 .flags = IORESOURCE_IRQ,
238 },
239 [2] = {
240 .start = AU1200_DSCR_CMD0_SDMS_TX1,
241 .end = AU1200_DSCR_CMD0_SDMS_TX1,
242 .flags = IORESOURCE_DMA,
243 },
244 [3] = {
245 .start = AU1200_DSCR_CMD0_SDMS_RX1,
246 .end = AU1200_DSCR_CMD0_SDMS_RX1,
247 .flags = IORESOURCE_DMA,
248 }
249};
250
251static struct platform_device pb1200_mmc1_dev = {
252 .name = "au1xxx-mmc",
253 .id = 1,
254 .dev = {
255 .dma_mask = &au1xxx_mmc_dmamask,
256 .coherent_dma_mask = DMA_BIT_MASK(32),
257 .platform_data = &pb1200mmc_platdata[1],
258 },
259 .num_resources = ARRAY_SIZE(au1200_mmc1_res),
260 .resource = au1200_mmc1_res,
261};
262
263
264static struct resource ide_resources[] = {
265 [0] = {
266 .start = IDE_PHYS_ADDR,
267 .end = IDE_PHYS_ADDR + IDE_PHYS_LEN - 1,
268 .flags = IORESOURCE_MEM
269 },
270 [1] = {
271 .start = IDE_INT,
272 .end = IDE_INT,
273 .flags = IORESOURCE_IRQ
274 },
275 [2] = {
276 .start = AU1200_DSCR_CMD0_DMA_REQ1,
277 .end = AU1200_DSCR_CMD0_DMA_REQ1,
278 .flags = IORESOURCE_DMA,
279 },
280};
281
282static u64 au1200_ide_dmamask = DMA_BIT_MASK(32);
283
284static struct platform_device ide_device = {
285 .name = "au1200-ide",
286 .id = 0,
287 .dev = {
288 .dma_mask = &au1200_ide_dmamask,
289 .coherent_dma_mask = DMA_BIT_MASK(32),
290 },
291 .num_resources = ARRAY_SIZE(ide_resources),
292 .resource = ide_resources
293};
294
295static struct smc91x_platdata smc_data = {
296 .flags = SMC91X_NOWAIT | SMC91X_USE_16BIT,
297 .leda = RPC_LED_100_10,
298 .ledb = RPC_LED_TX_RX,
299};
300
301static struct resource smc91c111_resources[] = {
302 [0] = {
303 .name = "smc91x-regs",
304 .start = SMC91C111_PHYS_ADDR,
305 .end = SMC91C111_PHYS_ADDR + 0xf,
306 .flags = IORESOURCE_MEM
307 },
308 [1] = {
309 .start = SMC91C111_INT,
310 .end = SMC91C111_INT,
311 .flags = IORESOURCE_IRQ
312 },
313};
314
315static struct platform_device smc91c111_device = {
316 .dev = {
317 .platform_data = &smc_data,
318 },
319 .name = "smc91x",
320 .id = -1,
321 .num_resources = ARRAY_SIZE(smc91c111_resources),
322 .resource = smc91c111_resources
323};
324
325static struct resource au1200_psc0_res[] = {
326 [0] = {
327 .start = AU1550_PSC0_PHYS_ADDR,
328 .end = AU1550_PSC0_PHYS_ADDR + 0xfff,
329 .flags = IORESOURCE_MEM,
330 },
331 [1] = {
332 .start = AU1200_PSC0_INT,
333 .end = AU1200_PSC0_INT,
334 .flags = IORESOURCE_IRQ,
335 },
336 [2] = {
337 .start = AU1200_DSCR_CMD0_PSC0_TX,
338 .end = AU1200_DSCR_CMD0_PSC0_TX,
339 .flags = IORESOURCE_DMA,
340 },
341 [3] = {
342 .start = AU1200_DSCR_CMD0_PSC0_RX,
343 .end = AU1200_DSCR_CMD0_PSC0_RX,
344 .flags = IORESOURCE_DMA,
345 },
346};
347
348static struct platform_device pb1200_i2c_dev = {
349 .name = "au1xpsc_smbus",
350 .id = 0, /* bus number */
351 .num_resources = ARRAY_SIZE(au1200_psc0_res),
352 .resource = au1200_psc0_res,
353};
354
355static int pb1200fb_panel_index(void)
356{
357 return (bcsr_read(BCSR_SWITCHES) >> 8) & 0x0f;
358}
359
360static int pb1200fb_panel_init(void)
361{
362 /* Apply power */
363 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
364 BCSR_BOARD_LCDBL);
365 return 0;
366}
367
368static int pb1200fb_panel_shutdown(void)
369{
370 /* Remove power */
371 bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
372 BCSR_BOARD_LCDBL, 0);
373 return 0;
374}
375
376static struct au1200fb_platdata pb1200fb_pd = {
377 .panel_index = pb1200fb_panel_index,
378 .panel_init = pb1200fb_panel_init,
379 .panel_shutdown = pb1200fb_panel_shutdown,
380};
381
382static struct resource au1200_lcd_res[] = {
383 [0] = {
384 .start = AU1200_LCD_PHYS_ADDR,
385 .end = AU1200_LCD_PHYS_ADDR + 0x800 - 1,
386 .flags = IORESOURCE_MEM,
387 },
388 [1] = {
389 .start = AU1200_LCD_INT,
390 .end = AU1200_LCD_INT,
391 .flags = IORESOURCE_IRQ,
392 }
393};
394
395static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32);
396
397static struct platform_device pb1200_lcd_dev = {
398 .name = "au1200-lcd",
399 .id = 0,
400 .dev = {
401 .dma_mask = &au1200_lcd_dmamask,
402 .coherent_dma_mask = DMA_BIT_MASK(32),
403 .platform_data = &pb1200fb_pd,
404 },
405 .num_resources = ARRAY_SIZE(au1200_lcd_res),
406 .resource = au1200_lcd_res,
407};
408
409static struct platform_device *board_platform_devices[] __initdata = {
410 &ide_device,
411 &smc91c111_device,
412 &pb1200_i2c_dev,
413 &pb1200_mmc0_dev,
414 &pb1200_mmc1_dev,
415 &pb1200_lcd_dev,
416};
417
418static int __init board_register_devices(void)
419{
420 int swapped;
421
422 /* We have a problem with CPLD rev 3. */
423 if (BCSR_WHOAMI_CPLD(bcsr_read(BCSR_WHOAMI)) <= 3) {
424 printk(KERN_ERR "WARNING!!!\n");
425 printk(KERN_ERR "WARNING!!!\n");
426 printk(KERN_ERR "WARNING!!!\n");
427 printk(KERN_ERR "WARNING!!!\n");
428 printk(KERN_ERR "WARNING!!!\n");
429 printk(KERN_ERR "WARNING!!!\n");
430 printk(KERN_ERR "Pb1200 must be at CPLD rev 4. Please have Pb1200\n");
431 printk(KERN_ERR "updated to latest revision. This software will\n");
432 printk(KERN_ERR "not work on anything less than CPLD rev 4.\n");
433 printk(KERN_ERR "WARNING!!!\n");
434 printk(KERN_ERR "WARNING!!!\n");
435 printk(KERN_ERR "WARNING!!!\n");
436 printk(KERN_ERR "WARNING!!!\n");
437 printk(KERN_ERR "WARNING!!!\n");
438 printk(KERN_ERR "WARNING!!!\n");
439 panic("Game over. Your score is 0.");
440 }
441
442 irq_set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW);
443 bcsr_init_irq(PB1200_INT_BEGIN, PB1200_INT_END, AU1200_GPIO7_INT);
444
445 db1x_register_pcmcia_socket(
446 AU1000_PCMCIA_ATTR_PHYS_ADDR,
447 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
448 AU1000_PCMCIA_MEM_PHYS_ADDR,
449 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
450 AU1000_PCMCIA_IO_PHYS_ADDR,
451 AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
452 PB1200_PC0_INT, PB1200_PC0_INSERT_INT,
453 /*PB1200_PC0_STSCHG_INT*/0, PB1200_PC0_EJECT_INT, 0);
454
455 db1x_register_pcmcia_socket(
456 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x008000000,
457 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x008400000 - 1,
458 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x008000000,
459 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x008400000 - 1,
460 AU1000_PCMCIA_IO_PHYS_ADDR + 0x008000000,
461 AU1000_PCMCIA_IO_PHYS_ADDR + 0x008010000 - 1,
462 PB1200_PC1_INT, PB1200_PC1_INSERT_INT,
463 /*PB1200_PC1_STSCHG_INT*/0, PB1200_PC1_EJECT_INT, 1);
464
465 swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT;
466 db1x_register_norflash(128 * 1024 * 1024, 2, swapped);
467
468 return platform_add_devices(board_platform_devices,
469 ARRAY_SIZE(board_platform_devices));
470}
471device_initcall(board_register_devices);
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-29 01:59:29 -0500