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-rw-r--r--arch/mips/alchemy/common/clock.c7
-rw-r--r--arch/mips/alchemy/common/setup.c6
2 files changed, 6 insertions, 7 deletions
diff --git a/arch/mips/alchemy/common/clock.c b/arch/mips/alchemy/common/clock.c
index d7557cde271a..203e4403c366 100644
--- a/arch/mips/alchemy/common/clock.c
+++ b/arch/mips/alchemy/common/clock.c
@@ -37,7 +37,6 @@
37#include <linux/io.h> 37#include <linux/io.h>
38#include <linux/clk-provider.h> 38#include <linux/clk-provider.h>
39#include <linux/clkdev.h> 39#include <linux/clkdev.h>
40#include <linux/clk-private.h>
41#include <linux/slab.h> 40#include <linux/slab.h>
42#include <linux/spinlock.h> 41#include <linux/spinlock.h>
43#include <linux/types.h> 42#include <linux/types.h>
@@ -397,10 +396,10 @@ static long alchemy_clk_fgcs_detr(struct clk_hw *hw, unsigned long rate,
397 break; 396 break;
398 397
399 /* if this parent is currently unused, remember it. 398 /* if this parent is currently unused, remember it.
400 * XXX: I know it's a layering violation, but it works 399 * XXX: we would actually want clk_has_active_children()
401 * so well.. (if (!clk_has_active_children(pc)) ) 400 * but this is a good-enough approximation for now.
402 */ 401 */
403 if (pc->prepare_count == 0) { 402 if (!__clk_is_prepared(pc)) {
404 if (!free) 403 if (!free)
405 free = pc; 404 free = pc;
406 } 405 }
diff --git a/arch/mips/alchemy/common/setup.c b/arch/mips/alchemy/common/setup.c
index ea8f41869e56..4e72daf12c32 100644
--- a/arch/mips/alchemy/common/setup.c
+++ b/arch/mips/alchemy/common/setup.c
@@ -70,9 +70,9 @@ void __init plat_mem_setup(void)
70 iomem_resource.end = IOMEM_RESOURCE_END; 70 iomem_resource.end = IOMEM_RESOURCE_END;
71} 71}
72 72
73#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_PCI) 73#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_PCI)
74/* This routine should be valid for all Au1x based boards */ 74/* This routine should be valid for all Au1x based boards */
75phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size) 75phys_addr_t __fixup_bigphys_addr(phys_addr_t phys_addr, phys_addr_t size)
76{ 76{
77 unsigned long start = ALCHEMY_PCI_MEMWIN_START; 77 unsigned long start = ALCHEMY_PCI_MEMWIN_START;
78 unsigned long end = ALCHEMY_PCI_MEMWIN_END; 78 unsigned long end = ALCHEMY_PCI_MEMWIN_END;
@@ -83,7 +83,7 @@ phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
83 83
84 /* Check for PCI memory window */ 84 /* Check for PCI memory window */
85 if (phys_addr >= start && (phys_addr + size - 1) <= end) 85 if (phys_addr >= start && (phys_addr + size - 1) <= end)
86 return (phys_t)(AU1500_PCI_MEM_PHYS_ADDR + phys_addr); 86 return (phys_addr_t)(AU1500_PCI_MEM_PHYS_ADDR + phys_addr);
87 87
88 /* default nop */ 88 /* default nop */
89 return phys_addr; 89 return phys_addr;