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-rw-r--r--arch/mips/alchemy/common/setup.c26
1 files changed, 1 insertions, 25 deletions
diff --git a/arch/mips/alchemy/common/setup.c b/arch/mips/alchemy/common/setup.c
index 9889ec3ba4c4..4d42be811e7f 100644
--- a/arch/mips/alchemy/common/setup.c
+++ b/arch/mips/alchemy/common/setup.c
@@ -44,37 +44,13 @@ extern void set_cpuspec(void);
44 44
45void __init plat_mem_setup(void) 45void __init plat_mem_setup(void)
46{ 46{
47 struct cpu_spec *sp;
48 unsigned long prid, cpufreq, bclk;
49
50 set_cpuspec();
51 sp = cur_cpu_spec[0];
52
53 _machine_restart = au1000_restart; 47 _machine_restart = au1000_restart;
54 _machine_halt = au1000_halt; 48 _machine_halt = au1000_halt;
55 pm_power_off = au1000_power_off; 49 pm_power_off = au1000_power_off;
56 50
57 board_setup(); /* board specific setup */ 51 board_setup(); /* board specific setup */
58 52
59 prid = read_c0_prid(); 53 if (au1xxx_cpu_needs_config_od())
60 if (sp->cpu_pll_wo)
61#ifdef CONFIG_SOC_AU1000_FREQUENCY
62 cpufreq = CONFIG_SOC_AU1000_FREQUENCY / 1000000;
63#else
64 cpufreq = 396;
65#endif
66 else
67 cpufreq = (au_readl(SYS_CPUPLL) & 0x3F) * 12;
68 printk(KERN_INFO "(PRID %08lx) @ %ld MHz\n", prid, cpufreq);
69
70 if (sp->cpu_bclk) {
71 /* Enable BCLK switching */
72 bclk = au_readl(SYS_POWERCTRL);
73 au_writel(bclk | 0x60, SYS_POWERCTRL);
74 printk(KERN_INFO "BCLK switching enabled!\n");
75 }
76
77 if (sp->cpu_od)
78 /* Various early Au1xx0 errata corrected by this */ 54 /* Various early Au1xx0 errata corrected by this */
79 set_c0_config(1 << 19); /* Set Config[OD] */ 55 set_c0_config(1 << 19); /* Set Config[OD] */
80 else 56 else