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-rw-r--r--arch/mips/alchemy/common/power.c16
1 files changed, 0 insertions, 16 deletions
diff --git a/arch/mips/alchemy/common/power.c b/arch/mips/alchemy/common/power.c
index 6ab7b42aa1be..14eb8c492da2 100644
--- a/arch/mips/alchemy/common/power.c
+++ b/arch/mips/alchemy/common/power.c
@@ -36,9 +36,6 @@
36 36
37#include <asm/uaccess.h> 37#include <asm/uaccess.h>
38#include <asm/mach-au1x00/au1000.h> 38#include <asm/mach-au1x00/au1000.h>
39#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
40#include <asm/mach-au1x00/au1xxx_dbdma.h>
41#endif
42 39
43#ifdef CONFIG_PM 40#ifdef CONFIG_PM
44 41
@@ -106,9 +103,6 @@ static void save_core_regs(void)
106 sleep_usb[1] = au_readl(0xb4020024); /* OTG_MUX */ 103 sleep_usb[1] = au_readl(0xb4020024); /* OTG_MUX */
107#endif 104#endif
108 105
109 /* Save interrupt controller state. */
110 save_au1xxx_intctl();
111
112 /* Clocks and PLLs. */ 106 /* Clocks and PLLs. */
113 sleep_sys_clocks[0] = au_readl(SYS_FREQCTRL0); 107 sleep_sys_clocks[0] = au_readl(SYS_FREQCTRL0);
114 sleep_sys_clocks[1] = au_readl(SYS_FREQCTRL1); 108 sleep_sys_clocks[1] = au_readl(SYS_FREQCTRL1);
@@ -132,10 +126,6 @@ static void save_core_regs(void)
132 sleep_static_memctlr[3][0] = au_readl(MEM_STCFG3); 126 sleep_static_memctlr[3][0] = au_readl(MEM_STCFG3);
133 sleep_static_memctlr[3][1] = au_readl(MEM_STTIME3); 127 sleep_static_memctlr[3][1] = au_readl(MEM_STTIME3);
134 sleep_static_memctlr[3][2] = au_readl(MEM_STADDR3); 128 sleep_static_memctlr[3][2] = au_readl(MEM_STADDR3);
135
136#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
137 au1xxx_dbdma_suspend();
138#endif
139} 129}
140 130
141static void restore_core_regs(void) 131static void restore_core_regs(void)
@@ -199,12 +189,6 @@ static void restore_core_regs(void)
199 au_writel(sleep_uart0_linectl, UART0_ADDR + UART_LCR); au_sync(); 189 au_writel(sleep_uart0_linectl, UART0_ADDR + UART_LCR); au_sync();
200 au_writel(sleep_uart0_clkdiv, UART0_ADDR + UART_CLK); au_sync(); 190 au_writel(sleep_uart0_clkdiv, UART0_ADDR + UART_CLK); au_sync();
201 } 191 }
202
203 restore_au1xxx_intctl();
204
205#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
206 au1xxx_dbdma_resume();
207#endif
208} 192}
209 193
210void au_sleep(void) 194void au_sleep(void)