diff options
Diffstat (limited to 'arch/mips/alchemy/common/platform.c')
| -rw-r--r-- | arch/mips/alchemy/common/platform.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c index 1dc55ee2681b..3691630931d6 100644 --- a/arch/mips/alchemy/common/platform.c +++ b/arch/mips/alchemy/common/platform.c | |||
| @@ -24,6 +24,33 @@ | |||
| 24 | 24 | ||
| 25 | #include <prom.h> | 25 | #include <prom.h> |
| 26 | 26 | ||
| 27 | static void alchemy_8250_pm(struct uart_port *port, unsigned int state, | ||
| 28 | unsigned int old_state) | ||
| 29 | { | ||
| 30 | switch (state) { | ||
| 31 | case 0: | ||
| 32 | if ((__raw_readl(port->membase + UART_MOD_CNTRL) & 3) != 3) { | ||
| 33 | /* power-on sequence as suggested in the databooks */ | ||
| 34 | __raw_writel(0, port->membase + UART_MOD_CNTRL); | ||
| 35 | wmb(); | ||
| 36 | __raw_writel(1, port->membase + UART_MOD_CNTRL); | ||
| 37 | wmb(); | ||
| 38 | } | ||
| 39 | __raw_writel(3, port->membase + UART_MOD_CNTRL); /* full on */ | ||
| 40 | wmb(); | ||
| 41 | serial8250_do_pm(port, state, old_state); | ||
| 42 | break; | ||
| 43 | case 3: /* power off */ | ||
| 44 | serial8250_do_pm(port, state, old_state); | ||
| 45 | __raw_writel(0, port->membase + UART_MOD_CNTRL); | ||
| 46 | wmb(); | ||
| 47 | break; | ||
| 48 | default: | ||
| 49 | serial8250_do_pm(port, state, old_state); | ||
| 50 | break; | ||
| 51 | } | ||
| 52 | } | ||
| 53 | |||
| 27 | #define PORT(_base, _irq) \ | 54 | #define PORT(_base, _irq) \ |
| 28 | { \ | 55 | { \ |
| 29 | .mapbase = _base, \ | 56 | .mapbase = _base, \ |
| @@ -33,6 +60,7 @@ | |||
| 33 | .flags = UPF_SKIP_TEST | UPF_IOREMAP | \ | 60 | .flags = UPF_SKIP_TEST | UPF_IOREMAP | \ |
| 34 | UPF_FIXED_TYPE, \ | 61 | UPF_FIXED_TYPE, \ |
| 35 | .type = PORT_16550A, \ | 62 | .type = PORT_16550A, \ |
| 63 | .pm = alchemy_8250_pm, \ | ||
| 36 | } | 64 | } |
| 37 | 65 | ||
| 38 | static struct plat_serial8250_port au1x00_uart_data[] = { | 66 | static struct plat_serial8250_port au1x00_uart_data[] = { |
