diff options
Diffstat (limited to 'arch/mips/alchemy/common/clocks.c')
-rw-r--r-- | arch/mips/alchemy/common/clocks.c | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/arch/mips/alchemy/common/clocks.c b/arch/mips/alchemy/common/clocks.c index 043429d17c5f..a8170fda4932 100644 --- a/arch/mips/alchemy/common/clocks.c +++ b/arch/mips/alchemy/common/clocks.c | |||
@@ -30,7 +30,6 @@ | |||
30 | #include <asm/mach-au1x00/au1000.h> | 30 | #include <asm/mach-au1x00/au1000.h> |
31 | 31 | ||
32 | static unsigned int au1x00_clock; /* Hz */ | 32 | static unsigned int au1x00_clock; /* Hz */ |
33 | static unsigned int lcd_clock; /* KHz */ | ||
34 | static unsigned long uart_baud_base; | 33 | static unsigned long uart_baud_base; |
35 | 34 | ||
36 | /* | 35 | /* |
@@ -61,33 +60,3 @@ void set_au1x00_uart_baud_base(unsigned long new_baud_base) | |||
61 | { | 60 | { |
62 | uart_baud_base = new_baud_base; | 61 | uart_baud_base = new_baud_base; |
63 | } | 62 | } |
64 | |||
65 | /* | ||
66 | * Calculate the Au1x00's LCD clock based on the current | ||
67 | * cpu clock and the system bus clock, and try to keep it | ||
68 | * below 40 MHz (the Pb1000 board can lock-up if the LCD | ||
69 | * clock is over 40 MHz). | ||
70 | */ | ||
71 | void set_au1x00_lcd_clock(void) | ||
72 | { | ||
73 | unsigned int static_cfg0; | ||
74 | unsigned int sys_busclk = (get_au1x00_speed() / 1000) / | ||
75 | ((int)(au_readl(SYS_POWERCTRL) & 0x03) + 2); | ||
76 | |||
77 | static_cfg0 = au_readl(MEM_STCFG0); | ||
78 | |||
79 | if (static_cfg0 & (1 << 11)) | ||
80 | lcd_clock = sys_busclk / 5; /* note: BCLK switching fails with D5 */ | ||
81 | else | ||
82 | lcd_clock = sys_busclk / 4; | ||
83 | |||
84 | if (lcd_clock > 50000) /* Epson MAX */ | ||
85 | printk(KERN_WARNING "warning: LCD clock too high (%u KHz)\n", | ||
86 | lcd_clock); | ||
87 | } | ||
88 | |||
89 | unsigned int get_au1x00_lcd_clock(void) | ||
90 | { | ||
91 | return lcd_clock; | ||
92 | } | ||
93 | EXPORT_SYMBOL(get_au1x00_lcd_clock); | ||