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-rw-r--r--arch/mips/Makefile528
1 files changed, 21 insertions, 507 deletions
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 0b9c01add0a0..f4a4b663ebb3 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -93,7 +93,8 @@ all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlinuz
93cflags-y += -G 0 -mno-abicalls -fno-pic -pipe 93cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
94cflags-y += -msoft-float 94cflags-y += -msoft-float
95LDFLAGS_vmlinux += -G 0 -static -n -nostdlib 95LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
96MODFLAGS += -mlong-calls 96KBUILD_AFLAGS_MODULE += -mlong-calls
97KBUILD_CFLAGS_MODULE += -mlong-calls
97 98
98cflags-y += -ffreestanding 99cflags-y += -ffreestanding
99 100
@@ -130,26 +131,6 @@ cflags-$(CONFIG_CPU_R4300) += -march=r4300 -Wa,--trap
130cflags-$(CONFIG_CPU_VR41XX) += -march=r4100 -Wa,--trap 131cflags-$(CONFIG_CPU_VR41XX) += -march=r4100 -Wa,--trap
131cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap 132cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap
132cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap 133cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap
133# only gcc >= 4.4 have the loongson-specific support
134cflags-$(CONFIG_CPU_LOONGSON2) += -Wa,--trap
135cflags-$(CONFIG_CPU_LOONGSON2E) += \
136 $(call cc-option,-march=loongson2e,-march=r4600)
137cflags-$(CONFIG_CPU_LOONGSON2F) += \
138 $(call cc-option,-march=loongson2f,-march=r4600)
139# enable the workarounds for loongson2f
140ifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS
141 ifeq ($(call as-option,-Wa$(comma)-mfix-loongson2f-nop,),)
142 $(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-nop)
143 else
144 cflags-$(CONFIG_CPU_NOP_WORKAROUNDS) += -Wa$(comma)-mfix-loongson2f-nop
145 endif
146 ifeq ($(call as-option,-Wa$(comma)-mfix-loongson2f-jump,),)
147 $(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-jump)
148 else
149 cflags-$(CONFIG_CPU_JUMP_WORKAROUNDS) += -Wa$(comma)-mfix-loongson2f-jump
150 endif
151endif
152
153cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \ 134cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
154 -Wa,-mips32 -Wa,--trap 135 -Wa,-mips32 -Wa,--trap
155cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \ 136cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
@@ -185,7 +166,8 @@ cflags-$(CONFIG_CPU_DADDI_WORKAROUNDS) += $(call cc-option,-mno-daddi,)
185 166
186ifdef CONFIG_CPU_SB1 167ifdef CONFIG_CPU_SB1
187ifdef CONFIG_SB1_PASS_1_WORKAROUNDS 168ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
188MODFLAGS += -msb1-pass1-workarounds 169KBUILD_AFLAGS_MODULE += -msb1-pass1-workarounds
170KBUILD_CFLAGS_MODULE += -msb1-pass1-workarounds
189endif 171endif
190endif 172endif
191 173
@@ -209,455 +191,7 @@ endif
209# 191#
210# Board-dependent options and extra files 192# Board-dependent options and extra files
211# 193#
212 194include $(srctree)/arch/mips/Kbuild.platforms
213#
214# Texas Instruments AR7
215#
216core-$(CONFIG_AR7) += arch/mips/ar7/
217cflags-$(CONFIG_AR7) += -I$(srctree)/arch/mips/include/asm/mach-ar7
218load-$(CONFIG_AR7) += 0xffffffff94100000
219
220#
221# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
222#
223core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
224cflags-$(CONFIG_MACH_JAZZ) += -I$(srctree)/arch/mips/include/asm/mach-jazz
225load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
226
227#
228# Common Alchemy Au1x00 stuff
229#
230core-$(CONFIG_SOC_AU1X00) += arch/mips/alchemy/common/
231
232#
233# AMD Alchemy Pb1000 eval board
234#
235core-$(CONFIG_MIPS_PB1000) += arch/mips/alchemy/devboards/
236cflags-$(CONFIG_MIPS_PB1000) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
237load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000
238
239#
240# AMD Alchemy Pb1100 eval board
241#
242core-$(CONFIG_MIPS_PB1100) += arch/mips/alchemy/devboards/
243cflags-$(CONFIG_MIPS_PB1100) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
244load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000
245
246#
247# AMD Alchemy Pb1500 eval board
248#
249core-$(CONFIG_MIPS_PB1500) += arch/mips/alchemy/devboards/
250cflags-$(CONFIG_MIPS_PB1500) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
251load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000
252
253#
254# AMD Alchemy Pb1550 eval board
255#
256core-$(CONFIG_MIPS_PB1550) += arch/mips/alchemy/devboards/
257cflags-$(CONFIG_MIPS_PB1550) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
258load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
259
260#
261# AMD Alchemy Pb1200 eval board
262#
263core-$(CONFIG_MIPS_PB1200) += arch/mips/alchemy/devboards/
264cflags-$(CONFIG_MIPS_PB1200) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
265load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000
266
267#
268# AMD Alchemy Db1000 eval board
269#
270core-$(CONFIG_MIPS_DB1000) += arch/mips/alchemy/devboards/
271cflags-$(CONFIG_MIPS_DB1000) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
272load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
273
274#
275# AMD Alchemy Db1100 eval board
276#
277core-$(CONFIG_MIPS_DB1100) += arch/mips/alchemy/devboards/
278cflags-$(CONFIG_MIPS_DB1100) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
279load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000
280
281#
282# AMD Alchemy Db1500 eval board
283#
284core-$(CONFIG_MIPS_DB1500) += arch/mips/alchemy/devboards/
285cflags-$(CONFIG_MIPS_DB1500) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
286load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000
287
288#
289# AMD Alchemy Db1550 eval board
290#
291core-$(CONFIG_MIPS_DB1550) += arch/mips/alchemy/devboards/
292cflags-$(CONFIG_MIPS_DB1550) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
293load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
294
295#
296# AMD Alchemy Db1200 eval board
297#
298core-$(CONFIG_MIPS_DB1200) += arch/mips/alchemy/devboards/
299cflags-$(CONFIG_MIPS_DB1200) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
300load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
301
302#
303# AMD Alchemy Bosporus eval board
304#
305core-$(CONFIG_MIPS_BOSPORUS) += arch/mips/alchemy/devboards/
306cflags-$(CONFIG_MIPS_BOSPORUS) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
307load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
308
309#
310# AMD Alchemy Mirage eval board
311#
312core-$(CONFIG_MIPS_MIRAGE) += arch/mips/alchemy/devboards/
313cflags-$(CONFIG_MIPS_MIRAGE) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
314load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
315
316#
317# 4G-Systems eval board
318#
319libs-$(CONFIG_MIPS_MTX1) += arch/mips/alchemy/mtx-1/
320load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
321
322#
323# MyCable eval board
324#
325libs-$(CONFIG_MIPS_XXS1500) += arch/mips/alchemy/xxs1500/
326load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
327
328# must be last for Alchemy systems for GPIO to work properly
329cflags-$(CONFIG_SOC_AU1X00) += -I$(srctree)/arch/mips/include/asm/mach-au1x00
330
331
332#
333# Cobalt Server
334#
335core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
336cflags-$(CONFIG_MIPS_COBALT) += -I$(srctree)/arch/mips/include/asm/mach-cobalt
337load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
338
339#
340# DECstation family
341#
342core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
343cflags-$(CONFIG_MACH_DECSTATION)+= -I$(srctree)/arch/mips/include/asm/mach-dec
344libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
345load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
346
347#
348# Wind River PPMC Board (4KC + GT64120)
349#
350core-$(CONFIG_WR_PPMC) += arch/mips/gt64120/wrppmc/
351cflags-$(CONFIG_WR_PPMC) += -I$(srctree)/arch/mips/include/asm/mach-wrppmc
352load-$(CONFIG_WR_PPMC) += 0xffffffff80100000
353
354#
355# Loongson family
356#
357core-$(CONFIG_MACH_LOONGSON) += arch/mips/loongson/
358cflags-$(CONFIG_MACH_LOONGSON) += -I$(srctree)/arch/mips/include/asm/mach-loongson \
359 -mno-branch-likely
360load-$(CONFIG_LEMOTE_FULOONG2E) += 0xffffffff80100000
361load-$(CONFIG_LEMOTE_MACH2F) += 0xffffffff80200000
362
363#
364# MIPS Malta board
365#
366core-$(CONFIG_MIPS_MALTA) += arch/mips/mti-malta/
367cflags-$(CONFIG_MIPS_MALTA) += -I$(srctree)/arch/mips/include/asm/mach-malta
368load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
369all-$(CONFIG_MIPS_MALTA) := $(COMPRESSION_FNAME).bin
370
371#
372# MIPS SIM
373#
374core-$(CONFIG_MIPS_SIM) += arch/mips/mipssim/
375cflags-$(CONFIG_MIPS_SIM) += -I$(srctree)/arch/mips/include/asm/mach-mipssim
376load-$(CONFIG_MIPS_SIM) += 0x80100000
377
378#
379# PMC-Sierra MSP SOCs
380#
381core-$(CONFIG_PMC_MSP) += arch/mips/pmc-sierra/msp71xx/
382cflags-$(CONFIG_PMC_MSP) += -I$(srctree)/arch/mips/include/asm/pmc-sierra/msp71xx \
383 -mno-branch-likely
384load-$(CONFIG_PMC_MSP) += 0xffffffff80100000
385
386#
387# PMC-Sierra Yosemite
388#
389core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
390cflags-$(CONFIG_PMC_YOSEMITE) += -I$(srctree)/arch/mips/include/asm/mach-yosemite
391load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
392
393#
394# LASAT platforms
395#
396core-$(CONFIG_LASAT) += arch/mips/lasat/
397cflags-$(CONFIG_LASAT) += -I$(srctree)/arch/mips/include/asm/mach-lasat
398load-$(CONFIG_LASAT) += 0xffffffff80000000
399
400#
401# Common VR41xx
402#
403core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
404cflags-$(CONFIG_MACH_VR41XX) += -I$(srctree)/arch/mips/include/asm/mach-vr41xx
405
406#
407# ZAO Networks Capcella (VR4131)
408#
409load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
410
411#
412# Victor MP-C303/304 (VR4122)
413#
414load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000
415
416#
417# IBM WorkPad z50 (VR4121)
418#
419core-$(CONFIG_IBM_WORKPAD) += arch/mips/vr41xx/ibm-workpad/
420load-$(CONFIG_IBM_WORKPAD) += 0xffffffff80004000
421
422#
423# CASIO CASSIPEIA E-55/65 (VR4111)
424#
425core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/
426load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
427
428#
429# TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
430#
431load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
432
433# NXP STB225
434core-$(CONFIG_SOC_PNX833X) += arch/mips/nxp/pnx833x/common/
435cflags-$(CONFIG_SOC_PNX833X) += -Iarch/mips/include/asm/mach-pnx833x
436libs-$(CONFIG_NXP_STB220) += arch/mips/nxp/pnx833x/stb22x/
437load-$(CONFIG_NXP_STB220) += 0xffffffff80001000
438libs-$(CONFIG_NXP_STB225) += arch/mips/nxp/pnx833x/stb22x/
439load-$(CONFIG_NXP_STB225) += 0xffffffff80001000
440
441#
442# Common NXP PNX8550
443#
444core-$(CONFIG_SOC_PNX8550) += arch/mips/nxp/pnx8550/common/
445cflags-$(CONFIG_SOC_PNX8550) += -I$(srctree)/arch/mips/include/asm/mach-pnx8550
446
447#
448# NXP PNX8550 JBS board
449#
450libs-$(CONFIG_PNX8550_JBS) += arch/mips/nxp/pnx8550/jbs/
451#cflags-$(CONFIG_PNX8550_JBS) += -I$(srctree)/arch/mips/include/asm/mach-pnx8550
452load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
453
454# NXP PNX8550 STB810 board
455#
456libs-$(CONFIG_PNX8550_STB810) += arch/mips/nxp/pnx8550/stb810/
457load-$(CONFIG_PNX8550_STB810) += 0xffffffff80060000
458
459#
460# Common NEC EMMAXXX
461#
462core-$(CONFIG_SOC_EMMA2RH) += arch/mips/emma/common/
463cflags-$(CONFIG_SOC_EMMA2RH) += -I$(srctree)/arch/mips/include/asm/mach-emma2rh
464
465#
466# NEC EMMA2RH Mark-eins
467#
468core-$(CONFIG_NEC_MARKEINS) += arch/mips/emma/markeins/
469load-$(CONFIG_NEC_MARKEINS) += 0xffffffff88100000
470
471#
472# Cisco PowerTV Platform
473#
474core-$(CONFIG_POWERTV) += arch/mips/powertv/
475cflags-$(CONFIG_POWERTV) += -I$(srctree)/arch/mips/include/asm/mach-powertv
476load-$(CONFIG_POWERTV) += 0xffffffff90800000
477
478#
479# SGI IP22 (Indy/Indigo2)
480#
481# Set the load address to >= 0xffffffff88069000 if you want to leave space for
482# symmon, 0xffffffff80002000 for production kernels. Note that the value must
483# be aligned to a multiple of the kernel stack size or the handling of the
484# current variable will break so for 64-bit kernels we have to raise the start
485# address by 8kb.
486#
487core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
488cflags-$(CONFIG_SGI_IP22) += -I$(srctree)/arch/mips/include/asm/mach-ip22
489ifdef CONFIG_32BIT
490load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
491endif
492ifdef CONFIG_64BIT
493load-$(CONFIG_SGI_IP22) += 0xffffffff88004000
494endif
495
496#
497# SGI-IP27 (Origin200/2000)
498#
499# Set the load address to >= 0xc000000000300000 if you want to leave space for
500# symmon, 0xc00000000001c000 for production kernels. Note that the value must
501# be 16kb aligned or the handling of the current variable will break.
502#
503ifdef CONFIG_SGI_IP27
504core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
505cflags-$(CONFIG_SGI_IP27) += -I$(srctree)/arch/mips/include/asm/mach-ip27
506ifdef CONFIG_MAPPED_KERNEL
507load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
508OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
509dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
510else
511load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
512OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
513endif
514endif
515
516#
517# SGI IP28 (Indigo2 R10k)
518#
519# Set the load address to >= 0xa800000020080000 if you want to leave space for
520# symmon, 0xa800000020004000 for production kernels ? Note that the value must
521# be 16kb aligned or the handling of the current variable will break.
522# Simplified: what IP22 does at 128MB+ in ksegN, IP28 does at 512MB+ in xkphys
523#
524ifdef CONFIG_SGI_IP28
525 ifeq ($(call cc-option-yn,-mr10k-cache-barrier=store), n)
526 $(error gcc doesn't support needed option -mr10k-cache-barrier=store)
527 endif
528endif
529core-$(CONFIG_SGI_IP28) += arch/mips/sgi-ip22/
530cflags-$(CONFIG_SGI_IP28) += -mr10k-cache-barrier=store -I$(srctree)/arch/mips/include/asm/mach-ip28
531load-$(CONFIG_SGI_IP28) += 0xa800000020004000
532
533#
534# SGI-IP32 (O2)
535#
536# Set the load address to >= 80069000 if you want to leave space for symmon,
537# 0xffffffff80004000 for production kernels. Note that the value must be aligned to
538# a multiple of the kernel stack size or the handling of the current variable
539# will break.
540#
541core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
542cflags-$(CONFIG_SGI_IP32) += -I$(srctree)/arch/mips/include/asm/mach-ip32
543load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
544
545#
546# Sibyte SB1250/BCM1480 SOC
547#
548# This is a LIB so that it links at the end, and initcalls are later
549# the sequence; but it is built as an object so that modules don't get
550# removed (as happens, even if they have __initcall/module_init)
551#
552core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
553core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/common/
554cflags-$(CONFIG_SIBYTE_BCM112X) += -I$(srctree)/arch/mips/include/asm/mach-sibyte \
555 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
556
557core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
558core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/common/
559cflags-$(CONFIG_SIBYTE_SB1250) += -I$(srctree)/arch/mips/include/asm/mach-sibyte \
560 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
561
562core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
563core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/common/
564cflags-$(CONFIG_SIBYTE_BCM1x55) += -I$(srctree)/arch/mips/include/asm/mach-sibyte \
565 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
566
567core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
568core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/common/
569cflags-$(CONFIG_SIBYTE_BCM1x80) += -I$(srctree)/arch/mips/include/asm/mach-sibyte \
570 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
571
572#
573# Sibyte BCM91120x (Carmel) board
574# Sibyte BCM91120C (CRhine) board
575# Sibyte BCM91125C (CRhone) board
576# Sibyte BCM91125E (Rhone) board
577# Sibyte SWARM board
578# Sibyte BCM91x80 (BigSur) board
579#
580core-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
581load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
582core-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
583load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000
584core-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
585load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
586core-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
587load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
588core-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
589load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
590core-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
591load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
592core-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
593load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
594
595#
596# Broadcom BCM47XX boards
597#
598core-$(CONFIG_BCM47XX) += arch/mips/bcm47xx/
599cflags-$(CONFIG_BCM47XX) += -I$(srctree)/arch/mips/include/asm/mach-bcm47xx
600load-$(CONFIG_BCM47XX) := 0xffffffff80001000
601
602#
603# Broadcom BCM63XX boards
604#
605core-$(CONFIG_BCM63XX) += arch/mips/bcm63xx/
606cflags-$(CONFIG_BCM63XX) += -I$(srctree)/arch/mips/include/asm/mach-bcm63xx/
607load-$(CONFIG_BCM63XX) := 0xffffffff80010000
608
609#
610# SNI RM
611#
612core-$(CONFIG_SNI_RM) += arch/mips/sni/
613cflags-$(CONFIG_SNI_RM) += -I$(srctree)/arch/mips/include/asm/mach-rm
614ifdef CONFIG_CPU_LITTLE_ENDIAN
615load-$(CONFIG_SNI_RM) += 0xffffffff80600000
616else
617load-$(CONFIG_SNI_RM) += 0xffffffff80030000
618endif
619all-$(CONFIG_SNI_RM) := $(COMPRESSION_FNAME).ecoff
620
621#
622# Common TXx9
623#
624core-$(CONFIG_MACH_TX39XX) += arch/mips/txx9/generic/
625cflags-$(CONFIG_MACH_TX39XX) += -I$(srctree)/arch/mips/include/asm/mach-tx39xx
626load-$(CONFIG_MACH_TX39XX) += 0xffffffff80050000
627core-$(CONFIG_MACH_TX49XX) += arch/mips/txx9/generic/
628cflags-$(CONFIG_MACH_TX49XX) += -I$(srctree)/arch/mips/include/asm/mach-tx49xx
629load-$(CONFIG_MACH_TX49XX) += 0xffffffff80100000
630
631#
632# Toshiba JMR-TX3927 board
633#
634core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/txx9/jmr3927/
635
636#
637# Routerboard 532 board
638#
639core-$(CONFIG_MIKROTIK_RB532) += arch/mips/rb532/
640cflags-$(CONFIG_MIKROTIK_RB532) += -I$(srctree)/arch/mips/include/asm/mach-rc32434
641load-$(CONFIG_MIKROTIK_RB532) += 0xffffffff80101000
642
643#
644# Toshiba RBTX49XX boards
645#
646core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/txx9/rbtx4927/
647core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/txx9/rbtx4938/
648core-$(CONFIG_TOSHIBA_RBTX4939) += arch/mips/txx9/rbtx4939/
649
650#
651# Cavium Octeon
652#
653core-$(CONFIG_CPU_CAVIUM_OCTEON) += arch/mips/cavium-octeon/
654cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += -I$(srctree)/arch/mips/include/asm/mach-cavium-octeon
655core-$(CONFIG_CPU_CAVIUM_OCTEON) += arch/mips/cavium-octeon/executive/
656ifdef CONFIG_CAVIUM_OCTEON_2ND_KERNEL
657load-$(CONFIG_CPU_CAVIUM_OCTEON) += 0xffffffff84100000
658else
659load-$(CONFIG_CPU_CAVIUM_OCTEON) += 0xffffffff81100000
660endif
661 195
662cflags-y += -I$(srctree)/arch/mips/include/asm/mach-generic 196cflags-y += -I$(srctree)/arch/mips/include/asm/mach-generic
663drivers-$(CONFIG_PCI) += arch/mips/pci/ 197drivers-$(CONFIG_PCI) += arch/mips/pci/
@@ -706,7 +240,8 @@ head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
706 240
707libs-y += arch/mips/lib/ 241libs-y += arch/mips/lib/
708 242
709core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/ 243# See arch/mips/Kbuild for content of core part of the kernel
244core-y += arch/mips/
710 245
711drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/ 246drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
712 247
@@ -726,6 +261,9 @@ endif
726vmlinux.32: vmlinux 261vmlinux.32: vmlinux
727 $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@ 262 $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
728 263
264
265#obj-$(CONFIG_KPROBES) += kprobes.o
266
729# 267#
730# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit 268# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
731# ELF files from 32-bit files by conversion. 269# ELF files from 32-bit files by conversion.
@@ -733,35 +271,19 @@ vmlinux.32: vmlinux
733vmlinux.64: vmlinux 271vmlinux.64: vmlinux
734 $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@ 272 $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
735 273
736makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
737makezboot =$(Q)$(MAKE) $(build)=arch/mips/boot/compressed \
738 VMLINUX_LOAD_ADDRESS=$(load-y) 32bit-bfd=$(32bit-bfd) $(1)
739
740all: $(all-y) 274all: $(all-y)
741 275
742vmlinuz: vmlinux FORCE 276# boot
743 +@$(call makezboot,$@) 277vmlinux.bin vmlinux.ecoff vmlinux.srec: $(vmlinux-32) FORCE
278 $(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) arch/mips/boot/$@
744 279
745vmlinuz.bin: vmlinux 280# boot/compressed
746 +@$(call makezboot,$@) 281vmlinuz vmlinuz.bin vmlinuz.ecoff vmlinuz.srec: $(vmlinux-32) FORCE
282 $(Q)$(MAKE) $(build)=arch/mips/boot/compressed \
283 VMLINUX_LOAD_ADDRESS=$(load-y) 32bit-bfd=$(32bit-bfd) $@
747 284
748vmlinuz.ecoff: vmlinux
749 +@$(call makezboot,$@)
750 285
751vmlinuz.srec: vmlinux 286CLEAN_FILES += vmlinux.32 vmlinux.64
752 +@$(call makezboot,$@)
753
754vmlinux.bin: $(vmlinux-32)
755 +@$(call makeboot,$@)
756
757vmlinux.ecoff: $(vmlinux-32)
758 +@$(call makeboot,$@)
759
760vmlinux.srec: $(vmlinux-32)
761 +@$(call makeboot,$@)
762
763CLEAN_FILES += vmlinux.ecoff \
764 vmlinux.srec
765 287
766archprepare: 288archprepare:
767ifdef CONFIG_MIPS32_N32 289ifdef CONFIG_MIPS32_N32
@@ -780,9 +302,9 @@ install:
780 $(Q)install -D -m 644 System.map $(INSTALL_PATH)/System.map-$(KERNELRELEASE) 302 $(Q)install -D -m 644 System.map $(INSTALL_PATH)/System.map-$(KERNELRELEASE)
781 303
782archclean: 304archclean:
783 @$(MAKE) $(clean)=arch/mips/boot 305 $(Q)$(MAKE) $(clean)=arch/mips/boot
784 @$(MAKE) $(clean)=arch/mips/boot/compressed 306 $(Q)$(MAKE) $(clean)=arch/mips/boot/compressed
785 @$(MAKE) $(clean)=arch/mips/lasat 307 $(Q)$(MAKE) $(clean)=arch/mips/lasat
786 308
787define archhelp 309define archhelp
788 echo ' install - install kernel into $(INSTALL_PATH)' 310 echo ' install - install kernel into $(INSTALL_PATH)'
@@ -796,11 +318,3 @@ define archhelp
796 echo 318 echo
797 echo ' These will be default as apropriate for a configured platform.' 319 echo ' These will be default as apropriate for a configured platform.'
798endef 320endef
799
800CLEAN_FILES += vmlinux.32 \
801 vmlinux.64 \
802 vmlinux.ecoff \
803 vmlinuz \
804 vmlinuz.ecoff \
805 vmlinuz.bin \
806 vmlinuz.srec
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-30 06:19:29 -0500