diff options
Diffstat (limited to 'arch/mips/Kconfig')
-rw-r--r-- | arch/mips/Kconfig | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 624c31cd8077..c8d954d6f2c4 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -894,6 +894,16 @@ choice | |||
894 | prompt "CPU type" | 894 | prompt "CPU type" |
895 | default CPU_R4X00 | 895 | default CPU_R4X00 |
896 | 896 | ||
897 | config CPU_LOONGSON2 | ||
898 | bool "Loongson 2" | ||
899 | depends on SYS_HAS_CPU_LOONGSON2 | ||
900 | select CPU_SUPPORTS_32BIT_KERNEL | ||
901 | select CPU_SUPPORTS_64BIT_KERNEL | ||
902 | select CPU_SUPPORTS_HIGHMEM | ||
903 | help | ||
904 | The Loongson 2E processor implements the MIPS III instruction set | ||
905 | with many extensions. | ||
906 | |||
897 | config CPU_MIPS32_R1 | 907 | config CPU_MIPS32_R1 |
898 | bool "MIPS32 Release 1" | 908 | bool "MIPS32 Release 1" |
899 | depends on SYS_HAS_CPU_MIPS32_R1 | 909 | depends on SYS_HAS_CPU_MIPS32_R1 |
@@ -1104,6 +1114,9 @@ config CPU_SB1 | |||
1104 | 1114 | ||
1105 | endchoice | 1115 | endchoice |
1106 | 1116 | ||
1117 | config SYS_HAS_CPU_LOONGSON2 | ||
1118 | bool | ||
1119 | |||
1107 | config SYS_HAS_CPU_MIPS32_R1 | 1120 | config SYS_HAS_CPU_MIPS32_R1 |
1108 | bool | 1121 | bool |
1109 | 1122 | ||
@@ -1438,6 +1451,15 @@ config CPU_HAS_SMARTMIPS | |||
1438 | config CPU_HAS_WB | 1451 | config CPU_HAS_WB |
1439 | bool | 1452 | bool |
1440 | 1453 | ||
1454 | config 64BIT_CONTEXT | ||
1455 | bool "Save 64bit integer registers" | ||
1456 | depends on 32BIT && CPU_LOONGSON2 | ||
1457 | help | ||
1458 | Loongson2 CPU is 64bit , when used in 32BIT mode, its integer | ||
1459 | registers can still be accessed as 64bit, mainly for multimedia | ||
1460 | instructions. We must have all 64bit save/restored to make sure | ||
1461 | those instructions to get correct result. | ||
1462 | |||
1441 | # | 1463 | # |
1442 | # Vectored interrupt mode is an R2 feature | 1464 | # Vectored interrupt mode is an R2 feature |
1443 | # | 1465 | # |