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Diffstat (limited to 'arch/microblaze/kernel/vmlinux.lds.S')
-rw-r--r--arch/microblaze/kernel/vmlinux.lds.S72
1 files changed, 27 insertions, 45 deletions
diff --git a/arch/microblaze/kernel/vmlinux.lds.S b/arch/microblaze/kernel/vmlinux.lds.S
index ec5fa91a48d8..e704188d7855 100644
--- a/arch/microblaze/kernel/vmlinux.lds.S
+++ b/arch/microblaze/kernel/vmlinux.lds.S
@@ -12,13 +12,16 @@ OUTPUT_FORMAT("elf32-microblaze", "elf32-microblaze", "elf32-microblaze")
12OUTPUT_ARCH(microblaze) 12OUTPUT_ARCH(microblaze)
13ENTRY(_start) 13ENTRY(_start)
14 14
15#include <asm/page.h>
15#include <asm-generic/vmlinux.lds.h> 16#include <asm-generic/vmlinux.lds.h>
17#include <asm/thread_info.h>
16 18
17jiffies = jiffies_64 + 4; 19jiffies = jiffies_64 + 4;
18 20
19SECTIONS { 21SECTIONS {
20 . = CONFIG_KERNEL_START; 22 . = CONFIG_KERNEL_START;
21 .text : { 23 _start = CONFIG_KERNEL_BASE_ADDR;
24 .text : AT(ADDR(.text) - LOAD_OFFSET) {
22 _text = . ; 25 _text = . ;
23 _stext = . ; 26 _stext = . ;
24 *(.text .text.*) 27 *(.text .text.*)
@@ -33,24 +36,22 @@ SECTIONS {
33 } 36 }
34 37
35 . = ALIGN (4) ; 38 . = ALIGN (4) ;
36 _fdt_start = . ; /* place for fdt blob */ 39 __fdt_blob : AT(ADDR(__fdt_blob) - LOAD_OFFSET) {
37 . = . + 0x4000; 40 _fdt_start = . ; /* place for fdt blob */
38 _fdt_end = . ; 41 *(__fdt_blob) ; /* Any link-placed DTB */
42 . = _fdt_start + 0x4000; /* Pad up to 16kbyte */
43 _fdt_end = . ;
44 }
39 45
40 . = ALIGN(16); 46 . = ALIGN(16);
41 RODATA 47 RODATA
42 . = ALIGN(16); 48 EXCEPTION_TABLE(16)
43 __ex_table : {
44 __start___ex_table = .;
45 *(__ex_table)
46 __stop___ex_table = .;
47 }
48 49
49 /* 50 /*
50 * sdata2 section can go anywhere, but must be word aligned 51 * sdata2 section can go anywhere, but must be word aligned
51 * and SDA2_BASE must point to the middle of it 52 * and SDA2_BASE must point to the middle of it
52 */ 53 */
53 .sdata2 : { 54 .sdata2 : AT(ADDR(.sdata2) - LOAD_OFFSET) {
54 _ssrw = .; 55 _ssrw = .;
55 . = ALIGN(4096); /* page aligned when MMU used - origin 0x8 */ 56 . = ALIGN(4096); /* page aligned when MMU used - origin 0x8 */
56 *(.sdata2) 57 *(.sdata2)
@@ -61,12 +62,7 @@ SECTIONS {
61 } 62 }
62 63
63 _sdata = . ; 64 _sdata = . ;
64 .data ALIGN (4096) : { /* page aligned when MMU used - origin 0x4 */ 65 RW_DATA_SECTION(32, PAGE_SIZE, THREAD_SIZE)
65 DATA_DATA
66 CONSTRUCTORS
67 }
68 . = ALIGN(32);
69 .data.cacheline_aligned : { *(.data.cacheline_aligned) }
70 _edata = . ; 66 _edata = . ;
71 67
72 /* Reserve some low RAM for r0 based memory references */ 68 /* Reserve some low RAM for r0 based memory references */
@@ -74,18 +70,14 @@ SECTIONS {
74 r0_ram = . ; 70 r0_ram = . ;
75 . = . + 4096; /* a page should be enough */ 71 . = . + 4096; /* a page should be enough */
76 72
77 /* The initial task */
78 . = ALIGN(8192);
79 .data.init_task : { *(.data.init_task) }
80
81 /* Under the microblaze ABI, .sdata and .sbss must be contiguous */ 73 /* Under the microblaze ABI, .sdata and .sbss must be contiguous */
82 . = ALIGN(8); 74 . = ALIGN(8);
83 .sdata : { 75 .sdata : AT(ADDR(.sdata) - LOAD_OFFSET) {
84 _ssro = .; 76 _ssro = .;
85 *(.sdata) 77 *(.sdata)
86 } 78 }
87 79
88 .sbss : { 80 .sbss : AT(ADDR(.sbss) - LOAD_OFFSET) {
89 _ssbss = .; 81 _ssbss = .;
90 *(.sbss) 82 *(.sbss)
91 _esbss = .; 83 _esbss = .;
@@ -96,47 +88,36 @@ SECTIONS {
96 88
97 __init_begin = .; 89 __init_begin = .;
98 90
99 . = ALIGN(4096); 91 INIT_TEXT_SECTION(PAGE_SIZE)
100 .init.text : {
101 _sinittext = . ;
102 INIT_TEXT
103 _einittext = .;
104 }
105 92
106 .init.data : { 93 .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
107 INIT_DATA 94 INIT_DATA
108 } 95 }
109 96
110 . = ALIGN(4); 97 . = ALIGN(4);
111 .init.ivt : { 98 .init.ivt : AT(ADDR(.init.ivt) - LOAD_OFFSET) {
112 __ivt_start = .; 99 __ivt_start = .;
113 *(.init.ivt) 100 *(.init.ivt)
114 __ivt_end = .; 101 __ivt_end = .;
115 } 102 }
116 103
117 .init.setup : { 104 .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
118 __setup_start = .; 105 INIT_SETUP(0)
119 *(.init.setup)
120 __setup_end = .;
121 } 106 }
122 107
123 .initcall.init : { 108 .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET ) {
124 __initcall_start = .; 109 INIT_CALLS
125 INITCALLS
126 __initcall_end = .;
127 } 110 }
128 111
129 .con_initcall.init : { 112 .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
130 __con_initcall_start = .; 113 CON_INITCALL
131 *(.con_initcall.init)
132 __con_initcall_end = .;
133 } 114 }
134 115
135 SECURITY_INIT 116 SECURITY_INIT
136 117
137 __init_end_before_initramfs = .; 118 __init_end_before_initramfs = .;
138 119
139 .init.ramfs ALIGN(4096) : { 120 .init.ramfs ALIGN(4096) : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
140 __initramfs_start = .; 121 __initramfs_start = .;
141 *(.init.ramfs) 122 *(.init.ramfs)
142 __initramfs_end = .; 123 __initramfs_end = .;
@@ -152,7 +133,8 @@ SECTIONS {
152 } 133 }
153 __init_end = .; 134 __init_end = .;
154 135
155 .bss ALIGN (4096) : { /* page aligned when MMU used */ 136 .bss ALIGN (4096) : AT(ADDR(.bss) - LOAD_OFFSET) {
137 /* page aligned when MMU used */
156 __bss_start = . ; 138 __bss_start = . ;
157 *(.bss*) 139 *(.bss*)
158 *(COMMON) 140 *(COMMON)