diff options
Diffstat (limited to 'arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c')
-rw-r--r-- | arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c index c259786e7faa..f72dbd66c844 100644 --- a/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c +++ b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c | |||
@@ -21,8 +21,14 @@ | |||
21 | */ | 21 | */ |
22 | 22 | ||
23 | #define CI(c, p) { ci->c = PVR_##p(pvr); } | 23 | #define CI(c, p) { ci->c = PVR_##p(pvr); } |
24 | |||
25 | #if defined(CONFIG_EARLY_PRINTK) && defined(CONFIG_SERIAL_UARTLITE_CONSOLE) | ||
24 | #define err_printk(x) \ | 26 | #define err_printk(x) \ |
25 | early_printk("ERROR: Microblaze " x "-different for PVR and DTS\n"); | 27 | early_printk("ERROR: Microblaze " x "-different for PVR and DTS\n"); |
28 | #else | ||
29 | #define err_printk(x) \ | ||
30 | printk(KERN_INFO "ERROR: Microblaze " x "-different for PVR and DTS\n"); | ||
31 | #endif | ||
26 | 32 | ||
27 | void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu) | 33 | void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu) |
28 | { | 34 | { |
@@ -70,7 +76,7 @@ void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu) | |||
70 | CI(use_icache, USE_ICACHE); | 76 | CI(use_icache, USE_ICACHE); |
71 | CI(icache_tagbits, ICACHE_ADDR_TAG_BITS); | 77 | CI(icache_tagbits, ICACHE_ADDR_TAG_BITS); |
72 | CI(icache_write, ICACHE_ALLOW_WR); | 78 | CI(icache_write, ICACHE_ALLOW_WR); |
73 | CI(icache_line, ICACHE_LINE_LEN); | 79 | ci->icache_line_length = PVR_ICACHE_LINE_LEN(pvr) << 2; |
74 | CI(icache_size, ICACHE_BYTE_SIZE); | 80 | CI(icache_size, ICACHE_BYTE_SIZE); |
75 | CI(icache_base, ICACHE_BASEADDR); | 81 | CI(icache_base, ICACHE_BASEADDR); |
76 | CI(icache_high, ICACHE_HIGHADDR); | 82 | CI(icache_high, ICACHE_HIGHADDR); |
@@ -78,11 +84,16 @@ void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu) | |||
78 | CI(use_dcache, USE_DCACHE); | 84 | CI(use_dcache, USE_DCACHE); |
79 | CI(dcache_tagbits, DCACHE_ADDR_TAG_BITS); | 85 | CI(dcache_tagbits, DCACHE_ADDR_TAG_BITS); |
80 | CI(dcache_write, DCACHE_ALLOW_WR); | 86 | CI(dcache_write, DCACHE_ALLOW_WR); |
81 | CI(dcache_line, DCACHE_LINE_LEN); | 87 | ci->dcache_line_length = PVR_DCACHE_LINE_LEN(pvr) << 2; |
82 | CI(dcache_size, DCACHE_BYTE_SIZE); | 88 | CI(dcache_size, DCACHE_BYTE_SIZE); |
83 | CI(dcache_base, DCACHE_BASEADDR); | 89 | CI(dcache_base, DCACHE_BASEADDR); |
84 | CI(dcache_high, DCACHE_HIGHADDR); | 90 | CI(dcache_high, DCACHE_HIGHADDR); |
85 | 91 | ||
92 | temp = PVR_DCACHE_USE_WRITEBACK(pvr); | ||
93 | if (ci->dcache_wb != temp) | ||
94 | err_printk("DCACHE WB"); | ||
95 | ci->dcache_wb = temp; | ||
96 | |||
86 | CI(use_dopb, D_OPB); | 97 | CI(use_dopb, D_OPB); |
87 | CI(use_iopb, I_OPB); | 98 | CI(use_iopb, I_OPB); |
88 | CI(use_dlmb, D_LMB); | 99 | CI(use_dlmb, D_LMB); |