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-rw-r--r--arch/m68knommu/platform/68VZ328/de2/config.c191
1 files changed, 0 insertions, 191 deletions
diff --git a/arch/m68knommu/platform/68VZ328/de2/config.c b/arch/m68knommu/platform/68VZ328/de2/config.c
deleted file mode 100644
index d0586197f113..000000000000
--- a/arch/m68knommu/platform/68VZ328/de2/config.c
+++ /dev/null
@@ -1,191 +0,0 @@
1/*
2 * linux/arch/m68knommu/platform/MC68VZ328/de2/config.c
3 *
4 * Copyright (C) 1993 Hamish Macdonald
5 * Copyright (C) 1999 D. Jeff Dionne
6 * Copyright (C) 2001 Georges Menie, Ken Desmet
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file COPYING in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/config.h>
14#include <linux/types.h>
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/tty.h>
18#include <linux/console.h>
19#include <linux/kd.h>
20#include <linux/netdevice.h>
21
22#include <asm/setup.h>
23#include <asm/system.h>
24#include <asm/pgtable.h>
25#include <asm/irq.h>
26#include <asm/machdep.h>
27#include <asm/MC68VZ328.h>
28
29#ifdef CONFIG_INIT_LCD
30#include "screen.h"
31#endif
32
33/* with a 33.16 MHz clock, this will give usec resolution to the time functions */
34#define CLOCK_SOURCE TCTL_CLKSOURCE_SYSCLK
35#define CLOCK_PRE 7
36#define TICKS_PER_JIFFY 41450
37
38static void
39dragen2_sched_init(irqreturn_t (*timer_routine) (int, void *, struct pt_regs *))
40{
41 /* disable timer 1 */
42 TCTL = 0;
43
44 /* set ISR */
45 if (request_irq(TMR_IRQ_NUM, timer_routine, IRQ_FLG_LOCK, "timer", NULL))
46 panic("Unable to attach timer interrupt\n");
47
48 /* Restart mode, Enable int, Set clock source */
49 TCTL = TCTL_OM | TCTL_IRQEN | CLOCK_SOURCE;
50 TPRER = CLOCK_PRE;
51 TCMP = TICKS_PER_JIFFY;
52
53 /* Enable timer 1 */
54 TCTL |= TCTL_TEN;
55}
56
57static void dragen2_tick(void)
58{
59 /* Reset Timer1 */
60 TSTAT &= 0;
61}
62
63static unsigned long dragen2_gettimeoffset(void)
64{
65 unsigned long ticks = TCN, offset = 0;
66
67 /* check for pending interrupt */
68 if (ticks < (TICKS_PER_JIFFY >> 1) && (ISR & (1 << TMR_IRQ_NUM)))
69 offset = 1000000 / HZ;
70
71 ticks = (ticks * 1000000 / HZ) / TICKS_PER_JIFFY;
72
73 return ticks + offset;
74}
75
76static void dragen2_gettod(int *year, int *mon, int *day, int *hour,
77 int *min, int *sec)
78{
79 long now = RTCTIME;
80
81 *year = *mon = *day = 1;
82 *hour = (now >> 24) % 24;
83 *min = (now >> 16) % 60;
84 *sec = now % 60;
85}
86
87static void dragen2_reset(void)
88{
89 local_irq_disable();
90
91#ifdef CONFIG_INIT_LCD
92 PBDATA |= 0x20; /* disable CCFL light */
93 PKDATA |= 0x4; /* disable LCD controller */
94 LCKCON = 0;
95#endif
96
97 __asm__ __volatile__(
98 "reset\n\t"
99 "moveal #0x04000000, %a0\n\t"
100 "moveal 0(%a0), %sp\n\t"
101 "moveal 4(%a0), %a0\n\t"
102 "jmp (%a0)"
103 );
104}
105
106static void init_hardware(void)
107{
108#ifdef CONFIG_DIRECT_IO_ACCESS
109 SCR = 0x10; /* allow user access to internal registers */
110#endif
111
112 /* CSGB Init */
113 CSGBB = 0x4000;
114 CSB = 0x1a1;
115
116 /* CS8900 init */
117 /* PK3: hardware sleep function pin, active low */
118 PKSEL |= PK(3); /* select pin as I/O */
119 PKDIR |= PK(3); /* select pin as output */
120 PKDATA |= PK(3); /* set pin high */
121
122 /* PF5: hardware reset function pin, active high */
123 PFSEL |= PF(5); /* select pin as I/O */
124 PFDIR |= PF(5); /* select pin as output */
125 PFDATA &= ~PF(5); /* set pin low */
126
127 /* cs8900 hardware reset */
128 PFDATA |= PF(5);
129 { int i; for (i = 0; i < 32000; ++i); }
130 PFDATA &= ~PF(5);
131
132 /* INT1 enable (cs8900 IRQ) */
133 PDPOL &= ~PD(1); /* active high signal */
134 PDIQEG &= ~PD(1);
135 PDIRQEN |= PD(1); /* IRQ enabled */
136
137#ifdef CONFIG_68328_SERIAL_UART2
138 /* Enable RXD TXD port bits to enable UART2 */
139 PJSEL &= ~(PJ(5) | PJ(4));
140#endif
141
142#ifdef CONFIG_INIT_LCD
143 /* initialize LCD controller */
144 LSSA = (long) screen_bits;
145 LVPW = 0x14;
146 LXMAX = 0x140;
147 LYMAX = 0xef;
148 LRRA = 0;
149 LPXCD = 3;
150 LPICF = 0x08;
151 LPOLCF = 0;
152 LCKCON = 0x80;
153 PCPDEN = 0xff;
154 PCSEL = 0;
155
156 /* Enable LCD controller */
157 PKDIR |= 0x4;
158 PKSEL |= 0x4;
159 PKDATA &= ~0x4;
160
161 /* Enable CCFL backlighting circuit */
162 PBDIR |= 0x20;
163 PBSEL |= 0x20;
164 PBDATA &= ~0x20;
165
166 /* contrast control register */
167 PFDIR |= 0x1;
168 PFSEL &= ~0x1;
169 PWMR = 0x037F;
170#endif
171}
172
173void config_BSP(char *command, int size)
174{
175 printk(KERN_INFO "68VZ328 DragonBallVZ support (c) 2001 Lineo, Inc.\n");
176
177#if defined(CONFIG_BOOTPARAM)
178 strncpy(command, CONFIG_BOOTPARAM_STRING, size);
179 command[size-1] = 0;
180#else
181 memset(command, 0, size);
182#endif
183
184 init_hardware();
185
186 mach_sched_init = (void *)dragen2_sched_init;
187 mach_tick = dragen2_tick;
188 mach_gettimeoffset = dragen2_gettimeoffset;
189 mach_reset = dragen2_reset;
190 mach_gettod = dragen2_gettod;
191}