diff options
Diffstat (limited to 'arch/m68knommu/platform/coldfire/intc-simr.c')
-rw-r--r-- | arch/m68knommu/platform/coldfire/intc-simr.c | 24 |
1 files changed, 18 insertions, 6 deletions
diff --git a/arch/m68knommu/platform/coldfire/intc-simr.c b/arch/m68knommu/platform/coldfire/intc-simr.c index 3b614a3508fc..86fc2047d7ac 100644 --- a/arch/m68knommu/platform/coldfire/intc-simr.c +++ b/arch/m68knommu/platform/coldfire/intc-simr.c | |||
@@ -20,20 +20,32 @@ | |||
20 | 20 | ||
21 | static void intc_irq_mask(unsigned int irq) | 21 | static void intc_irq_mask(unsigned int irq) |
22 | { | 22 | { |
23 | if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECBASE + 63)) | 23 | if (irq >= MCFINT_VECBASE) { |
24 | __raw_writeb(irq - MCFINT_VECBASE, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_SIMR); | 24 | if (irq < MCFINT_VECBASE + 64) |
25 | __raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_SIMR); | ||
26 | else if ((irq < MCFINT_VECBASE + 128) && MCFINTC1_SIMR) | ||
27 | __raw_writeb(irq - MCFINT_VECBASE - 64, MCFINTC1_SIMR); | ||
28 | } | ||
25 | } | 29 | } |
26 | 30 | ||
27 | static void intc_irq_unmask(unsigned int irq) | 31 | static void intc_irq_unmask(unsigned int irq) |
28 | { | 32 | { |
29 | if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECBASE + 63)) | 33 | if (irq >= MCFINT_VECBASE) { |
30 | __raw_writeb(irq - MCFINT_VECBASE, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_CIMR); | 34 | if (irq < MCFINT_VECBASE + 64) |
35 | __raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_CIMR); | ||
36 | else if ((irq < MCFINT_VECBASE + 128) && MCFINTC1_CIMR) | ||
37 | __raw_writeb(irq - MCFINT_VECBASE - 64, MCFINTC1_CIMR); | ||
38 | } | ||
31 | } | 39 | } |
32 | 40 | ||
33 | static int intc_irq_set_type(unsigned int irq, unsigned int type) | 41 | static int intc_irq_set_type(unsigned int irq, unsigned int type) |
34 | { | 42 | { |
35 | if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECBASE + 63)) | 43 | if (irq >= MCFINT_VECBASE) { |
36 | __raw_writeb(5, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + irq - MCFINT_VECBASE); | 44 | if (irq < MCFINT_VECBASE + 64) |
45 | __raw_writeb(5, MCFINTC0_ICR0 + irq - MCFINT_VECBASE); | ||
46 | else if ((irq < MCFINT_VECBASE) && MCFINTC1_ICR0) | ||
47 | __raw_writeb(5, MCFINTC1_ICR0 + irq - MCFINT_VECBASE - 64); | ||
48 | } | ||
37 | return 0; | 49 | return 0; |
38 | } | 50 | } |
39 | 51 | ||