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Diffstat (limited to 'arch/m68knommu/platform/5407/config.c')
-rw-r--r--arch/m68knommu/platform/5407/config.c68
1 files changed, 22 insertions, 46 deletions
diff --git a/arch/m68knommu/platform/5407/config.c b/arch/m68knommu/platform/5407/config.c
index b41d942bf8d0..70ea789a400c 100644
--- a/arch/m68knommu/platform/5407/config.c
+++ b/arch/m68knommu/platform/5407/config.c
@@ -20,12 +20,6 @@
20 20
21/***************************************************************************/ 21/***************************************************************************/
22 22
23extern unsigned int mcf_timervector;
24extern unsigned int mcf_profilevector;
25extern unsigned int mcf_timerlevel;
26
27/***************************************************************************/
28
29static struct mcf_platform_uart m5407_uart_platform[] = { 23static struct mcf_platform_uart m5407_uart_platform[] = {
30 { 24 {
31 .mapbase = MCF_MBAR + MCFUART_BASE1, 25 .mapbase = MCF_MBAR + MCFUART_BASE1,
@@ -55,11 +49,11 @@ static void __init m5407_uart_init_line(int line, int irq)
55 if (line == 0) { 49 if (line == 0) {
56 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); 50 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
57 writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR); 51 writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
58 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1); 52 mcf_mapirq2imr(irq, MCFINTC_UART0);
59 } else if (line == 1) { 53 } else if (line == 1) {
60 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); 54 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
61 writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR); 55 writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
62 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2); 56 mcf_mapirq2imr(irq, MCFINTC_UART1);
63 } 57 }
64} 58}
65 59
@@ -74,35 +68,19 @@ static void __init m5407_uarts_init(void)
74 68
75/***************************************************************************/ 69/***************************************************************************/
76 70
77void mcf_autovector(unsigned int vec) 71static void __init m5407_timers_init(void)
78{
79 volatile unsigned char *mbar;
80
81 if ((vec >= 25) && (vec <= 31)) {
82 mbar = (volatile unsigned char *) MCF_MBAR;
83 vec = 0x1 << (vec - 24);
84 *(mbar + MCFSIM_AVR) |= vec;
85 mcf_setimr(mcf_getimr() & ~vec);
86 }
87}
88
89/***************************************************************************/
90
91void mcf_settimericr(unsigned int timer, unsigned int level)
92{ 72{
93 volatile unsigned char *icrp; 73 /* Timer1 is always used as system timer */
94 unsigned int icr, imr; 74 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
95 75 MCF_MBAR + MCFSIM_TIMER1ICR);
96 if (timer <= 2) { 76 mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
97 switch (timer) { 77
98 case 2: icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break; 78#ifdef CONFIG_HIGHPROFILE
99 default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break; 79 /* Timer2 is to be used as a high speed profile timer */
100 } 80 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
101 81 MCF_MBAR + MCFSIM_TIMER2ICR);
102 icrp = (volatile unsigned char *) (MCF_MBAR + icr); 82 mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
103 *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3; 83#endif
104 mcf_setimr(mcf_getimr() & ~imr);
105 }
106} 84}
107 85
108/***************************************************************************/ 86/***************************************************************************/
@@ -120,23 +98,21 @@ void m5407_cpu_reset(void)
120 98
121void __init config_BSP(char *commandp, int size) 99void __init config_BSP(char *commandp, int size)
122{ 100{
123 mcf_setimr(MCFSIM_IMR_MASKALL);
124
125#if defined(CONFIG_CLEOPATRA)
126 /* Different timer setup - to prevent device clash */
127 mcf_timervector = 30;
128 mcf_profilevector = 31;
129 mcf_timerlevel = 6;
130#endif
131
132 mach_reset = m5407_cpu_reset; 101 mach_reset = m5407_cpu_reset;
102 m5407_timers_init();
103 m5407_uarts_init();
104
105 /* Only support the external interrupts on their primary level */
106 mcf_mapirq2imr(25, MCFINTC_EINT1);
107 mcf_mapirq2imr(27, MCFINTC_EINT3);
108 mcf_mapirq2imr(29, MCFINTC_EINT5);
109 mcf_mapirq2imr(31, MCFINTC_EINT7);
133} 110}
134 111
135/***************************************************************************/ 112/***************************************************************************/
136 113
137static int __init init_BSP(void) 114static int __init init_BSP(void)
138{ 115{
139 m5407_uarts_init();
140 platform_add_devices(m5407_devices, ARRAY_SIZE(m5407_devices)); 116 platform_add_devices(m5407_devices, ARRAY_SIZE(m5407_devices));
141 return 0; 117 return 0;
142} 118}