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-rw-r--r--arch/m68knommu/platform/5206e/config.c58
1 files changed, 22 insertions, 36 deletions
diff --git a/arch/m68knommu/platform/5206e/config.c b/arch/m68knommu/platform/5206e/config.c
index 65887799db81..0f41ba82a3b5 100644
--- a/arch/m68knommu/platform/5206e/config.c
+++ b/arch/m68knommu/platform/5206e/config.c
@@ -15,6 +15,7 @@
15#include <asm/machdep.h> 15#include <asm/machdep.h>
16#include <asm/coldfire.h> 16#include <asm/coldfire.h>
17#include <asm/mcfsim.h> 17#include <asm/mcfsim.h>
18#include <asm/mcfuart.h>
18#include <asm/mcfdma.h> 19#include <asm/mcfdma.h>
19#include <asm/mcfuart.h> 20#include <asm/mcfuart.h>
20 21
@@ -49,11 +50,11 @@ static void __init m5206e_uart_init_line(int line, int irq)
49 if (line == 0) { 50 if (line == 0) {
50 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); 51 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
51 writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); 52 writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
52 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1); 53 mcf_mapirq2imr(irq, MCFINTC_UART0);
53 } else if (line == 1) { 54 } else if (line == 1) {
54 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); 55 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
55 writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); 56 writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
56 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2); 57 mcf_mapirq2imr(irq, MCFINTC_UART1);
57 } 58 }
58} 59}
59 60
@@ -68,38 +69,19 @@ static void __init m5206e_uarts_init(void)
68 69
69/***************************************************************************/ 70/***************************************************************************/
70 71
71void mcf_autovector(unsigned int vec) 72static void __init m5206e_timers_init(void)
72{
73 volatile unsigned char *mbar;
74 unsigned char icr;
75
76 if ((vec >= 25) && (vec <= 31)) {
77 vec -= 25;
78 mbar = (volatile unsigned char *) MCF_MBAR;
79 icr = MCFSIM_ICR_AUTOVEC | (vec << 3);
80 *(mbar + MCFSIM_ICR1 + vec) = icr;
81 vec = 0x1 << (vec + 1);
82 mcf_setimr(mcf_getimr() & ~vec);
83 }
84}
85
86/***************************************************************************/
87
88void mcf_settimericr(unsigned int timer, unsigned int level)
89{ 73{
90 volatile unsigned char *icrp; 74 /* Timer1 is always used as system timer */
91 unsigned int icr, imr; 75 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
92 76 MCF_MBAR + MCFSIM_TIMER1ICR);
93 if (timer <= 2) { 77 mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
94 switch (timer) { 78
95 case 2: icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break; 79#ifdef CONFIG_HIGHPROFILE
96 default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break; 80 /* Timer2 is to be used as a high speed profile timer */
97 } 81 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
98 82 MCF_MBAR + MCFSIM_TIMER2ICR);
99 icrp = (volatile unsigned char *) (MCF_MBAR + icr); 83 mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
100 *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3; 84#endif
101 mcf_setimr(mcf_getimr() & ~imr);
102 }
103} 85}
104 86
105/***************************************************************************/ 87/***************************************************************************/
@@ -117,8 +99,6 @@ void m5206e_cpu_reset(void)
117 99
118void __init config_BSP(char *commandp, int size) 100void __init config_BSP(char *commandp, int size)
119{ 101{
120 mcf_setimr(MCFSIM_IMR_MASKALL);
121
122#if defined(CONFIG_NETtel) 102#if defined(CONFIG_NETtel)
123 /* Copy command line from FLASH to local buffer... */ 103 /* Copy command line from FLASH to local buffer... */
124 memcpy(commandp, (char *) 0xf0004000, size); 104 memcpy(commandp, (char *) 0xf0004000, size);
@@ -126,13 +106,19 @@ void __init config_BSP(char *commandp, int size)
126#endif /* CONFIG_NETtel */ 106#endif /* CONFIG_NETtel */
127 107
128 mach_reset = m5206e_cpu_reset; 108 mach_reset = m5206e_cpu_reset;
109 m5206e_timers_init();
110 m5206e_uarts_init();
111
112 /* Only support the external interrupts on their primary level */
113 mcf_mapirq2imr(25, MCFINTC_EINT1);
114 mcf_mapirq2imr(28, MCFINTC_EINT4);
115 mcf_mapirq2imr(31, MCFINTC_EINT7);
129} 116}
130 117
131/***************************************************************************/ 118/***************************************************************************/
132 119
133static int __init init_BSP(void) 120static int __init init_BSP(void)
134{ 121{
135 m5206e_uarts_init();
136 platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices)); 122 platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices));
137 return 0; 123 return 0;
138} 124}