aboutsummaryrefslogtreecommitdiffstats
path: root/arch/m68k
diff options
context:
space:
mode:
Diffstat (limited to 'arch/m68k')
-rw-r--r--arch/m68k/include/asm/m527xsim.h24
-rw-r--r--arch/m68k/include/asm/mcfqspi.h2
-rw-r--r--arch/m68k/platform/527x/config.c20
3 files changed, 29 insertions, 17 deletions
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index 59bb776a5e3c..f1c5b2c8d447 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -59,6 +59,8 @@
59#define MCF_IRQ_FECTX1 (MCFINT2_VECBASE + MCFINT2_FECTX1) 59#define MCF_IRQ_FECTX1 (MCFINT2_VECBASE + MCFINT2_FECTX1)
60#define MCF_IRQ_FECENTC1 (MCFINT2_VECBASE + MCFINT2_FECENTC1) 60#define MCF_IRQ_FECENTC1 (MCFINT2_VECBASE + MCFINT2_FECENTC1)
61 61
62#define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI)
63
62/* 64/*
63 * SDRAM configuration registers. 65 * SDRAM configuration registers.
64 */ 66 */
@@ -103,6 +105,28 @@
103#define MCFFEC_BASE1 (MCF_IPSBAR + 0x1800) 105#define MCFFEC_BASE1 (MCF_IPSBAR + 0x1800)
104#define MCFFEC_SIZE1 0x800 106#define MCFFEC_SIZE1 0x800
105 107
108/*
109 * QSPI module.
110 */
111#define MCFQSPI_BASE (MCF_IPSBAR + 0x340)
112#define MCFQSPI_SIZE 0x40
113
114#ifdef CONFIG_M5271
115#define MCFQSPI_CS0 91
116#define MCFQSPI_CS1 92
117#define MCFQSPI_CS2 99
118#define MCFQSPI_CS3 103
119#endif
120#ifdef CONFIG_M5275
121#define MCFQSPI_CS0 59
122#define MCFQSPI_CS1 60
123#define MCFQSPI_CS2 61
124#define MCFQSPI_CS3 62
125#endif
126
127/*
128 * GPIO module.
129 */
106#ifdef CONFIG_M5271 130#ifdef CONFIG_M5271
107#define MCFGPIO_PODR_ADDR (MCF_IPSBAR + 0x100000) 131#define MCFGPIO_PODR_ADDR (MCF_IPSBAR + 0x100000)
108#define MCFGPIO_PODR_DATAH (MCF_IPSBAR + 0x100001) 132#define MCFGPIO_PODR_DATAH (MCF_IPSBAR + 0x100001)
diff --git a/arch/m68k/include/asm/mcfqspi.h b/arch/m68k/include/asm/mcfqspi.h
index e9a7e1a2c995..57fcbc2c0dac 100644
--- a/arch/m68k/include/asm/mcfqspi.h
+++ b/arch/m68k/include/asm/mcfqspi.h
@@ -21,7 +21,7 @@
21#ifndef mcfqspi_h 21#ifndef mcfqspi_h
22#define mcfqspi_h 22#define mcfqspi_h
23 23
24#if defined(CONFIG_M527x) || defined(CONFIG_M528x) 24#if defined(CONFIG_M528x)
25#define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340) 25#define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340)
26#elif defined(CONFIG_M532x) 26#elif defined(CONFIG_M532x)
27#define MCFQSPI_IOBASE 0xFC058000 27#define MCFQSPI_IOBASE 0xFC058000
diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c
index 018ac69ef242..e86ff3a0ba15 100644
--- a/arch/m68k/platform/527x/config.c
+++ b/arch/m68k/platform/527x/config.c
@@ -29,29 +29,17 @@
29#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) 29#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
30static struct resource m527x_qspi_resources[] = { 30static struct resource m527x_qspi_resources[] = {
31 { 31 {
32 .start = MCFQSPI_IOBASE, 32 .start = MCFQSPI_BASE,
33 .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, 33 .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1,
34 .flags = IORESOURCE_MEM, 34 .flags = IORESOURCE_MEM,
35 }, 35 },
36 { 36 {
37 .start = MCFINT_VECBASE + MCFINT_QSPI, 37 .start = MCF_IRQ_QSPI,
38 .end = MCFINT_VECBASE + MCFINT_QSPI, 38 .end = MCF_IRQ_QSPI,
39 .flags = IORESOURCE_IRQ, 39 .flags = IORESOURCE_IRQ,
40 }, 40 },
41}; 41};
42 42
43#if defined(CONFIG_M5271)
44#define MCFQSPI_CS0 91
45#define MCFQSPI_CS1 92
46#define MCFQSPI_CS2 99
47#define MCFQSPI_CS3 103
48#elif defined(CONFIG_M5275)
49#define MCFQSPI_CS0 59
50#define MCFQSPI_CS1 60
51#define MCFQSPI_CS2 61
52#define MCFQSPI_CS3 62
53#endif
54
55static int m527x_cs_setup(struct mcfqspi_cs_control *cs_control) 43static int m527x_cs_setup(struct mcfqspi_cs_control *cs_control)
56{ 44{
57 int status; 45 int status;