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-rw-r--r--arch/m68k/Kconfig1
-rw-r--r--arch/m68k/amiga/config.c174
-rw-r--r--arch/m68k/amiga/platform.c116
-rw-r--r--arch/m68k/include/asm/amigayle.h6
-rw-r--r--arch/m68k/include/asm/atomic.h2
-rw-r--r--arch/m68k/include/asm/cache.h2
-rw-r--r--arch/m68k/include/asm/m520xsim.h1
-rw-r--r--arch/m68k/include/asm/m523xsim.h5
-rw-r--r--arch/m68k/include/asm/m5249sim.h2
-rw-r--r--arch/m68k/include/asm/m527xsim.h7
-rw-r--r--arch/m68k/include/asm/m528xsim.h67
-rw-r--r--arch/m68k/include/asm/m532xsim.h1
-rw-r--r--arch/m68k/include/asm/mcfqspi.h64
-rw-r--r--arch/m68k/include/asm/mcfsmc.h187
-rw-r--r--arch/m68k/include/asm/processor.h4
-rw-r--r--arch/m68k/include/asm/scatterlist.h16
16 files changed, 212 insertions, 443 deletions
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index b5da298ba61d..2e3737b92ffc 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -7,6 +7,7 @@ config M68K
7 default y 7 default y
8 select HAVE_AOUT 8 select HAVE_AOUT
9 select HAVE_IDE 9 select HAVE_IDE
10 select GENERIC_ATOMIC64
10 11
11config MMU 12config MMU
12 bool 13 bool
diff --git a/arch/m68k/amiga/config.c b/arch/m68k/amiga/config.c
index d2cc35d98532..b1577f741fa8 100644
--- a/arch/m68k/amiga/config.c
+++ b/arch/m68k/amiga/config.c
@@ -97,10 +97,6 @@ static void amiga_get_model(char *model);
97static void amiga_get_hardware_list(struct seq_file *m); 97static void amiga_get_hardware_list(struct seq_file *m);
98/* amiga specific timer functions */ 98/* amiga specific timer functions */
99static unsigned long amiga_gettimeoffset(void); 99static unsigned long amiga_gettimeoffset(void);
100static int a3000_hwclk(int, struct rtc_time *);
101static int a2000_hwclk(int, struct rtc_time *);
102static int amiga_set_clock_mmss(unsigned long);
103static unsigned int amiga_get_ss(void);
104extern void amiga_mksound(unsigned int count, unsigned int ticks); 100extern void amiga_mksound(unsigned int count, unsigned int ticks);
105static void amiga_reset(void); 101static void amiga_reset(void);
106extern void amiga_init_sound(void); 102extern void amiga_init_sound(void);
@@ -138,10 +134,6 @@ static struct {
138 } 134 }
139}; 135};
140 136
141static struct resource rtc_resource = {
142 .start = 0x00dc0000, .end = 0x00dcffff
143};
144
145static struct resource ram_resource[NUM_MEMINFO]; 137static struct resource ram_resource[NUM_MEMINFO];
146 138
147 139
@@ -387,15 +379,6 @@ void __init config_amiga(void)
387 mach_get_model = amiga_get_model; 379 mach_get_model = amiga_get_model;
388 mach_get_hardware_list = amiga_get_hardware_list; 380 mach_get_hardware_list = amiga_get_hardware_list;
389 mach_gettimeoffset = amiga_gettimeoffset; 381 mach_gettimeoffset = amiga_gettimeoffset;
390 if (AMIGAHW_PRESENT(A3000_CLK)) {
391 mach_hwclk = a3000_hwclk;
392 rtc_resource.name = "A3000 RTC";
393 request_resource(&iomem_resource, &rtc_resource);
394 } else /* if (AMIGAHW_PRESENT(A2000_CLK)) */ {
395 mach_hwclk = a2000_hwclk;
396 rtc_resource.name = "A2000 RTC";
397 request_resource(&iomem_resource, &rtc_resource);
398 }
399 382
400 /* 383 /*
401 * default MAX_DMA=0xffffffff on all machines. If we don't do so, the SCSI 384 * default MAX_DMA=0xffffffff on all machines. If we don't do so, the SCSI
@@ -404,8 +387,6 @@ void __init config_amiga(void)
404 */ 387 */
405 mach_max_dma_address = 0xffffffff; 388 mach_max_dma_address = 0xffffffff;
406 389
407 mach_set_clock_mmss = amiga_set_clock_mmss;
408 mach_get_ss = amiga_get_ss;
409 mach_reset = amiga_reset; 390 mach_reset = amiga_reset;
410#if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE) 391#if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE)
411 mach_beep = amiga_mksound; 392 mach_beep = amiga_mksound;
@@ -530,161 +511,6 @@ static unsigned long amiga_gettimeoffset(void)
530 return ticks + offset; 511 return ticks + offset;
531} 512}
532 513
533static int a3000_hwclk(int op, struct rtc_time *t)
534{
535 tod_3000.cntrl1 = TOD3000_CNTRL1_HOLD;
536
537 if (!op) { /* read */
538 t->tm_sec = tod_3000.second1 * 10 + tod_3000.second2;
539 t->tm_min = tod_3000.minute1 * 10 + tod_3000.minute2;
540 t->tm_hour = tod_3000.hour1 * 10 + tod_3000.hour2;
541 t->tm_mday = tod_3000.day1 * 10 + tod_3000.day2;
542 t->tm_wday = tod_3000.weekday;
543 t->tm_mon = tod_3000.month1 * 10 + tod_3000.month2 - 1;
544 t->tm_year = tod_3000.year1 * 10 + tod_3000.year2;
545 if (t->tm_year <= 69)
546 t->tm_year += 100;
547 } else {
548 tod_3000.second1 = t->tm_sec / 10;
549 tod_3000.second2 = t->tm_sec % 10;
550 tod_3000.minute1 = t->tm_min / 10;
551 tod_3000.minute2 = t->tm_min % 10;
552 tod_3000.hour1 = t->tm_hour / 10;
553 tod_3000.hour2 = t->tm_hour % 10;
554 tod_3000.day1 = t->tm_mday / 10;
555 tod_3000.day2 = t->tm_mday % 10;
556 if (t->tm_wday != -1)
557 tod_3000.weekday = t->tm_wday;
558 tod_3000.month1 = (t->tm_mon + 1) / 10;
559 tod_3000.month2 = (t->tm_mon + 1) % 10;
560 if (t->tm_year >= 100)
561 t->tm_year -= 100;
562 tod_3000.year1 = t->tm_year / 10;
563 tod_3000.year2 = t->tm_year % 10;
564 }
565
566 tod_3000.cntrl1 = TOD3000_CNTRL1_FREE;
567
568 return 0;
569}
570
571static int a2000_hwclk(int op, struct rtc_time *t)
572{
573 int cnt = 5;
574
575 tod_2000.cntrl1 = TOD2000_CNTRL1_HOLD;
576
577 while ((tod_2000.cntrl1 & TOD2000_CNTRL1_BUSY) && cnt) {
578 tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD;
579 udelay(70);
580 tod_2000.cntrl1 |= TOD2000_CNTRL1_HOLD;
581 --cnt;
582 }
583
584 if (!cnt)
585 printk(KERN_INFO "hwclk: timed out waiting for RTC (0x%x)\n",
586 tod_2000.cntrl1);
587
588 if (!op) { /* read */
589 t->tm_sec = tod_2000.second1 * 10 + tod_2000.second2;
590 t->tm_min = tod_2000.minute1 * 10 + tod_2000.minute2;
591 t->tm_hour = (tod_2000.hour1 & 3) * 10 + tod_2000.hour2;
592 t->tm_mday = tod_2000.day1 * 10 + tod_2000.day2;
593 t->tm_wday = tod_2000.weekday;
594 t->tm_mon = tod_2000.month1 * 10 + tod_2000.month2 - 1;
595 t->tm_year = tod_2000.year1 * 10 + tod_2000.year2;
596 if (t->tm_year <= 69)
597 t->tm_year += 100;
598
599 if (!(tod_2000.cntrl3 & TOD2000_CNTRL3_24HMODE)) {
600 if (!(tod_2000.hour1 & TOD2000_HOUR1_PM) && t->tm_hour == 12)
601 t->tm_hour = 0;
602 else if ((tod_2000.hour1 & TOD2000_HOUR1_PM) && t->tm_hour != 12)
603 t->tm_hour += 12;
604 }
605 } else {
606 tod_2000.second1 = t->tm_sec / 10;
607 tod_2000.second2 = t->tm_sec % 10;
608 tod_2000.minute1 = t->tm_min / 10;
609 tod_2000.minute2 = t->tm_min % 10;
610 if (tod_2000.cntrl3 & TOD2000_CNTRL3_24HMODE)
611 tod_2000.hour1 = t->tm_hour / 10;
612 else if (t->tm_hour >= 12)
613 tod_2000.hour1 = TOD2000_HOUR1_PM +
614 (t->tm_hour - 12) / 10;
615 else
616 tod_2000.hour1 = t->tm_hour / 10;
617 tod_2000.hour2 = t->tm_hour % 10;
618 tod_2000.day1 = t->tm_mday / 10;
619 tod_2000.day2 = t->tm_mday % 10;
620 if (t->tm_wday != -1)
621 tod_2000.weekday = t->tm_wday;
622 tod_2000.month1 = (t->tm_mon + 1) / 10;
623 tod_2000.month2 = (t->tm_mon + 1) % 10;
624 if (t->tm_year >= 100)
625 t->tm_year -= 100;
626 tod_2000.year1 = t->tm_year / 10;
627 tod_2000.year2 = t->tm_year % 10;
628 }
629
630 tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD;
631
632 return 0;
633}
634
635static int amiga_set_clock_mmss(unsigned long nowtime)
636{
637 short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
638
639 if (AMIGAHW_PRESENT(A3000_CLK)) {
640 tod_3000.cntrl1 = TOD3000_CNTRL1_HOLD;
641
642 tod_3000.second1 = real_seconds / 10;
643 tod_3000.second2 = real_seconds % 10;
644 tod_3000.minute1 = real_minutes / 10;
645 tod_3000.minute2 = real_minutes % 10;
646
647 tod_3000.cntrl1 = TOD3000_CNTRL1_FREE;
648 } else /* if (AMIGAHW_PRESENT(A2000_CLK)) */ {
649 int cnt = 5;
650
651 tod_2000.cntrl1 |= TOD2000_CNTRL1_HOLD;
652
653 while ((tod_2000.cntrl1 & TOD2000_CNTRL1_BUSY) && cnt) {
654 tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD;
655 udelay(70);
656 tod_2000.cntrl1 |= TOD2000_CNTRL1_HOLD;
657 --cnt;
658 }
659
660 if (!cnt)
661 printk(KERN_INFO "set_clock_mmss: timed out waiting for RTC (0x%x)\n", tod_2000.cntrl1);
662
663 tod_2000.second1 = real_seconds / 10;
664 tod_2000.second2 = real_seconds % 10;
665 tod_2000.minute1 = real_minutes / 10;
666 tod_2000.minute2 = real_minutes % 10;
667
668 tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD;
669 }
670
671 return 0;
672}
673
674static unsigned int amiga_get_ss(void)
675{
676 unsigned int s;
677
678 if (AMIGAHW_PRESENT(A3000_CLK)) {
679 tod_3000.cntrl1 = TOD3000_CNTRL1_HOLD;
680 s = tod_3000.second1 * 10 + tod_3000.second2;
681 tod_3000.cntrl1 = TOD3000_CNTRL1_FREE;
682 } else /* if (AMIGAHW_PRESENT(A2000_CLK)) */ {
683 s = tod_2000.second1 * 10 + tod_2000.second2;
684 }
685 return s;
686}
687
688static NORET_TYPE void amiga_reset(void) 514static NORET_TYPE void amiga_reset(void)
689 ATTRIB_NORET; 515 ATTRIB_NORET;
690 516
diff --git a/arch/m68k/amiga/platform.c b/arch/m68k/amiga/platform.c
index 38f18bf14737..7fd8b41723ea 100644
--- a/arch/m68k/amiga/platform.c
+++ b/arch/m68k/amiga/platform.c
@@ -11,6 +11,7 @@
11#include <linux/zorro.h> 11#include <linux/zorro.h>
12 12
13#include <asm/amigahw.h> 13#include <asm/amigahw.h>
14#include <asm/amigayle.h>
14 15
15 16
16#ifdef CONFIG_ZORRO 17#ifdef CONFIG_ZORRO
@@ -55,11 +56,77 @@ static int __init amiga_init_bus(void)
55 56
56subsys_initcall(amiga_init_bus); 57subsys_initcall(amiga_init_bus);
57 58
58#endif /* CONFIG_ZORRO */ 59
60static int z_dev_present(zorro_id id)
61{
62 unsigned int i;
63
64 for (i = 0; i < zorro_num_autocon; i++)
65 if (zorro_autocon[i].rom.er_Manufacturer == ZORRO_MANUF(id) &&
66 zorro_autocon[i].rom.er_Product == ZORRO_PROD(id))
67 return 1;
68
69 return 0;
70}
71
72#else /* !CONFIG_ZORRO */
73
74static inline int z_dev_present(zorro_id id) { return 0; }
75
76#endif /* !CONFIG_ZORRO */
77
78
79static const struct resource a3000_scsi_resource __initconst = {
80 .start = 0xdd0000,
81 .end = 0xdd00ff,
82 .flags = IORESOURCE_MEM,
83};
84
85
86static const struct resource a4000t_scsi_resource __initconst = {
87 .start = 0xdd0000,
88 .end = 0xdd0fff,
89 .flags = IORESOURCE_MEM,
90};
91
92
93static const struct resource a1200_ide_resource __initconst = {
94 .start = 0xda0000,
95 .end = 0xda1fff,
96 .flags = IORESOURCE_MEM,
97};
98
99static const struct gayle_ide_platform_data a1200_ide_pdata __initconst = {
100 .base = 0xda0000,
101 .irqport = 0xda9000,
102 .explicit_ack = 1,
103};
104
105
106static const struct resource a4000_ide_resource __initconst = {
107 .start = 0xdd2000,
108 .end = 0xdd3fff,
109 .flags = IORESOURCE_MEM,
110};
111
112static const struct gayle_ide_platform_data a4000_ide_pdata __initconst = {
113 .base = 0xdd2020,
114 .irqport = 0xdd3020,
115 .explicit_ack = 0,
116};
117
118
119static const struct resource amiga_rtc_resource __initconst = {
120 .start = 0x00dc0000,
121 .end = 0x00dcffff,
122 .flags = IORESOURCE_MEM,
123};
59 124
60 125
61static int __init amiga_init_devices(void) 126static int __init amiga_init_devices(void)
62{ 127{
128 struct platform_device *pdev;
129
63 if (!MACH_IS_AMIGA) 130 if (!MACH_IS_AMIGA)
64 return -ENODEV; 131 return -ENODEV;
65 132
@@ -77,6 +144,53 @@ static int __init amiga_init_devices(void)
77 if (AMIGAHW_PRESENT(AMI_FLOPPY)) 144 if (AMIGAHW_PRESENT(AMI_FLOPPY))
78 platform_device_register_simple("amiga-floppy", -1, NULL, 0); 145 platform_device_register_simple("amiga-floppy", -1, NULL, 0);
79 146
147 if (AMIGAHW_PRESENT(A3000_SCSI))
148 platform_device_register_simple("amiga-a3000-scsi", -1,
149 &a3000_scsi_resource, 1);
150
151 if (AMIGAHW_PRESENT(A4000_SCSI))
152 platform_device_register_simple("amiga-a4000t-scsi", -1,
153 &a4000t_scsi_resource, 1);
154
155 if (AMIGAHW_PRESENT(A1200_IDE) ||
156 z_dev_present(ZORRO_PROD_MTEC_VIPER_MK_V_E_MATRIX_530_SCSI_IDE)) {
157 pdev = platform_device_register_simple("amiga-gayle-ide", -1,
158 &a1200_ide_resource, 1);
159 platform_device_add_data(pdev, &a1200_ide_pdata,
160 sizeof(a1200_ide_pdata));
161 }
162
163 if (AMIGAHW_PRESENT(A4000_IDE)) {
164 pdev = platform_device_register_simple("amiga-gayle-ide", -1,
165 &a4000_ide_resource, 1);
166 platform_device_add_data(pdev, &a4000_ide_pdata,
167 sizeof(a4000_ide_pdata));
168 }
169
170
171 /* other I/O hardware */
172 if (AMIGAHW_PRESENT(AMI_KEYBOARD))
173 platform_device_register_simple("amiga-keyboard", -1, NULL, 0);
174
175 if (AMIGAHW_PRESENT(AMI_MOUSE))
176 platform_device_register_simple("amiga-mouse", -1, NULL, 0);
177
178 if (AMIGAHW_PRESENT(AMI_SERIAL))
179 platform_device_register_simple("amiga-serial", -1, NULL, 0);
180
181 if (AMIGAHW_PRESENT(AMI_PARALLEL))
182 platform_device_register_simple("amiga-parallel", -1, NULL, 0);
183
184
185 /* real time clocks */
186 if (AMIGAHW_PRESENT(A2000_CLK))
187 platform_device_register_simple("rtc-msm6242", -1,
188 &amiga_rtc_resource, 1);
189
190 if (AMIGAHW_PRESENT(A3000_CLK))
191 platform_device_register_simple("rtc-rp5c01", -1,
192 &amiga_rtc_resource, 1);
193
80 return 0; 194 return 0;
81} 195}
82 196
diff --git a/arch/m68k/include/asm/amigayle.h b/arch/m68k/include/asm/amigayle.h
index bb5a6aa329f3..a01453d9c231 100644
--- a/arch/m68k/include/asm/amigayle.h
+++ b/arch/m68k/include/asm/amigayle.h
@@ -104,4 +104,10 @@ struct GAYLE {
104#define GAYLE_CFG_250NS 0x00 104#define GAYLE_CFG_250NS 0x00
105#define GAYLE_CFG_720NS 0x0c 105#define GAYLE_CFG_720NS 0x0c
106 106
107struct gayle_ide_platform_data {
108 unsigned long base;
109 unsigned long irqport;
110 int explicit_ack; /* A1200 IDE needs explicit ack */
111};
112
107#endif /* asm-m68k/amigayle.h */ 113#endif /* asm-m68k/amigayle.h */
diff --git a/arch/m68k/include/asm/atomic.h b/arch/m68k/include/asm/atomic.h
index 8d29145ebb27..eab36dcacf6c 100644
--- a/arch/m68k/include/asm/atomic.h
+++ b/arch/m68k/include/asm/atomic.h
@@ -3,3 +3,5 @@
3#else 3#else
4#include "atomic_mm.h" 4#include "atomic_mm.h"
5#endif 5#endif
6
7#include <asm-generic/atomic64.h>
diff --git a/arch/m68k/include/asm/cache.h b/arch/m68k/include/asm/cache.h
index fed3fd30de7e..ecafbe1718c3 100644
--- a/arch/m68k/include/asm/cache.h
+++ b/arch/m68k/include/asm/cache.h
@@ -8,4 +8,6 @@
8#define L1_CACHE_SHIFT 4 8#define L1_CACHE_SHIFT 4
9#define L1_CACHE_BYTES (1<< L1_CACHE_SHIFT) 9#define L1_CACHE_BYTES (1<< L1_CACHE_SHIFT)
10 10
11#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
12
11#endif 13#endif
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h
index ed2b69b96805..db824a4b136e 100644
--- a/arch/m68k/include/asm/m520xsim.h
+++ b/arch/m68k/include/asm/m520xsim.h
@@ -113,6 +113,7 @@
113 113
114#define MCF_GPIO_PAR_UART (0xA4036) 114#define MCF_GPIO_PAR_UART (0xA4036)
115#define MCF_GPIO_PAR_FECI2C (0xA4033) 115#define MCF_GPIO_PAR_FECI2C (0xA4033)
116#define MCF_GPIO_PAR_QSPI (0xA4034)
116#define MCF_GPIO_PAR_FEC (0xA4038) 117#define MCF_GPIO_PAR_FEC (0xA4038)
117 118
118#define MCF_GPIO_PAR_UART_PAR_URXD0 (0x0001) 119#define MCF_GPIO_PAR_UART_PAR_URXD0 (0x0001)
diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h
index a34894cf8e6f..e8d06b24a48e 100644
--- a/arch/m68k/include/asm/m523xsim.h
+++ b/arch/m68k/include/asm/m523xsim.h
@@ -127,5 +127,10 @@
127#define MCFGPIO_IRQ_MAX 8 127#define MCFGPIO_IRQ_MAX 8
128#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE 128#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE
129 129
130/*
131 * Pin Assignment
132*/
133#define MCFGPIO_PAR_QSPI (MCF_IPSBAR + 0x10004A)
134#define MCFGPIO_PAR_TIMER (MCF_IPSBAR + 0x10004C)
130/****************************************************************************/ 135/****************************************************************************/
131#endif /* m523xsim_h */ 136#endif /* m523xsim_h */
diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h
index 14bce877ed88..79b7b402f3c9 100644
--- a/arch/m68k/include/asm/m5249sim.h
+++ b/arch/m68k/include/asm/m5249sim.h
@@ -69,10 +69,12 @@
69#define MCFSIM_DMA1ICR MCFSIM_ICR7 /* DMA 1 ICR */ 69#define MCFSIM_DMA1ICR MCFSIM_ICR7 /* DMA 1 ICR */
70#define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */ 70#define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */
71#define MCFSIM_DMA3ICR MCFSIM_ICR9 /* DMA 3 ICR */ 71#define MCFSIM_DMA3ICR MCFSIM_ICR9 /* DMA 3 ICR */
72#define MCFSIM_QSPIICR MCFSIM_ICR10 /* QSPI ICR */
72 73
73/* 74/*
74 * Define system peripheral IRQ usage. 75 * Define system peripheral IRQ usage.
75 */ 76 */
77#define MCF_IRQ_QSPI 28 /* QSPI, Level 4 */
76#define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */ 78#define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */
77#define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */ 79#define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */
78 80
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index 453356d72d80..1feb46f108ce 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -31,6 +31,7 @@
31#define MCFINT_UART0 13 /* Interrupt number for UART0 */ 31#define MCFINT_UART0 13 /* Interrupt number for UART0 */
32#define MCFINT_UART1 14 /* Interrupt number for UART1 */ 32#define MCFINT_UART1 14 /* Interrupt number for UART1 */
33#define MCFINT_UART2 15 /* Interrupt number for UART2 */ 33#define MCFINT_UART2 15 /* Interrupt number for UART2 */
34#define MCFINT_QSPI 18 /* Interrupt number for QSPI */
34#define MCFINT_PIT1 36 /* Interrupt number for PIT1 */ 35#define MCFINT_PIT1 36 /* Interrupt number for PIT1 */
35 36
36/* 37/*
@@ -120,6 +121,9 @@
120#define MCFGPIO_PIN_MAX 100 121#define MCFGPIO_PIN_MAX 100
121#define MCFGPIO_IRQ_MAX 8 122#define MCFGPIO_IRQ_MAX 8
122#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE 123#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE
124
125#define MCFGPIO_PAR_QSPI (MCF_IPSBAR + 0x10004A)
126#define MCFGPIO_PAR_TIMER (MCF_IPSBAR + 0x10004C)
123#endif 127#endif
124 128
125#ifdef CONFIG_M5275 129#ifdef CONFIG_M5275
@@ -212,6 +216,8 @@
212#define MCFGPIO_PIN_MAX 148 216#define MCFGPIO_PIN_MAX 148
213#define MCFGPIO_IRQ_MAX 8 217#define MCFGPIO_IRQ_MAX 8
214#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE 218#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE
219
220#define MCFGPIO_PAR_QSPI (MCF_IPSBAR + 0x10007E)
215#endif 221#endif
216 222
217/* 223/*
@@ -223,6 +229,7 @@
223#define MCFEPORT_EPPDR (MCF_IPSBAR + 0x130005) 229#define MCFEPORT_EPPDR (MCF_IPSBAR + 0x130005)
224 230
225 231
232
226/* 233/*
227 * GPIO pins setups to enable the UARTs. 234 * GPIO pins setups to enable the UARTs.
228 */ 235 */
diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h
index e2ad1f42b657..891cbedad972 100644
--- a/arch/m68k/include/asm/m528xsim.h
+++ b/arch/m68k/include/asm/m528xsim.h
@@ -29,6 +29,7 @@
29 29
30#define MCFINT_VECBASE 64 /* Vector base number */ 30#define MCFINT_VECBASE 64 /* Vector base number */
31#define MCFINT_UART0 13 /* Interrupt number for UART0 */ 31#define MCFINT_UART0 13 /* Interrupt number for UART0 */
32#define MCFINT_QSPI 18 /* Interrupt number for QSPI */
32#define MCFINT_PIT1 55 /* Interrupt number for PIT1 */ 33#define MCFINT_PIT1 55 /* Interrupt number for PIT1 */
33 34
34/* 35/*
@@ -249,70 +250,4 @@
249#define MCF5282_I2C_I2SR_RXAK (0x01) // received acknowledge 250#define MCF5282_I2C_I2SR_RXAK (0x01) // received acknowledge
250 251
251 252
252
253/*********************************************************************
254*
255* Queued Serial Peripheral Interface (QSPI) Module
256*
257*********************************************************************/
258/* Derek - 21 Feb 2005 */
259/* change to the format used in I2C */
260/* Read/Write access macros for general use */
261#define MCF5282_QSPI_QMR MCF_IPSBAR + 0x0340
262#define MCF5282_QSPI_QDLYR MCF_IPSBAR + 0x0344
263#define MCF5282_QSPI_QWR MCF_IPSBAR + 0x0348
264#define MCF5282_QSPI_QIR MCF_IPSBAR + 0x034C
265#define MCF5282_QSPI_QAR MCF_IPSBAR + 0x0350
266#define MCF5282_QSPI_QDR MCF_IPSBAR + 0x0354
267#define MCF5282_QSPI_QCR MCF_IPSBAR + 0x0354
268
269/* Bit level definitions and macros */
270#define MCF5282_QSPI_QMR_MSTR (0x8000)
271#define MCF5282_QSPI_QMR_DOHIE (0x4000)
272#define MCF5282_QSPI_QMR_BITS_16 (0x0000)
273#define MCF5282_QSPI_QMR_BITS_8 (0x2000)
274#define MCF5282_QSPI_QMR_BITS_9 (0x2400)
275#define MCF5282_QSPI_QMR_BITS_10 (0x2800)
276#define MCF5282_QSPI_QMR_BITS_11 (0x2C00)
277#define MCF5282_QSPI_QMR_BITS_12 (0x3000)
278#define MCF5282_QSPI_QMR_BITS_13 (0x3400)
279#define MCF5282_QSPI_QMR_BITS_14 (0x3800)
280#define MCF5282_QSPI_QMR_BITS_15 (0x3C00)
281#define MCF5282_QSPI_QMR_CPOL (0x0200)
282#define MCF5282_QSPI_QMR_CPHA (0x0100)
283#define MCF5282_QSPI_QMR_BAUD(x) (((x)&0x00FF))
284
285#define MCF5282_QSPI_QDLYR_SPE (0x80)
286#define MCF5282_QSPI_QDLYR_QCD(x) (((x)&0x007F)<<8)
287#define MCF5282_QSPI_QDLYR_DTL(x) (((x)&0x00FF))
288
289#define MCF5282_QSPI_QWR_HALT (0x8000)
290#define MCF5282_QSPI_QWR_WREN (0x4000)
291#define MCF5282_QSPI_QWR_WRTO (0x2000)
292#define MCF5282_QSPI_QWR_CSIV (0x1000)
293#define MCF5282_QSPI_QWR_ENDQP(x) (((x)&0x000F)<<8)
294#define MCF5282_QSPI_QWR_CPTQP(x) (((x)&0x000F)<<4)
295#define MCF5282_QSPI_QWR_NEWQP(x) (((x)&0x000F))
296
297#define MCF5282_QSPI_QIR_WCEFB (0x8000)
298#define MCF5282_QSPI_QIR_ABRTB (0x4000)
299#define MCF5282_QSPI_QIR_ABRTL (0x1000)
300#define MCF5282_QSPI_QIR_WCEFE (0x0800)
301#define MCF5282_QSPI_QIR_ABRTE (0x0400)
302#define MCF5282_QSPI_QIR_SPIFE (0x0100)
303#define MCF5282_QSPI_QIR_WCEF (0x0008)
304#define MCF5282_QSPI_QIR_ABRT (0x0004)
305#define MCF5282_QSPI_QIR_SPIF (0x0001)
306
307#define MCF5282_QSPI_QAR_ADDR(x) (((x)&0x003F))
308
309#define MCF5282_QSPI_QDR_COMMAND(x) (((x)&0xFF00))
310#define MCF5282_QSPI_QCR_DATA(x) (((x)&0x00FF)<<8)
311#define MCF5282_QSPI_QCR_CONT (0x8000)
312#define MCF5282_QSPI_QCR_BITSE (0x4000)
313#define MCF5282_QSPI_QCR_DT (0x2000)
314#define MCF5282_QSPI_QCR_DSCK (0x1000)
315#define MCF5282_QSPI_QCR_CS (((x)&0x000F)<<8)
316
317/****************************************************************************/
318#endif /* m528xsim_h */ 253#endif /* m528xsim_h */
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h
index 36bf15aec9ae..c4bf1c81e3cf 100644
--- a/arch/m68k/include/asm/m532xsim.h
+++ b/arch/m68k/include/asm/m532xsim.h
@@ -17,6 +17,7 @@
17#define MCFINT_UART0 26 /* Interrupt number for UART0 */ 17#define MCFINT_UART0 26 /* Interrupt number for UART0 */
18#define MCFINT_UART1 27 /* Interrupt number for UART1 */ 18#define MCFINT_UART1 27 /* Interrupt number for UART1 */
19#define MCFINT_UART2 28 /* Interrupt number for UART2 */ 19#define MCFINT_UART2 28 /* Interrupt number for UART2 */
20#define MCFINT_QSPI 31 /* Interrupt number for QSPI */
20 21
21#define MCF_WTM_WCR MCF_REG16(0xFC098000) 22#define MCF_WTM_WCR MCF_REG16(0xFC098000)
22 23
diff --git a/arch/m68k/include/asm/mcfqspi.h b/arch/m68k/include/asm/mcfqspi.h
new file mode 100644
index 000000000000..39d90d51111d
--- /dev/null
+++ b/arch/m68k/include/asm/mcfqspi.h
@@ -0,0 +1,64 @@
1/*
2 * Definitions for Freescale Coldfire QSPI module
3 *
4 * Copyright 2010 Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19*/
20
21#ifndef mcfqspi_h
22#define mcfqspi_h
23
24#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)
25#define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340)
26#elif defined(CONFIG_M5249)
27#define MCFQSPI_IOBASE (MCF_MBAR + 0x300)
28#elif defined(CONFIG_M520x) || defined(CONFIG_M532x)
29#define MCFQSPI_IOBASE 0xFC058000
30#endif
31#define MCFQSPI_IOSIZE 0x40
32
33/**
34 * struct mcfqspi_cs_control - chip select control for the coldfire qspi driver
35 * @setup: setup the control; allocate gpio's, etc. May be NULL.
36 * @teardown: finish with the control; free gpio's, etc. May be NULL.
37 * @select: output the signals to select the device. Can not be NULL.
38 * @deselect: output the signals to deselect the device. Can not be NULL.
39 *
40 * The QSPI module has 4 hardware chip selects. We don't use them. Instead
41 * platforms are required to supply a mcfqspi_cs_control as a part of the
42 * platform data for each QSPI master controller. Only the select and
43 * deselect functions are required.
44*/
45struct mcfqspi_cs_control {
46 int (*setup)(struct mcfqspi_cs_control *);
47 void (*teardown)(struct mcfqspi_cs_control *);
48 void (*select)(struct mcfqspi_cs_control *, u8, bool);
49 void (*deselect)(struct mcfqspi_cs_control *, u8, bool);
50};
51
52/**
53 * struct mcfqspi_platform_data - platform data for the coldfire qspi driver
54 * @bus_num: board specific identifier for this qspi driver.
55 * @num_chipselects: number of chip selects supported by this qspi driver.
56 * @cs_control: platform dependent chip select control.
57*/
58struct mcfqspi_platform_data {
59 s16 bus_num;
60 u16 num_chipselect;
61 struct mcfqspi_cs_control *cs_control;
62};
63
64#endif /* mcfqspi_h */
diff --git a/arch/m68k/include/asm/mcfsmc.h b/arch/m68k/include/asm/mcfsmc.h
deleted file mode 100644
index 527bea5d6788..000000000000
--- a/arch/m68k/include/asm/mcfsmc.h
+++ /dev/null
@@ -1,187 +0,0 @@
1/****************************************************************************/
2
3/*
4 * mcfsmc.h -- SMC ethernet support for ColdFire environments.
5 *
6 * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 * (C) Copyright 2000, Lineo Inc. (www.lineo.com)
8 */
9
10/****************************************************************************/
11#ifndef mcfsmc_h
12#define mcfsmc_h
13/****************************************************************************/
14
15/*
16 * None of the current ColdFire targets that use the SMC91x111
17 * allow 8 bit accesses. So this code is 16bit access only.
18 */
19
20
21#undef outb
22#undef inb
23#undef outw
24#undef outwd
25#undef inw
26#undef outl
27#undef inl
28
29#undef outsb
30#undef outsw
31#undef outsl
32#undef insb
33#undef insw
34#undef insl
35
36/*
37 * Re-defines for ColdFire environment... The SMC part is
38 * mapped into memory space, so remap the PC-style in/out
39 * routines to handle that.
40 */
41#define outb smc_outb
42#define inb smc_inb
43#define outw smc_outw
44#define outwd smc_outwd
45#define inw smc_inw
46#define outl smc_outl
47#define inl smc_inl
48
49#define outsb smc_outsb
50#define outsw smc_outsw
51#define outsl smc_outsl
52#define insb smc_insb
53#define insw smc_insw
54#define insl smc_insl
55
56
57static inline int smc_inb(unsigned int addr)
58{
59 register unsigned short w;
60 w = *((volatile unsigned short *) (addr & ~0x1));
61 return(((addr & 0x1) ? w : (w >> 8)) & 0xff);
62}
63
64static inline void smc_outw(unsigned int val, unsigned int addr)
65{
66 *((volatile unsigned short *) addr) = (val << 8) | (val >> 8);
67}
68
69static inline int smc_inw(unsigned int addr)
70{
71 register unsigned short w;
72 w = *((volatile unsigned short *) addr);
73 return(((w << 8) | (w >> 8)) & 0xffff);
74}
75
76static inline void smc_outl(unsigned long val, unsigned int addr)
77{
78 *((volatile unsigned long *) addr) =
79 ((val << 8) & 0xff000000) | ((val >> 8) & 0x00ff0000) |
80 ((val << 8) & 0x0000ff00) | ((val >> 8) & 0x000000ff);
81}
82
83static inline void smc_outwd(unsigned int val, unsigned int addr)
84{
85 *((volatile unsigned short *) addr) = val;
86}
87
88
89/*
90 * The rep* functions are used to feed the data port with
91 * raw data. So we do not byte swap them when copying.
92 */
93
94static inline void smc_insb(unsigned int addr, void *vbuf, int unsigned long len)
95{
96 volatile unsigned short *rp;
97 unsigned short *buf, *ebuf;
98
99 buf = (unsigned short *) vbuf;
100 rp = (volatile unsigned short *) addr;
101
102 /* Copy as words for as long as possible */
103 for (ebuf = buf + (len >> 1); (buf < ebuf); )
104 *buf++ = *rp;
105
106 /* Lastly, handle left over byte */
107 if (len & 0x1)
108 *((unsigned char *) buf) = (*rp >> 8) & 0xff;
109}
110
111static inline void smc_insw(unsigned int addr, void *vbuf, unsigned long len)
112{
113 volatile unsigned short *rp;
114 unsigned short *buf, *ebuf;
115
116 buf = (unsigned short *) vbuf;
117 rp = (volatile unsigned short *) addr;
118 for (ebuf = buf + len; (buf < ebuf); )
119 *buf++ = *rp;
120}
121
122static inline void smc_insl(unsigned int addr, void *vbuf, unsigned long len)
123{
124 volatile unsigned long *rp;
125 unsigned long *buf, *ebuf;
126
127 buf = (unsigned long *) vbuf;
128 rp = (volatile unsigned long *) addr;
129 for (ebuf = buf + len; (buf < ebuf); )
130 *buf++ = *rp;
131}
132
133static inline void smc_outsw(unsigned int addr, const void *vbuf, unsigned long len)
134{
135 volatile unsigned short *rp;
136 unsigned short *buf, *ebuf;
137
138 buf = (unsigned short *) vbuf;
139 rp = (volatile unsigned short *) addr;
140 for (ebuf = buf + len; (buf < ebuf); )
141 *rp = *buf++;
142}
143
144static inline void smc_outsl(unsigned int addr, void *vbuf, unsigned long len)
145{
146 volatile unsigned long *rp;
147 unsigned long *buf, *ebuf;
148
149 buf = (unsigned long *) vbuf;
150 rp = (volatile unsigned long *) addr;
151 for (ebuf = buf + len; (buf < ebuf); )
152 *rp = *buf++;
153}
154
155
156#ifdef CONFIG_NETtel
157/*
158 * Re-map the address space of at least one of the SMC ethernet
159 * parts. Both parts power up decoding the same address, so we
160 * need to move one of them first, before doing enything else.
161 *
162 * We also increase the number of wait states for this part by one.
163 */
164
165void smc_remap(unsigned int ioaddr)
166{
167 static int once = 0;
168 extern unsigned short ppdata;
169 if (once++ == 0) {
170 *((volatile unsigned short *)MCFSIM_PADDR) = 0x00ec;
171 ppdata |= 0x0080;
172 *((volatile unsigned short *)MCFSIM_PADAT) = ppdata;
173 outw(0x0001, ioaddr + BANK_SELECT);
174 outw(0x0001, ioaddr + BANK_SELECT);
175 outw(0x0067, ioaddr + BASE);
176
177 ppdata &= ~0x0080;
178 *((volatile unsigned short *)MCFSIM_PADAT) = ppdata;
179 }
180
181 *((volatile unsigned short *)(MCF_MBAR+MCFSIM_CSCR3)) = 0x1180;
182}
183
184#endif
185
186/****************************************************************************/
187#endif /* mcfsmc_h */
diff --git a/arch/m68k/include/asm/processor.h b/arch/m68k/include/asm/processor.h
index cbd3d4751dd2..7a6a7590cc02 100644
--- a/arch/m68k/include/asm/processor.h
+++ b/arch/m68k/include/asm/processor.h
@@ -44,11 +44,15 @@ static inline void wrusp(unsigned long usp)
44 * User space process size: 3.75GB. This is hardcoded into a few places, 44 * User space process size: 3.75GB. This is hardcoded into a few places,
45 * so don't change it unless you know what you are doing. 45 * so don't change it unless you know what you are doing.
46 */ 46 */
47#ifdef CONFIG_MMU
47#ifndef CONFIG_SUN3 48#ifndef CONFIG_SUN3
48#define TASK_SIZE (0xF0000000UL) 49#define TASK_SIZE (0xF0000000UL)
49#else 50#else
50#define TASK_SIZE (0x0E000000UL) 51#define TASK_SIZE (0x0E000000UL)
51#endif 52#endif
53#else
54#define TASK_SIZE (0xFFFFFFFFUL)
55#endif
52 56
53#ifdef __KERNEL__ 57#ifdef __KERNEL__
54#define STACK_TOP TASK_SIZE 58#define STACK_TOP TASK_SIZE
diff --git a/arch/m68k/include/asm/scatterlist.h b/arch/m68k/include/asm/scatterlist.h
index e27ad902b1cf..175da06c6b95 100644
--- a/arch/m68k/include/asm/scatterlist.h
+++ b/arch/m68k/include/asm/scatterlist.h
@@ -1,23 +1,9 @@
1#ifndef _M68K_SCATTERLIST_H 1#ifndef _M68K_SCATTERLIST_H
2#define _M68K_SCATTERLIST_H 2#define _M68K_SCATTERLIST_H
3 3
4#include <linux/types.h> 4#include <asm-generic/scatterlist.h>
5
6struct scatterlist {
7#ifdef CONFIG_DEBUG_SG
8 unsigned long sg_magic;
9#endif
10 unsigned long page_link;
11 unsigned int offset;
12 unsigned int length;
13
14 dma_addr_t dma_address; /* A place to hang host-specific addresses at. */
15};
16 5
17/* This is bogus and should go away. */ 6/* This is bogus and should go away. */
18#define ISA_DMA_THRESHOLD (0x00ffffff) 7#define ISA_DMA_THRESHOLD (0x00ffffff)
19 8
20#define sg_dma_address(sg) ((sg)->dma_address)
21#define sg_dma_len(sg) ((sg)->length)
22
23#endif /* !(_M68K_SCATTERLIST_H) */ 9#endif /* !(_M68K_SCATTERLIST_H) */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-29 02:52:02 -0500