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Diffstat (limited to 'arch/m68k/platform/coldfire/m532x.c')
-rw-r--r--arch/m68k/platform/coldfire/m532x.c154
1 files changed, 133 insertions, 21 deletions
diff --git a/arch/m68k/platform/coldfire/m532x.c b/arch/m68k/platform/coldfire/m532x.c
index 5394223639f8..4819a44991ed 100644
--- a/arch/m68k/platform/coldfire/m532x.c
+++ b/arch/m68k/platform/coldfire/m532x.c
@@ -26,32 +26,144 @@
26#include <asm/mcfsim.h> 26#include <asm/mcfsim.h>
27#include <asm/mcfuart.h> 27#include <asm/mcfuart.h>
28#include <asm/mcfdma.h> 28#include <asm/mcfdma.h>
29#include <asm/mcfgpio.h>
30#include <asm/mcfwdebug.h> 29#include <asm/mcfwdebug.h>
30#include <asm/mcfclk.h>
31 31
32/***************************************************************************/ 32/***************************************************************************/
33 33
34struct mcf_gpio_chip mcf_gpio_chips[] = { 34DEFINE_CLK(0, "flexbus", 2, MCF_CLK);
35 MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR), 35DEFINE_CLK(0, "mcfcan.0", 8, MCF_CLK);
36 MCFGPF(FECH, 8, 8), 36DEFINE_CLK(0, "fec.0", 12, MCF_CLK);
37 MCFGPF(FECL, 16, 8), 37DEFINE_CLK(0, "edma", 17, MCF_CLK);
38 MCFGPF(SSI, 24, 5), 38DEFINE_CLK(0, "intc.0", 18, MCF_CLK);
39 MCFGPF(BUSCTL, 32, 4), 39DEFINE_CLK(0, "intc.1", 19, MCF_CLK);
40 MCFGPF(BE, 40, 4), 40DEFINE_CLK(0, "iack.0", 21, MCF_CLK);
41 MCFGPF(CS, 49, 5), 41DEFINE_CLK(0, "mcfi2c.0", 22, MCF_CLK);
42 MCFGPF(PWM, 58, 4), 42DEFINE_CLK(0, "mcfqspi.0", 23, MCF_CLK);
43 MCFGPF(FECI2C, 64, 4), 43DEFINE_CLK(0, "mcfuart.0", 24, MCF_BUSCLK);
44 MCFGPF(UART, 72, 8), 44DEFINE_CLK(0, "mcfuart.1", 25, MCF_BUSCLK);
45 MCFGPF(QSPI, 80, 6), 45DEFINE_CLK(0, "mcfuart.2", 26, MCF_BUSCLK);
46 MCFGPF(TIMER, 88, 4), 46DEFINE_CLK(0, "mcftmr.0", 28, MCF_CLK);
47 MCFGPF(LCDDATAH, 96, 2), 47DEFINE_CLK(0, "mcftmr.1", 29, MCF_CLK);
48 MCFGPF(LCDDATAM, 104, 8), 48DEFINE_CLK(0, "mcftmr.2", 30, MCF_CLK);
49 MCFGPF(LCDDATAL, 112, 8), 49DEFINE_CLK(0, "mcftmr.3", 31, MCF_CLK);
50 MCFGPF(LCDCTLH, 120, 1), 50
51 MCFGPF(LCDCTLL, 128, 8), 51DEFINE_CLK(0, "mcfpit.0", 32, MCF_CLK);
52DEFINE_CLK(0, "mcfpit.1", 33, MCF_CLK);
53DEFINE_CLK(0, "mcfpit.2", 34, MCF_CLK);
54DEFINE_CLK(0, "mcfpit.3", 35, MCF_CLK);
55DEFINE_CLK(0, "mcfpwm.0", 36, MCF_CLK);
56DEFINE_CLK(0, "mcfeport.0", 37, MCF_CLK);
57DEFINE_CLK(0, "mcfwdt.0", 38, MCF_CLK);
58DEFINE_CLK(0, "sys.0", 40, MCF_BUSCLK);
59DEFINE_CLK(0, "gpio.0", 41, MCF_BUSCLK);
60DEFINE_CLK(0, "mcfrtc.0", 42, MCF_CLK);
61DEFINE_CLK(0, "mcflcd.0", 43, MCF_CLK);
62DEFINE_CLK(0, "mcfusb-otg.0", 44, MCF_CLK);
63DEFINE_CLK(0, "mcfusb-host.0", 45, MCF_CLK);
64DEFINE_CLK(0, "sdram.0", 46, MCF_CLK);
65DEFINE_CLK(0, "ssi.0", 47, MCF_CLK);
66DEFINE_CLK(0, "pll.0", 48, MCF_CLK);
67
68DEFINE_CLK(1, "mdha.0", 32, MCF_CLK);
69DEFINE_CLK(1, "skha.0", 33, MCF_CLK);
70DEFINE_CLK(1, "rng.0", 34, MCF_CLK);
71
72struct clk *mcf_clks[] = {
73 &__clk_0_2, /* flexbus */
74 &__clk_0_8, /* mcfcan.0 */
75 &__clk_0_12, /* fec.0 */
76 &__clk_0_17, /* edma */
77 &__clk_0_18, /* intc.0 */
78 &__clk_0_19, /* intc.1 */
79 &__clk_0_21, /* iack.0 */
80 &__clk_0_22, /* mcfi2c.0 */
81 &__clk_0_23, /* mcfqspi.0 */
82 &__clk_0_24, /* mcfuart.0 */
83 &__clk_0_25, /* mcfuart.1 */
84 &__clk_0_26, /* mcfuart.2 */
85 &__clk_0_28, /* mcftmr.0 */
86 &__clk_0_29, /* mcftmr.1 */
87 &__clk_0_30, /* mcftmr.2 */
88 &__clk_0_31, /* mcftmr.3 */
89
90 &__clk_0_32, /* mcfpit.0 */
91 &__clk_0_33, /* mcfpit.1 */
92 &__clk_0_34, /* mcfpit.2 */
93 &__clk_0_35, /* mcfpit.3 */
94 &__clk_0_36, /* mcfpwm.0 */
95 &__clk_0_37, /* mcfeport.0 */
96 &__clk_0_38, /* mcfwdt.0 */
97 &__clk_0_40, /* sys.0 */
98 &__clk_0_41, /* gpio.0 */
99 &__clk_0_42, /* mcfrtc.0 */
100 &__clk_0_43, /* mcflcd.0 */
101 &__clk_0_44, /* mcfusb-otg.0 */
102 &__clk_0_45, /* mcfusb-host.0 */
103 &__clk_0_46, /* sdram.0 */
104 &__clk_0_47, /* ssi.0 */
105 &__clk_0_48, /* pll.0 */
106
107 &__clk_1_32, /* mdha.0 */
108 &__clk_1_33, /* skha.0 */
109 &__clk_1_34, /* rng.0 */
110 NULL,
111};
112
113static struct clk * const enable_clks[] __initconst = {
114 &__clk_0_2, /* flexbus */
115 &__clk_0_18, /* intc.0 */
116 &__clk_0_19, /* intc.1 */
117 &__clk_0_21, /* iack.0 */
118 &__clk_0_24, /* mcfuart.0 */
119 &__clk_0_25, /* mcfuart.1 */
120 &__clk_0_26, /* mcfuart.2 */
121
122 &__clk_0_32, /* mcfpit.0 */
123 &__clk_0_33, /* mcfpit.1 */
124 &__clk_0_37, /* mcfeport.0 */
125 &__clk_0_40, /* sys.0 */
126 &__clk_0_41, /* gpio.0 */
127 &__clk_0_46, /* sdram.0 */
128 &__clk_0_48, /* pll.0 */
129};
130
131static struct clk * const disable_clks[] __initconst = {
132 &__clk_0_8, /* mcfcan.0 */
133 &__clk_0_12, /* fec.0 */
134 &__clk_0_17, /* edma */
135 &__clk_0_22, /* mcfi2c.0 */
136 &__clk_0_23, /* mcfqspi.0 */
137 &__clk_0_28, /* mcftmr.0 */
138 &__clk_0_29, /* mcftmr.1 */
139 &__clk_0_30, /* mcftmr.2 */
140 &__clk_0_31, /* mcftmr.3 */
141 &__clk_0_34, /* mcfpit.2 */
142 &__clk_0_35, /* mcfpit.3 */
143 &__clk_0_36, /* mcfpwm.0 */
144 &__clk_0_38, /* mcfwdt.0 */
145 &__clk_0_42, /* mcfrtc.0 */
146 &__clk_0_43, /* mcflcd.0 */
147 &__clk_0_44, /* mcfusb-otg.0 */
148 &__clk_0_45, /* mcfusb-host.0 */
149 &__clk_0_47, /* ssi.0 */
150 &__clk_1_32, /* mdha.0 */
151 &__clk_1_33, /* skha.0 */
152 &__clk_1_34, /* rng.0 */
52}; 153};
53 154
54unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips); 155
156static void __init m532x_clk_init(void)
157{
158 unsigned i;
159
160 /* make sure these clocks are enabled */
161 for (i = 0; i < ARRAY_SIZE(enable_clks); ++i)
162 __clk_init_enabled(enable_clks[i]);
163 /* make sure these clocks are disabled */
164 for (i = 0; i < ARRAY_SIZE(disable_clks); ++i)
165 __clk_init_disabled(disable_clks[i]);
166}
55 167
56/***************************************************************************/ 168/***************************************************************************/
57 169
@@ -98,8 +210,8 @@ void __init config_BSP(char *commandp, int size)
98 memset(commandp, 0, size); 210 memset(commandp, 0, size);
99 } 211 }
100#endif 212#endif
101
102 mach_sched_init = hw_timer_init; 213 mach_sched_init = hw_timer_init;
214 m532x_clk_init();
103 m532x_uarts_init(); 215 m532x_uarts_init();
104 m532x_fec_init(); 216 m532x_fec_init();
105#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) 217#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 13:50:25 -0500