diff options
Diffstat (limited to 'arch/m68k/platform/532x/config.c')
-rw-r--r-- | arch/m68k/platform/532x/config.c | 221 |
1 files changed, 12 insertions, 209 deletions
diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/532x/config.c index ca51323f957b..2bec3477b739 100644 --- a/arch/m68k/platform/532x/config.c +++ b/arch/m68k/platform/532x/config.c | |||
@@ -21,214 +21,33 @@ | |||
21 | #include <linux/param.h> | 21 | #include <linux/param.h> |
22 | #include <linux/init.h> | 22 | #include <linux/init.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/spi/spi.h> | ||
25 | #include <linux/gpio.h> | ||
26 | #include <asm/machdep.h> | 24 | #include <asm/machdep.h> |
27 | #include <asm/coldfire.h> | 25 | #include <asm/coldfire.h> |
28 | #include <asm/mcfsim.h> | 26 | #include <asm/mcfsim.h> |
29 | #include <asm/mcfuart.h> | 27 | #include <asm/mcfuart.h> |
30 | #include <asm/mcfdma.h> | 28 | #include <asm/mcfdma.h> |
31 | #include <asm/mcfwdebug.h> | 29 | #include <asm/mcfwdebug.h> |
32 | #include <asm/mcfqspi.h> | ||
33 | 30 | ||
34 | /***************************************************************************/ | 31 | /***************************************************************************/ |
35 | 32 | ||
36 | static struct mcf_platform_uart m532x_uart_platform[] = { | 33 | #ifdef CONFIG_SPI_COLDFIRE_QSPI |
37 | { | ||
38 | .mapbase = MCFUART_BASE1, | ||
39 | .irq = MCFINT_VECBASE + MCFINT_UART0, | ||
40 | }, | ||
41 | { | ||
42 | .mapbase = MCFUART_BASE2, | ||
43 | .irq = MCFINT_VECBASE + MCFINT_UART1, | ||
44 | }, | ||
45 | { | ||
46 | .mapbase = MCFUART_BASE3, | ||
47 | .irq = MCFINT_VECBASE + MCFINT_UART2, | ||
48 | }, | ||
49 | { }, | ||
50 | }; | ||
51 | |||
52 | static struct platform_device m532x_uart = { | ||
53 | .name = "mcfuart", | ||
54 | .id = 0, | ||
55 | .dev.platform_data = m532x_uart_platform, | ||
56 | }; | ||
57 | |||
58 | static struct resource m532x_fec_resources[] = { | ||
59 | { | ||
60 | .start = 0xfc030000, | ||
61 | .end = 0xfc0307ff, | ||
62 | .flags = IORESOURCE_MEM, | ||
63 | }, | ||
64 | { | ||
65 | .start = 64 + 36, | ||
66 | .end = 64 + 36, | ||
67 | .flags = IORESOURCE_IRQ, | ||
68 | }, | ||
69 | { | ||
70 | .start = 64 + 40, | ||
71 | .end = 64 + 40, | ||
72 | .flags = IORESOURCE_IRQ, | ||
73 | }, | ||
74 | { | ||
75 | .start = 64 + 42, | ||
76 | .end = 64 + 42, | ||
77 | .flags = IORESOURCE_IRQ, | ||
78 | }, | ||
79 | }; | ||
80 | |||
81 | static struct platform_device m532x_fec = { | ||
82 | .name = "fec", | ||
83 | .id = 0, | ||
84 | .num_resources = ARRAY_SIZE(m532x_fec_resources), | ||
85 | .resource = m532x_fec_resources, | ||
86 | }; | ||
87 | |||
88 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
89 | static struct resource m532x_qspi_resources[] = { | ||
90 | { | ||
91 | .start = MCFQSPI_IOBASE, | ||
92 | .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, | ||
93 | .flags = IORESOURCE_MEM, | ||
94 | }, | ||
95 | { | ||
96 | .start = MCFINT_VECBASE + MCFINT_QSPI, | ||
97 | .end = MCFINT_VECBASE + MCFINT_QSPI, | ||
98 | .flags = IORESOURCE_IRQ, | ||
99 | }, | ||
100 | }; | ||
101 | |||
102 | #define MCFQSPI_CS0 84 | ||
103 | #define MCFQSPI_CS1 85 | ||
104 | #define MCFQSPI_CS2 86 | ||
105 | |||
106 | static int m532x_cs_setup(struct mcfqspi_cs_control *cs_control) | ||
107 | { | ||
108 | int status; | ||
109 | |||
110 | status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); | ||
111 | if (status) { | ||
112 | pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); | ||
113 | goto fail0; | ||
114 | } | ||
115 | status = gpio_direction_output(MCFQSPI_CS0, 1); | ||
116 | if (status) { | ||
117 | pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); | ||
118 | goto fail1; | ||
119 | } | ||
120 | |||
121 | status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); | ||
122 | if (status) { | ||
123 | pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); | ||
124 | goto fail1; | ||
125 | } | ||
126 | status = gpio_direction_output(MCFQSPI_CS1, 1); | ||
127 | if (status) { | ||
128 | pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); | ||
129 | goto fail2; | ||
130 | } | ||
131 | |||
132 | status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); | ||
133 | if (status) { | ||
134 | pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); | ||
135 | goto fail2; | ||
136 | } | ||
137 | status = gpio_direction_output(MCFQSPI_CS2, 1); | ||
138 | if (status) { | ||
139 | pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); | ||
140 | goto fail3; | ||
141 | } | ||
142 | |||
143 | return 0; | ||
144 | |||
145 | fail3: | ||
146 | gpio_free(MCFQSPI_CS2); | ||
147 | fail2: | ||
148 | gpio_free(MCFQSPI_CS1); | ||
149 | fail1: | ||
150 | gpio_free(MCFQSPI_CS0); | ||
151 | fail0: | ||
152 | return status; | ||
153 | } | ||
154 | |||
155 | static void m532x_cs_teardown(struct mcfqspi_cs_control *cs_control) | ||
156 | { | ||
157 | gpio_free(MCFQSPI_CS2); | ||
158 | gpio_free(MCFQSPI_CS1); | ||
159 | gpio_free(MCFQSPI_CS0); | ||
160 | } | ||
161 | |||
162 | static void m532x_cs_select(struct mcfqspi_cs_control *cs_control, | ||
163 | u8 chip_select, bool cs_high) | ||
164 | { | ||
165 | gpio_set_value(MCFQSPI_CS0 + chip_select, cs_high); | ||
166 | } | ||
167 | |||
168 | static void m532x_cs_deselect(struct mcfqspi_cs_control *cs_control, | ||
169 | u8 chip_select, bool cs_high) | ||
170 | { | ||
171 | gpio_set_value(MCFQSPI_CS0 + chip_select, !cs_high); | ||
172 | } | ||
173 | |||
174 | static struct mcfqspi_cs_control m532x_cs_control = { | ||
175 | .setup = m532x_cs_setup, | ||
176 | .teardown = m532x_cs_teardown, | ||
177 | .select = m532x_cs_select, | ||
178 | .deselect = m532x_cs_deselect, | ||
179 | }; | ||
180 | |||
181 | static struct mcfqspi_platform_data m532x_qspi_data = { | ||
182 | .bus_num = 0, | ||
183 | .num_chipselect = 3, | ||
184 | .cs_control = &m532x_cs_control, | ||
185 | }; | ||
186 | |||
187 | static struct platform_device m532x_qspi = { | ||
188 | .name = "mcfqspi", | ||
189 | .id = 0, | ||
190 | .num_resources = ARRAY_SIZE(m532x_qspi_resources), | ||
191 | .resource = m532x_qspi_resources, | ||
192 | .dev.platform_data = &m532x_qspi_data, | ||
193 | }; | ||
194 | 34 | ||
195 | static void __init m532x_qspi_init(void) | 35 | static void __init m532x_qspi_init(void) |
196 | { | 36 | { |
197 | /* setup QSPS pins for QSPI with gpio CS control */ | 37 | /* setup QSPS pins for QSPI with gpio CS control */ |
198 | writew(0x01f0, MCF_GPIO_PAR_QSPI); | 38 | writew(0x01f0, MCF_GPIO_PAR_QSPI); |
199 | } | 39 | } |
200 | #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ | ||
201 | 40 | ||
202 | 41 | #endif /* CONFIG_SPI_COLDFIRE_QSPI */ | |
203 | static struct platform_device *m532x_devices[] __initdata = { | ||
204 | &m532x_uart, | ||
205 | &m532x_fec, | ||
206 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
207 | &m532x_qspi, | ||
208 | #endif | ||
209 | }; | ||
210 | 42 | ||
211 | /***************************************************************************/ | 43 | /***************************************************************************/ |
212 | 44 | ||
213 | static void __init m532x_uart_init_line(int line, int irq) | ||
214 | { | ||
215 | if (line == 0) { | ||
216 | /* GPIO initialization */ | ||
217 | MCF_GPIO_PAR_UART |= 0x000F; | ||
218 | } else if (line == 1) { | ||
219 | /* GPIO initialization */ | ||
220 | MCF_GPIO_PAR_UART |= 0x0FF0; | ||
221 | } | ||
222 | } | ||
223 | |||
224 | static void __init m532x_uarts_init(void) | 45 | static void __init m532x_uarts_init(void) |
225 | { | 46 | { |
226 | const int nrlines = ARRAY_SIZE(m532x_uart_platform); | 47 | /* UART GPIO initialization */ |
227 | int line; | 48 | MCF_GPIO_PAR_UART |= 0x0FFF; |
228 | |||
229 | for (line = 0; (line < nrlines); line++) | ||
230 | m532x_uart_init_line(line, m532x_uart_platform[line].irq); | ||
231 | } | 49 | } |
50 | |||
232 | /***************************************************************************/ | 51 | /***************************************************************************/ |
233 | 52 | ||
234 | static void __init m532x_fec_init(void) | 53 | static void __init m532x_fec_init(void) |
@@ -242,14 +61,6 @@ static void __init m532x_fec_init(void) | |||
242 | 61 | ||
243 | /***************************************************************************/ | 62 | /***************************************************************************/ |
244 | 63 | ||
245 | static void m532x_cpu_reset(void) | ||
246 | { | ||
247 | local_irq_disable(); | ||
248 | __raw_writeb(MCF_RCR_SWRESET, MCF_RCR); | ||
249 | } | ||
250 | |||
251 | /***************************************************************************/ | ||
252 | |||
253 | void __init config_BSP(char *commandp, int size) | 64 | void __init config_BSP(char *commandp, int size) |
254 | { | 65 | { |
255 | #if !defined(CONFIG_BOOTPARAM) | 66 | #if !defined(CONFIG_BOOTPARAM) |
@@ -263,6 +74,13 @@ void __init config_BSP(char *commandp, int size) | |||
263 | } | 74 | } |
264 | #endif | 75 | #endif |
265 | 76 | ||
77 | mach_sched_init = hw_timer_init; | ||
78 | m532x_uarts_init(); | ||
79 | m532x_fec_init(); | ||
80 | #ifdef CONFIG_SPI_COLDFIRE_QSPI | ||
81 | m532x_qspi_init(); | ||
82 | #endif | ||
83 | |||
266 | #ifdef CONFIG_BDM_DISABLE | 84 | #ifdef CONFIG_BDM_DISABLE |
267 | /* | 85 | /* |
268 | * Disable the BDM clocking. This also turns off most of the rest of | 86 | * Disable the BDM clocking. This also turns off most of the rest of |
@@ -274,21 +92,6 @@ void __init config_BSP(char *commandp, int size) | |||
274 | } | 92 | } |
275 | 93 | ||
276 | /***************************************************************************/ | 94 | /***************************************************************************/ |
277 | |||
278 | static int __init init_BSP(void) | ||
279 | { | ||
280 | m532x_uarts_init(); | ||
281 | m532x_fec_init(); | ||
282 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
283 | m532x_qspi_init(); | ||
284 | #endif | ||
285 | platform_add_devices(m532x_devices, ARRAY_SIZE(m532x_devices)); | ||
286 | return 0; | ||
287 | } | ||
288 | |||
289 | arch_initcall(init_BSP); | ||
290 | |||
291 | /***************************************************************************/ | ||
292 | /* Board initialization */ | 95 | /* Board initialization */ |
293 | /***************************************************************************/ | 96 | /***************************************************************************/ |
294 | /* | 97 | /* |