diff options
Diffstat (limited to 'arch/m68k/mac/debug.c')
-rw-r--r-- | arch/m68k/mac/debug.c | 323 |
1 files changed, 157 insertions, 166 deletions
diff --git a/arch/m68k/mac/debug.c b/arch/m68k/mac/debug.c index 4eeb09dc0e8f..83990326099b 100644 --- a/arch/m68k/mac/debug.c +++ b/arch/m68k/mac/debug.c | |||
@@ -52,7 +52,7 @@ extern void mac_serial_print(const char *); | |||
52 | */ | 52 | */ |
53 | 53 | ||
54 | #ifdef DEBUG_SCREEN | 54 | #ifdef DEBUG_SCREEN |
55 | static int peng=0, line=0; | 55 | static int peng, line; |
56 | #endif | 56 | #endif |
57 | 57 | ||
58 | void mac_debugging_short(int pos, short num) | 58 | void mac_debugging_short(int pos, short num) |
@@ -74,15 +74,14 @@ void mac_debugging_short(int pos, short num) | |||
74 | } | 74 | } |
75 | 75 | ||
76 | /* calculate current offset */ | 76 | /* calculate current offset */ |
77 | pengoffset=(unsigned char *)(mac_videobase+(150+line*2)*mac_rowbytes) | 77 | pengoffset = (unsigned char *)mac_videobase + |
78 | +80*peng; | 78 | (150+line*2) * mac_rowbytes) + 80 * peng; |
79 | 79 | ||
80 | pptr=pengoffset; | 80 | pptr = pengoffset; |
81 | 81 | ||
82 | for(i=0;i<8*sizeof(short);i++) /* # of bits */ | 82 | for (i = 0; i < 8 * sizeof(short); i++) { /* # of bits */ |
83 | { | ||
84 | /* value mask for bit i, reverse order */ | 83 | /* value mask for bit i, reverse order */ |
85 | *pptr++ = (num & ( 1 << (8*sizeof(short)-i-1) ) ? 0xFF : 0x00); | 84 | *pptr++ = (num & (1 << (8*sizeof(short)-i-1)) ? 0xFF : 0x00); |
86 | } | 85 | } |
87 | 86 | ||
88 | peng++; | 87 | peng++; |
@@ -115,11 +114,10 @@ void mac_debugging_long(int pos, long addr) | |||
115 | pengoffset=(unsigned char *)(mac_videobase+(150+line*2)*mac_rowbytes) | 114 | pengoffset=(unsigned char *)(mac_videobase+(150+line*2)*mac_rowbytes) |
116 | +80*peng; | 115 | +80*peng; |
117 | 116 | ||
118 | pptr=pengoffset; | 117 | pptr = pengoffset; |
119 | 118 | ||
120 | for(i=0;i<8*sizeof(long);i++) /* # of bits */ | 119 | for (i = 0; i < 8 * sizeof(long); i++) { /* # of bits */ |
121 | { | 120 | *pptr++ = (addr & (1 << (8*sizeof(long)-i-1)) ? 0xFF : 0x00); |
122 | *pptr++ = (addr & ( 1 << (8*sizeof(long)-i-1) ) ? 0xFF : 0x00); | ||
123 | } | 121 | } |
124 | 122 | ||
125 | peng++; | 123 | peng++; |
@@ -136,16 +134,15 @@ void mac_debugging_long(int pos, long addr) | |||
136 | * TODO: serial debug code | 134 | * TODO: serial debug code |
137 | */ | 135 | */ |
138 | 136 | ||
139 | struct mac_SCC | 137 | struct mac_SCC { |
140 | { | 138 | u_char cha_b_ctrl; |
141 | u_char cha_b_ctrl; | 139 | u_char char_dummy1; |
142 | u_char char_dummy1; | 140 | u_char cha_a_ctrl; |
143 | u_char cha_a_ctrl; | 141 | u_char char_dummy2; |
144 | u_char char_dummy2; | 142 | u_char cha_b_data; |
145 | u_char cha_b_data; | 143 | u_char char_dummy3; |
146 | u_char char_dummy3; | 144 | u_char cha_a_data; |
147 | u_char cha_a_data; | 145 | }; |
148 | }; | ||
149 | 146 | ||
150 | # define scc (*((volatile struct mac_SCC*)mac_bi_data.sccbase)) | 147 | # define scc (*((volatile struct mac_SCC*)mac_bi_data.sccbase)) |
151 | 148 | ||
@@ -158,9 +155,9 @@ int mac_SCC_reset_done; | |||
158 | static int scc_port = -1; | 155 | static int scc_port = -1; |
159 | 156 | ||
160 | static struct console mac_console_driver = { | 157 | static struct console mac_console_driver = { |
161 | .name = "debug", | 158 | .name = "debug", |
162 | .flags = CON_PRINTBUFFER, | 159 | .flags = CON_PRINTBUFFER, |
163 | .index = -1, | 160 | .index = -1, |
164 | }; | 161 | }; |
165 | 162 | ||
166 | /* | 163 | /* |
@@ -178,8 +175,8 @@ static struct console mac_console_driver = { | |||
178 | * this driver if Mac. | 175 | * this driver if Mac. |
179 | */ | 176 | */ |
180 | 177 | ||
181 | void mac_debug_console_write (struct console *co, const char *str, | 178 | void mac_debug_console_write(struct console *co, const char *str, |
182 | unsigned int count) | 179 | unsigned int count) |
183 | { | 180 | { |
184 | mac_serial_print(str); | 181 | mac_serial_print(str); |
185 | } | 182 | } |
@@ -190,48 +187,50 @@ void mac_debug_console_write (struct console *co, const char *str, | |||
190 | 187 | ||
191 | #define uSEC 1 | 188 | #define uSEC 1 |
192 | 189 | ||
193 | static inline void mac_sccb_out (char c) | 190 | static inline void mac_sccb_out(char c) |
194 | { | 191 | { |
195 | int i; | 192 | int i; |
196 | do { | 193 | |
197 | for( i = uSEC; i > 0; --i ) | 194 | do { |
195 | for (i = uSEC; i > 0; --i) | ||
196 | barrier(); | ||
197 | } while (!(scc.cha_b_ctrl & 0x04)); /* wait for tx buf empty */ | ||
198 | for (i = uSEC; i > 0; --i) | ||
198 | barrier(); | 199 | barrier(); |
199 | } while (!(scc.cha_b_ctrl & 0x04)); /* wait for tx buf empty */ | 200 | scc.cha_b_data = c; |
200 | for( i = uSEC; i > 0; --i ) | ||
201 | barrier(); | ||
202 | scc.cha_b_data = c; | ||
203 | } | 201 | } |
204 | 202 | ||
205 | static inline void mac_scca_out (char c) | 203 | static inline void mac_scca_out(char c) |
206 | { | 204 | { |
207 | int i; | 205 | int i; |
208 | do { | 206 | |
209 | for( i = uSEC; i > 0; --i ) | 207 | do { |
208 | for (i = uSEC; i > 0; --i) | ||
209 | barrier(); | ||
210 | } while (!(scc.cha_a_ctrl & 0x04)); /* wait for tx buf empty */ | ||
211 | for (i = uSEC; i > 0; --i) | ||
210 | barrier(); | 212 | barrier(); |
211 | } while (!(scc.cha_a_ctrl & 0x04)); /* wait for tx buf empty */ | 213 | scc.cha_a_data = c; |
212 | for( i = uSEC; i > 0; --i ) | ||
213 | barrier(); | ||
214 | scc.cha_a_data = c; | ||
215 | } | 214 | } |
216 | 215 | ||
217 | void mac_sccb_console_write (struct console *co, const char *str, | 216 | void mac_sccb_console_write(struct console *co, const char *str, |
218 | unsigned int count) | 217 | unsigned int count) |
219 | { | 218 | { |
220 | while (count--) { | 219 | while (count--) { |
221 | if (*str == '\n') | 220 | if (*str == '\n') |
222 | mac_sccb_out( '\r' ); | 221 | mac_sccb_out('\r'); |
223 | mac_sccb_out( *str++ ); | 222 | mac_sccb_out(*str++); |
224 | } | 223 | } |
225 | } | 224 | } |
226 | 225 | ||
227 | void mac_scca_console_write (struct console *co, const char *str, | 226 | void mac_scca_console_write(struct console *co, const char *str, |
228 | unsigned int count) | 227 | unsigned int count) |
229 | { | 228 | { |
230 | while (count--) { | 229 | while (count--) { |
231 | if (*str == '\n') | 230 | if (*str == '\n') |
232 | mac_scca_out( '\r' ); | 231 | mac_scca_out('\r'); |
233 | mac_scca_out( *str++ ); | 232 | mac_scca_out(*str++); |
234 | } | 233 | } |
235 | } | 234 | } |
236 | 235 | ||
237 | 236 | ||
@@ -239,41 +238,41 @@ void mac_scca_console_write (struct console *co, const char *str, | |||
239 | * SCC serial ports. They're used by the debugging interface, kgdb, and the | 238 | * SCC serial ports. They're used by the debugging interface, kgdb, and the |
240 | * serial console code. */ | 239 | * serial console code. */ |
241 | #define SCCB_WRITE(reg,val) \ | 240 | #define SCCB_WRITE(reg,val) \ |
242 | do { \ | 241 | do { \ |
243 | int i; \ | 242 | int i; \ |
244 | scc.cha_b_ctrl = (reg); \ | 243 | scc.cha_b_ctrl = (reg); \ |
245 | for( i = uSEC; i > 0; --i ) \ | 244 | for (i = uSEC; i > 0; --i) \ |
246 | barrier(); \ | 245 | barrier(); \ |
247 | scc.cha_b_ctrl = (val); \ | 246 | scc.cha_b_ctrl = (val); \ |
248 | for( i = uSEC; i > 0; --i ) \ | 247 | for (i = uSEC; i > 0; --i) \ |
249 | barrier(); \ | 248 | barrier(); \ |
250 | } while(0) | 249 | } while(0) |
251 | 250 | ||
252 | #define SCCA_WRITE(reg,val) \ | 251 | #define SCCA_WRITE(reg,val) \ |
253 | do { \ | 252 | do { \ |
254 | int i; \ | 253 | int i; \ |
255 | scc.cha_a_ctrl = (reg); \ | 254 | scc.cha_a_ctrl = (reg); \ |
256 | for( i = uSEC; i > 0; --i ) \ | 255 | for (i = uSEC; i > 0; --i) \ |
257 | barrier(); \ | 256 | barrier(); \ |
258 | scc.cha_a_ctrl = (val); \ | 257 | scc.cha_a_ctrl = (val); \ |
259 | for( i = uSEC; i > 0; --i ) \ | 258 | for (i = uSEC; i > 0; --i) \ |
260 | barrier(); \ | 259 | barrier(); \ |
261 | } while(0) | 260 | } while(0) |
262 | 261 | ||
263 | /* loops_per_jiffy isn't initialized yet, so we can't use udelay(). This does a | 262 | /* loops_per_jiffy isn't initialized yet, so we can't use udelay(). This does a |
264 | * delay of ~ 60us. */ | 263 | * delay of ~ 60us. */ |
265 | /* Mac: loops_per_jiffy min. 19000 ^= .5 us; MFPDELAY was 0.6 us*/ | 264 | /* Mac: loops_per_jiffy min. 19000 ^= .5 us; MFPDELAY was 0.6 us*/ |
266 | #define LONG_DELAY() \ | 265 | #define LONG_DELAY() \ |
267 | do { \ | 266 | do { \ |
268 | int i; \ | 267 | int i; \ |
269 | for( i = 60*uSEC; i > 0; --i ) \ | 268 | for (i = 60*uSEC; i > 0; --i) \ |
270 | barrier(); \ | 269 | barrier(); \ |
271 | } while(0) | 270 | } while(0) |
272 | 271 | ||
273 | #ifndef CONFIG_SERIAL_CONSOLE | 272 | #ifndef CONFIG_SERIAL_CONSOLE |
274 | static void __init mac_init_scc_port( int cflag, int port ) | 273 | static void __init mac_init_scc_port(int cflag, int port) |
275 | #else | 274 | #else |
276 | void mac_init_scc_port( int cflag, int port ) | 275 | void mac_init_scc_port(int cflag, int port) |
277 | #endif | 276 | #endif |
278 | { | 277 | { |
279 | extern int mac_SCC_reset_done; | 278 | extern int mac_SCC_reset_done; |
@@ -292,71 +291,71 @@ void mac_init_scc_port( int cflag, int port ) | |||
292 | /* reg12 (BRG low) */ | 291 | /* reg12 (BRG low) */ |
293 | { 94, 62, 46, 22, 10, 4, 1, 0, 0 }; | 292 | { 94, 62, 46, 22, 10, 4, 1, 0, 0 }; |
294 | 293 | ||
295 | int baud = cflag & CBAUD; | 294 | int baud = cflag & CBAUD; |
296 | int clksrc, clkmode, div, reg3, reg5; | 295 | int clksrc, clkmode, div, reg3, reg5; |
297 | 296 | ||
298 | if (cflag & CBAUDEX) | 297 | if (cflag & CBAUDEX) |
299 | baud += B38400; | 298 | baud += B38400; |
300 | if (baud < B1200 || baud > B38400+2) | 299 | if (baud < B1200 || baud > B38400+2) |
301 | baud = B9600; /* use default 9600bps for non-implemented rates */ | 300 | baud = B9600; /* use default 9600bps for non-implemented rates */ |
302 | baud -= B1200; /* tables starts at 1200bps */ | 301 | baud -= B1200; /* tables starts at 1200bps */ |
303 | 302 | ||
304 | clksrc = clksrc_table[baud]; | 303 | clksrc = clksrc_table[baud]; |
305 | clkmode = clkmode_table[baud]; | 304 | clkmode = clkmode_table[baud]; |
306 | div = div_table[baud]; | 305 | div = div_table[baud]; |
307 | 306 | ||
308 | reg3 = (((cflag & CSIZE) == CS8) ? 0xc0 : 0x40); | 307 | reg3 = (((cflag & CSIZE) == CS8) ? 0xc0 : 0x40); |
309 | reg5 = (((cflag & CSIZE) == CS8) ? 0x60 : 0x20) | 0x82 /* assert DTR/RTS */; | 308 | reg5 = (((cflag & CSIZE) == CS8) ? 0x60 : 0x20) | 0x82 /* assert DTR/RTS */; |
310 | 309 | ||
311 | if (port == 1) { | 310 | if (port == 1) { |
312 | (void)scc.cha_b_ctrl; /* reset reg pointer */ | 311 | (void)scc.cha_b_ctrl; /* reset reg pointer */ |
313 | SCCB_WRITE( 9, 0xc0 ); /* reset */ | 312 | SCCB_WRITE(9, 0xc0); /* reset */ |
314 | LONG_DELAY(); /* extra delay after WR9 access */ | 313 | LONG_DELAY(); /* extra delay after WR9 access */ |
315 | SCCB_WRITE( 4, (cflag & PARENB) ? ((cflag & PARODD) ? 0x01 : 0x03) : 0 | | 314 | SCCB_WRITE(4, (cflag & PARENB) ? ((cflag & PARODD) ? 0x01 : 0x03) : 0 | |
316 | 0x04 /* 1 stopbit */ | | 315 | 0x04 /* 1 stopbit */ | |
317 | clkmode ); | 316 | clkmode); |
318 | SCCB_WRITE( 3, reg3 ); | 317 | SCCB_WRITE(3, reg3); |
319 | SCCB_WRITE( 5, reg5 ); | 318 | SCCB_WRITE(5, reg5); |
320 | SCCB_WRITE( 9, 0 ); /* no interrupts */ | 319 | SCCB_WRITE(9, 0); /* no interrupts */ |
321 | LONG_DELAY(); /* extra delay after WR9 access */ | 320 | LONG_DELAY(); /* extra delay after WR9 access */ |
322 | SCCB_WRITE( 10, 0 ); /* NRZ mode */ | 321 | SCCB_WRITE(10, 0); /* NRZ mode */ |
323 | SCCB_WRITE( 11, clksrc ); /* main clock source */ | 322 | SCCB_WRITE(11, clksrc); /* main clock source */ |
324 | SCCB_WRITE( 12, div ); /* BRG value */ | 323 | SCCB_WRITE(12, div); /* BRG value */ |
325 | SCCB_WRITE( 13, 0 ); /* BRG high byte */ | 324 | SCCB_WRITE(13, 0); /* BRG high byte */ |
326 | SCCB_WRITE( 14, 1 ); | 325 | SCCB_WRITE(14, 1); |
327 | SCCB_WRITE( 3, reg3 | 1 ); | 326 | SCCB_WRITE(3, reg3 | 1); |
328 | SCCB_WRITE( 5, reg5 | 8 ); | 327 | SCCB_WRITE(5, reg5 | 8); |
329 | } else if (port == 0) { | 328 | } else if (port == 0) { |
330 | (void)scc.cha_a_ctrl; /* reset reg pointer */ | 329 | (void)scc.cha_a_ctrl; /* reset reg pointer */ |
331 | SCCA_WRITE( 9, 0xc0 ); /* reset */ | 330 | SCCA_WRITE(9, 0xc0); /* reset */ |
332 | LONG_DELAY(); /* extra delay after WR9 access */ | 331 | LONG_DELAY(); /* extra delay after WR9 access */ |
333 | SCCA_WRITE( 4, (cflag & PARENB) ? ((cflag & PARODD) ? 0x01 : 0x03) : 0 | | 332 | SCCA_WRITE(4, (cflag & PARENB) ? ((cflag & PARODD) ? 0x01 : 0x03) : 0 | |
334 | 0x04 /* 1 stopbit */ | | 333 | 0x04 /* 1 stopbit */ | |
335 | clkmode ); | 334 | clkmode); |
336 | SCCA_WRITE( 3, reg3 ); | 335 | SCCA_WRITE(3, reg3); |
337 | SCCA_WRITE( 5, reg5 ); | 336 | SCCA_WRITE(5, reg5); |
338 | SCCA_WRITE( 9, 0 ); /* no interrupts */ | 337 | SCCA_WRITE(9, 0); /* no interrupts */ |
339 | LONG_DELAY(); /* extra delay after WR9 access */ | 338 | LONG_DELAY(); /* extra delay after WR9 access */ |
340 | SCCA_WRITE( 10, 0 ); /* NRZ mode */ | 339 | SCCA_WRITE(10, 0); /* NRZ mode */ |
341 | SCCA_WRITE( 11, clksrc ); /* main clock source */ | 340 | SCCA_WRITE(11, clksrc); /* main clock source */ |
342 | SCCA_WRITE( 12, div ); /* BRG value */ | 341 | SCCA_WRITE(12, div); /* BRG value */ |
343 | SCCA_WRITE( 13, 0 ); /* BRG high byte */ | 342 | SCCA_WRITE(13, 0); /* BRG high byte */ |
344 | SCCA_WRITE( 14, 1 ); | 343 | SCCA_WRITE(14, 1); |
345 | SCCA_WRITE( 3, reg3 | 1 ); | 344 | SCCA_WRITE(3, reg3 | 1); |
346 | SCCA_WRITE( 5, reg5 | 8 ); | 345 | SCCA_WRITE(5, reg5 | 8); |
347 | } | 346 | } |
348 | 347 | ||
349 | mac_SCC_reset_done = 1; | 348 | mac_SCC_reset_done = 1; |
350 | mac_SCC_init_done = 1; | 349 | mac_SCC_init_done = 1; |
351 | } | 350 | } |
352 | #endif /* DEBUG_SERIAL */ | 351 | #endif /* DEBUG_SERIAL */ |
353 | 352 | ||
354 | void mac_init_scca_port( int cflag ) | 353 | void mac_init_scca_port(int cflag) |
355 | { | 354 | { |
356 | mac_init_scc_port(cflag, 0); | 355 | mac_init_scc_port(cflag, 0); |
357 | } | 356 | } |
358 | 357 | ||
359 | void mac_init_sccb_port( int cflag ) | 358 | void mac_init_sccb_port(int cflag) |
360 | { | 359 | { |
361 | mac_init_scc_port(cflag, 1); | 360 | mac_init_scc_port(cflag, 1); |
362 | } | 361 | } |
@@ -364,34 +363,26 @@ void mac_init_sccb_port( int cflag ) | |||
364 | void __init mac_debug_init(void) | 363 | void __init mac_debug_init(void) |
365 | { | 364 | { |
366 | #ifdef DEBUG_SERIAL | 365 | #ifdef DEBUG_SERIAL |
367 | if ( !strcmp( m68k_debug_device, "ser" ) | 366 | if (!strcmp(m68k_debug_device, "ser") || |
368 | || !strcmp( m68k_debug_device, "ser1" )) { | 367 | !strcmp(m68k_debug_device, "ser1")) { |
369 | /* Mac modem port */ | 368 | /* Mac modem port */ |
370 | mac_init_scc_port( B9600|CS8, 0 ); | 369 | mac_init_scc_port(B9600|CS8, 0); |
371 | mac_console_driver.write = mac_scca_console_write; | 370 | mac_console_driver.write = mac_scca_console_write; |
372 | scc_port = 0; | 371 | scc_port = 0; |
373 | } | 372 | } else if (!strcmp(m68k_debug_device, "ser2")) { |
374 | else if (!strcmp( m68k_debug_device, "ser2" )) { | 373 | /* Mac printer port */ |
375 | /* Mac printer port */ | 374 | mac_init_scc_port(B9600|CS8, 1); |
376 | mac_init_scc_port( B9600|CS8, 1 ); | 375 | mac_console_driver.write = mac_sccb_console_write; |
377 | mac_console_driver.write = mac_sccb_console_write; | 376 | scc_port = 1; |
378 | scc_port = 1; | 377 | } |
379 | } | ||
380 | #endif | 378 | #endif |
381 | #ifdef DEBUG_HEADS | 379 | #ifdef DEBUG_HEADS |
382 | if ( !strcmp( m68k_debug_device, "scn" ) | 380 | if (!strcmp(m68k_debug_device, "scn") || |
383 | || !strcmp( m68k_debug_device, "con" )) { | 381 | !strcmp(m68k_debug_device, "con")) { |
384 | /* display, using head.S console routines */ | 382 | /* display, using head.S console routines */ |
385 | mac_console_driver.write = mac_debug_console_write; | 383 | mac_console_driver.write = mac_debug_console_write; |
386 | } | 384 | } |
387 | #endif | 385 | #endif |
388 | if (mac_console_driver.write) | 386 | if (mac_console_driver.write) |
389 | register_console(&mac_console_driver); | 387 | register_console(&mac_console_driver); |
390 | } | 388 | } |
391 | |||
392 | /* | ||
393 | * Local variables: | ||
394 | * c-indent-level: 4 | ||
395 | * tab-width: 8 | ||
396 | * End: | ||
397 | */ | ||