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-rw-r--r--arch/m68k/include/asm/amigahw.h1
-rw-r--r--arch/m68k/include/asm/atomic.h210
-rw-r--r--arch/m68k/include/asm/atomic_mm.h200
-rw-r--r--arch/m68k/include/asm/atomic_no.h155
-rw-r--r--arch/m68k/include/asm/cacheflush_no.h2
-rw-r--r--arch/m68k/include/asm/coldfire.h4
-rw-r--r--arch/m68k/include/asm/entry_mm.h11
-rw-r--r--arch/m68k/include/asm/entry_no.h10
-rw-r--r--arch/m68k/include/asm/gpio.h7
-rw-r--r--arch/m68k/include/asm/io_mm.h43
-rw-r--r--arch/m68k/include/asm/ioctls.h80
-rw-r--r--arch/m68k/include/asm/m548xgpt.h88
-rw-r--r--arch/m68k/include/asm/m548xsim.h55
-rw-r--r--arch/m68k/include/asm/machdep.h49
-rw-r--r--arch/m68k/include/asm/machdep_mm.h35
-rw-r--r--arch/m68k/include/asm/machdep_no.h26
-rw-r--r--arch/m68k/include/asm/mcfcache.h2
-rw-r--r--arch/m68k/include/asm/mcfsim.h2
-rw-r--r--arch/m68k/include/asm/mcfslt.h44
-rw-r--r--arch/m68k/include/asm/mcfuart.h9
-rw-r--r--arch/m68k/include/asm/motorola_pgtable.h2
-rw-r--r--arch/m68k/include/asm/page.h48
-rw-r--r--arch/m68k/include/asm/page_mm.h57
-rw-r--r--arch/m68k/include/asm/page_no.h51
-rw-r--r--arch/m68k/include/asm/string.h134
-rw-r--r--arch/m68k/include/asm/string_mm.h131
-rw-r--r--arch/m68k/include/asm/string_no.h126
-rw-r--r--arch/m68k/include/asm/sun3_pgtable.h2
-rw-r--r--arch/m68k/include/asm/system_mm.h2
-rw-r--r--arch/m68k/include/asm/system_no.h9
-rw-r--r--arch/m68k/include/asm/thread_info.h109
-rw-r--r--arch/m68k/include/asm/thread_info_mm.h71
-rw-r--r--arch/m68k/include/asm/thread_info_no.h102
-rw-r--r--arch/m68k/include/asm/traps.h275
-rw-r--r--arch/m68k/include/asm/traps_mm.h272
-rw-r--r--arch/m68k/include/asm/traps_no.h154
36 files changed, 1032 insertions, 1546 deletions
diff --git a/arch/m68k/include/asm/amigahw.h b/arch/m68k/include/asm/amigahw.h
index 5ca5dd951a4a..7a19b5686a4a 100644
--- a/arch/m68k/include/asm/amigahw.h
+++ b/arch/m68k/include/asm/amigahw.h
@@ -102,7 +102,6 @@ struct amiga_hw_present {
102 AMIGAHW_DECLARE(ALICE_NTSC); /* NTSC Alice (8374) */ 102 AMIGAHW_DECLARE(ALICE_NTSC); /* NTSC Alice (8374) */
103 AMIGAHW_DECLARE(MAGIC_REKICK); /* A3000 Magic Hard Rekick */ 103 AMIGAHW_DECLARE(MAGIC_REKICK); /* A3000 Magic Hard Rekick */
104 AMIGAHW_DECLARE(PCMCIA); /* PCMCIA Slot */ 104 AMIGAHW_DECLARE(PCMCIA); /* PCMCIA Slot */
105 AMIGAHW_DECLARE(GG2_ISA); /* GG2 Zorro2ISA Bridge */
106 AMIGAHW_DECLARE(ZORRO); /* Zorro AutoConfig */ 105 AMIGAHW_DECLARE(ZORRO); /* Zorro AutoConfig */
107 AMIGAHW_DECLARE(ZORRO3); /* Zorro III */ 106 AMIGAHW_DECLARE(ZORRO3); /* Zorro III */
108}; 107};
diff --git a/arch/m68k/include/asm/atomic.h b/arch/m68k/include/asm/atomic.h
index eab36dcacf6c..03ae3d14cd4a 100644
--- a/arch/m68k/include/asm/atomic.h
+++ b/arch/m68k/include/asm/atomic.h
@@ -1,7 +1,211 @@
1#ifdef __uClinux__ 1#ifndef __ARCH_M68K_ATOMIC__
2#include "atomic_no.h" 2#define __ARCH_M68K_ATOMIC__
3
4#include <linux/types.h>
5#include <asm/system.h>
6
7/*
8 * Atomic operations that C can't guarantee us. Useful for
9 * resource counting etc..
10 */
11
12/*
13 * We do not have SMP m68k systems, so we don't have to deal with that.
14 */
15
16#define ATOMIC_INIT(i) { (i) }
17
18#define atomic_read(v) (*(volatile int *)&(v)->counter)
19#define atomic_set(v, i) (((v)->counter) = i)
20
21/*
22 * The ColdFire parts cannot do some immediate to memory operations,
23 * so for them we do not specify the "i" asm constraint.
24 */
25#ifdef CONFIG_COLDFIRE
26#define ASM_DI "d"
3#else 27#else
4#include "atomic_mm.h" 28#define ASM_DI "di"
5#endif 29#endif
6 30
31static inline void atomic_add(int i, atomic_t *v)
32{
33 __asm__ __volatile__("addl %1,%0" : "+m" (*v) : ASM_DI (i));
34}
35
36static inline void atomic_sub(int i, atomic_t *v)
37{
38 __asm__ __volatile__("subl %1,%0" : "+m" (*v) : ASM_DI (i));
39}
40
41static inline void atomic_inc(atomic_t *v)
42{
43 __asm__ __volatile__("addql #1,%0" : "+m" (*v));
44}
45
46static inline void atomic_dec(atomic_t *v)
47{
48 __asm__ __volatile__("subql #1,%0" : "+m" (*v));
49}
50
51static inline int atomic_dec_and_test(atomic_t *v)
52{
53 char c;
54 __asm__ __volatile__("subql #1,%1; seq %0" : "=d" (c), "+m" (*v));
55 return c != 0;
56}
57
58static inline int atomic_inc_and_test(atomic_t *v)
59{
60 char c;
61 __asm__ __volatile__("addql #1,%1; seq %0" : "=d" (c), "+m" (*v));
62 return c != 0;
63}
64
65#ifdef CONFIG_RMW_INSNS
66
67static inline int atomic_add_return(int i, atomic_t *v)
68{
69 int t, tmp;
70
71 __asm__ __volatile__(
72 "1: movel %2,%1\n"
73 " addl %3,%1\n"
74 " casl %2,%1,%0\n"
75 " jne 1b"
76 : "+m" (*v), "=&d" (t), "=&d" (tmp)
77 : "g" (i), "2" (atomic_read(v)));
78 return t;
79}
80
81static inline int atomic_sub_return(int i, atomic_t *v)
82{
83 int t, tmp;
84
85 __asm__ __volatile__(
86 "1: movel %2,%1\n"
87 " subl %3,%1\n"
88 " casl %2,%1,%0\n"
89 " jne 1b"
90 : "+m" (*v), "=&d" (t), "=&d" (tmp)
91 : "g" (i), "2" (atomic_read(v)));
92 return t;
93}
94
95#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
96#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
97
98#else /* !CONFIG_RMW_INSNS */
99
100static inline int atomic_add_return(int i, atomic_t * v)
101{
102 unsigned long flags;
103 int t;
104
105 local_irq_save(flags);
106 t = atomic_read(v);
107 t += i;
108 atomic_set(v, t);
109 local_irq_restore(flags);
110
111 return t;
112}
113
114static inline int atomic_sub_return(int i, atomic_t * v)
115{
116 unsigned long flags;
117 int t;
118
119 local_irq_save(flags);
120 t = atomic_read(v);
121 t -= i;
122 atomic_set(v, t);
123 local_irq_restore(flags);
124
125 return t;
126}
127
128static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
129{
130 unsigned long flags;
131 int prev;
132
133 local_irq_save(flags);
134 prev = atomic_read(v);
135 if (prev == old)
136 atomic_set(v, new);
137 local_irq_restore(flags);
138 return prev;
139}
140
141static inline int atomic_xchg(atomic_t *v, int new)
142{
143 unsigned long flags;
144 int prev;
145
146 local_irq_save(flags);
147 prev = atomic_read(v);
148 atomic_set(v, new);
149 local_irq_restore(flags);
150 return prev;
151}
152
153#endif /* !CONFIG_RMW_INSNS */
154
155#define atomic_dec_return(v) atomic_sub_return(1, (v))
156#define atomic_inc_return(v) atomic_add_return(1, (v))
157
158static inline int atomic_sub_and_test(int i, atomic_t *v)
159{
160 char c;
161 __asm__ __volatile__("subl %2,%1; seq %0"
162 : "=d" (c), "+m" (*v)
163 : ASM_DI (i));
164 return c != 0;
165}
166
167static inline int atomic_add_negative(int i, atomic_t *v)
168{
169 char c;
170 __asm__ __volatile__("addl %2,%1; smi %0"
171 : "=d" (c), "+m" (*v)
172 : "id" (i));
173 return c != 0;
174}
175
176static inline void atomic_clear_mask(unsigned long mask, unsigned long *v)
177{
178 __asm__ __volatile__("andl %1,%0" : "+m" (*v) : "id" (~(mask)));
179}
180
181static inline void atomic_set_mask(unsigned long mask, unsigned long *v)
182{
183 __asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask));
184}
185
186static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
187{
188 int c, old;
189 c = atomic_read(v);
190 for (;;) {
191 if (unlikely(c == (u)))
192 break;
193 old = atomic_cmpxchg((v), c, c + (a));
194 if (likely(old == c))
195 break;
196 c = old;
197 }
198 return c != (u);
199}
200
201#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
202
203/* Atomic operations are already serializing */
204#define smp_mb__before_atomic_dec() barrier()
205#define smp_mb__after_atomic_dec() barrier()
206#define smp_mb__before_atomic_inc() barrier()
207#define smp_mb__after_atomic_inc() barrier()
208
209#include <asm-generic/atomic-long.h>
7#include <asm-generic/atomic64.h> 210#include <asm-generic/atomic64.h>
211#endif /* __ARCH_M68K_ATOMIC __ */
diff --git a/arch/m68k/include/asm/atomic_mm.h b/arch/m68k/include/asm/atomic_mm.h
deleted file mode 100644
index 6a223b3f7e74..000000000000
--- a/arch/m68k/include/asm/atomic_mm.h
+++ /dev/null
@@ -1,200 +0,0 @@
1#ifndef __ARCH_M68K_ATOMIC__
2#define __ARCH_M68K_ATOMIC__
3
4#include <linux/types.h>
5#include <asm/system.h>
6
7/*
8 * Atomic operations that C can't guarantee us. Useful for
9 * resource counting etc..
10 */
11
12/*
13 * We do not have SMP m68k systems, so we don't have to deal with that.
14 */
15
16#define ATOMIC_INIT(i) { (i) }
17
18#define atomic_read(v) (*(volatile int *)&(v)->counter)
19#define atomic_set(v, i) (((v)->counter) = i)
20
21static inline void atomic_add(int i, atomic_t *v)
22{
23 __asm__ __volatile__("addl %1,%0" : "+m" (*v) : "id" (i));
24}
25
26static inline void atomic_sub(int i, atomic_t *v)
27{
28 __asm__ __volatile__("subl %1,%0" : "+m" (*v) : "id" (i));
29}
30
31static inline void atomic_inc(atomic_t *v)
32{
33 __asm__ __volatile__("addql #1,%0" : "+m" (*v));
34}
35
36static inline void atomic_dec(atomic_t *v)
37{
38 __asm__ __volatile__("subql #1,%0" : "+m" (*v));
39}
40
41static inline int atomic_dec_and_test(atomic_t *v)
42{
43 char c;
44 __asm__ __volatile__("subql #1,%1; seq %0" : "=d" (c), "+m" (*v));
45 return c != 0;
46}
47
48static inline int atomic_inc_and_test(atomic_t *v)
49{
50 char c;
51 __asm__ __volatile__("addql #1,%1; seq %0" : "=d" (c), "+m" (*v));
52 return c != 0;
53}
54
55#ifdef CONFIG_RMW_INSNS
56
57static inline int atomic_add_return(int i, atomic_t *v)
58{
59 int t, tmp;
60
61 __asm__ __volatile__(
62 "1: movel %2,%1\n"
63 " addl %3,%1\n"
64 " casl %2,%1,%0\n"
65 " jne 1b"
66 : "+m" (*v), "=&d" (t), "=&d" (tmp)
67 : "g" (i), "2" (atomic_read(v)));
68 return t;
69}
70
71static inline int atomic_sub_return(int i, atomic_t *v)
72{
73 int t, tmp;
74
75 __asm__ __volatile__(
76 "1: movel %2,%1\n"
77 " subl %3,%1\n"
78 " casl %2,%1,%0\n"
79 " jne 1b"
80 : "+m" (*v), "=&d" (t), "=&d" (tmp)
81 : "g" (i), "2" (atomic_read(v)));
82 return t;
83}
84
85#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
86#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
87
88#else /* !CONFIG_RMW_INSNS */
89
90static inline int atomic_add_return(int i, atomic_t * v)
91{
92 unsigned long flags;
93 int t;
94
95 local_irq_save(flags);
96 t = atomic_read(v);
97 t += i;
98 atomic_set(v, t);
99 local_irq_restore(flags);
100
101 return t;
102}
103
104static inline int atomic_sub_return(int i, atomic_t * v)
105{
106 unsigned long flags;
107 int t;
108
109 local_irq_save(flags);
110 t = atomic_read(v);
111 t -= i;
112 atomic_set(v, t);
113 local_irq_restore(flags);
114
115 return t;
116}
117
118static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
119{
120 unsigned long flags;
121 int prev;
122
123 local_irq_save(flags);
124 prev = atomic_read(v);
125 if (prev == old)
126 atomic_set(v, new);
127 local_irq_restore(flags);
128 return prev;
129}
130
131static inline int atomic_xchg(atomic_t *v, int new)
132{
133 unsigned long flags;
134 int prev;
135
136 local_irq_save(flags);
137 prev = atomic_read(v);
138 atomic_set(v, new);
139 local_irq_restore(flags);
140 return prev;
141}
142
143#endif /* !CONFIG_RMW_INSNS */
144
145#define atomic_dec_return(v) atomic_sub_return(1, (v))
146#define atomic_inc_return(v) atomic_add_return(1, (v))
147
148static inline int atomic_sub_and_test(int i, atomic_t *v)
149{
150 char c;
151 __asm__ __volatile__("subl %2,%1; seq %0"
152 : "=d" (c), "+m" (*v)
153 : "id" (i));
154 return c != 0;
155}
156
157static inline int atomic_add_negative(int i, atomic_t *v)
158{
159 char c;
160 __asm__ __volatile__("addl %2,%1; smi %0"
161 : "=d" (c), "+m" (*v)
162 : "id" (i));
163 return c != 0;
164}
165
166static inline void atomic_clear_mask(unsigned long mask, unsigned long *v)
167{
168 __asm__ __volatile__("andl %1,%0" : "+m" (*v) : "id" (~(mask)));
169}
170
171static inline void atomic_set_mask(unsigned long mask, unsigned long *v)
172{
173 __asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask));
174}
175
176static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
177{
178 int c, old;
179 c = atomic_read(v);
180 for (;;) {
181 if (unlikely(c == (u)))
182 break;
183 old = atomic_cmpxchg((v), c, c + (a));
184 if (likely(old == c))
185 break;
186 c = old;
187 }
188 return c != (u);
189}
190
191#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
192
193/* Atomic operations are already serializing */
194#define smp_mb__before_atomic_dec() barrier()
195#define smp_mb__after_atomic_dec() barrier()
196#define smp_mb__before_atomic_inc() barrier()
197#define smp_mb__after_atomic_inc() barrier()
198
199#include <asm-generic/atomic-long.h>
200#endif /* __ARCH_M68K_ATOMIC __ */
diff --git a/arch/m68k/include/asm/atomic_no.h b/arch/m68k/include/asm/atomic_no.h
deleted file mode 100644
index 289310c63a8a..000000000000
--- a/arch/m68k/include/asm/atomic_no.h
+++ /dev/null
@@ -1,155 +0,0 @@
1#ifndef __ARCH_M68KNOMMU_ATOMIC__
2#define __ARCH_M68KNOMMU_ATOMIC__
3
4#include <linux/types.h>
5#include <asm/system.h>
6
7/*
8 * Atomic operations that C can't guarantee us. Useful for
9 * resource counting etc..
10 */
11
12/*
13 * We do not have SMP m68k systems, so we don't have to deal with that.
14 */
15
16#define ATOMIC_INIT(i) { (i) }
17
18#define atomic_read(v) (*(volatile int *)&(v)->counter)
19#define atomic_set(v, i) (((v)->counter) = i)
20
21static __inline__ void atomic_add(int i, atomic_t *v)
22{
23#ifdef CONFIG_COLDFIRE
24 __asm__ __volatile__("addl %1,%0" : "+m" (*v) : "d" (i));
25#else
26 __asm__ __volatile__("addl %1,%0" : "+m" (*v) : "di" (i));
27#endif
28}
29
30static __inline__ void atomic_sub(int i, atomic_t *v)
31{
32#ifdef CONFIG_COLDFIRE
33 __asm__ __volatile__("subl %1,%0" : "+m" (*v) : "d" (i));
34#else
35 __asm__ __volatile__("subl %1,%0" : "+m" (*v) : "di" (i));
36#endif
37}
38
39static __inline__ int atomic_sub_and_test(int i, atomic_t * v)
40{
41 char c;
42#ifdef CONFIG_COLDFIRE
43 __asm__ __volatile__("subl %2,%1; seq %0"
44 : "=d" (c), "+m" (*v)
45 : "d" (i));
46#else
47 __asm__ __volatile__("subl %2,%1; seq %0"
48 : "=d" (c), "+m" (*v)
49 : "di" (i));
50#endif
51 return c != 0;
52}
53
54static __inline__ void atomic_inc(volatile atomic_t *v)
55{
56 __asm__ __volatile__("addql #1,%0" : "+m" (*v));
57}
58
59/*
60 * atomic_inc_and_test - increment and test
61 * @v: pointer of type atomic_t
62 *
63 * Atomically increments @v by 1
64 * and returns true if the result is zero, or false for all
65 * other cases.
66 */
67
68static __inline__ int atomic_inc_and_test(volatile atomic_t *v)
69{
70 char c;
71 __asm__ __volatile__("addql #1,%1; seq %0" : "=d" (c), "+m" (*v));
72 return c != 0;
73}
74
75static __inline__ void atomic_dec(volatile atomic_t *v)
76{
77 __asm__ __volatile__("subql #1,%0" : "+m" (*v));
78}
79
80static __inline__ int atomic_dec_and_test(volatile atomic_t *v)
81{
82 char c;
83 __asm__ __volatile__("subql #1,%1; seq %0" : "=d" (c), "+m" (*v));
84 return c != 0;
85}
86
87static __inline__ void atomic_clear_mask(unsigned long mask, unsigned long *v)
88{
89 __asm__ __volatile__("andl %1,%0" : "+m" (*v) : "id" (~(mask)));
90}
91
92static __inline__ void atomic_set_mask(unsigned long mask, unsigned long *v)
93{
94 __asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask));
95}
96
97/* Atomic operations are already serializing */
98#define smp_mb__before_atomic_dec() barrier()
99#define smp_mb__after_atomic_dec() barrier()
100#define smp_mb__before_atomic_inc() barrier()
101#define smp_mb__after_atomic_inc() barrier()
102
103static inline int atomic_add_return(int i, atomic_t * v)
104{
105 unsigned long temp, flags;
106
107 local_irq_save(flags);
108 temp = *(long *)v;
109 temp += i;
110 *(long *)v = temp;
111 local_irq_restore(flags);
112
113 return temp;
114}
115
116#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
117
118static inline int atomic_sub_return(int i, atomic_t * v)
119{
120 unsigned long temp, flags;
121
122 local_irq_save(flags);
123 temp = *(long *)v;
124 temp -= i;
125 *(long *)v = temp;
126 local_irq_restore(flags);
127
128 return temp;
129}
130
131#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
132#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
133
134static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
135{
136 int c, old;
137 c = atomic_read(v);
138 for (;;) {
139 if (unlikely(c == (u)))
140 break;
141 old = atomic_cmpxchg((v), c, c + (a));
142 if (likely(old == c))
143 break;
144 c = old;
145 }
146 return c != (u);
147}
148
149#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
150
151#define atomic_dec_return(v) atomic_sub_return(1,(v))
152#define atomic_inc_return(v) atomic_add_return(1,(v))
153
154#include <asm-generic/atomic-long.h>
155#endif /* __ARCH_M68KNOMMU_ATOMIC __ */
diff --git a/arch/m68k/include/asm/cacheflush_no.h b/arch/m68k/include/asm/cacheflush_no.h
index 89f195656be7..7085bd51668b 100644
--- a/arch/m68k/include/asm/cacheflush_no.h
+++ b/arch/m68k/include/asm/cacheflush_no.h
@@ -29,7 +29,7 @@
29 29
30static inline void __flush_cache_all(void) 30static inline void __flush_cache_all(void)
31{ 31{
32#ifdef CONFIG_M5407 32#if defined(CONFIG_M5407) || defined(CONFIG_M548x)
33 /* 33 /*
34 * Use cpushl to push and invalidate all cache lines. 34 * Use cpushl to push and invalidate all cache lines.
35 * Gas doesn't seem to know how to generate the ColdFire 35 * Gas doesn't seem to know how to generate the ColdFire
diff --git a/arch/m68k/include/asm/coldfire.h b/arch/m68k/include/asm/coldfire.h
index 83a9fa4e618a..3b0a34d0fe33 100644
--- a/arch/m68k/include/asm/coldfire.h
+++ b/arch/m68k/include/asm/coldfire.h
@@ -32,7 +32,9 @@
32 */ 32 */
33#define MCF_MBAR 0x10000000 33#define MCF_MBAR 0x10000000
34#define MCF_MBAR2 0x80000000 34#define MCF_MBAR2 0x80000000
35#if defined(CONFIG_M520x) 35#if defined(CONFIG_M548x)
36#define MCF_IPSBAR MCF_MBAR
37#elif defined(CONFIG_M520x)
36#define MCF_IPSBAR 0xFC000000 38#define MCF_IPSBAR 0xFC000000
37#else 39#else
38#define MCF_IPSBAR 0x40000000 40#define MCF_IPSBAR 0x40000000
diff --git a/arch/m68k/include/asm/entry_mm.h b/arch/m68k/include/asm/entry_mm.h
index 474125886218..73b8c8fbed9c 100644
--- a/arch/m68k/include/asm/entry_mm.h
+++ b/arch/m68k/include/asm/entry_mm.h
@@ -3,6 +3,9 @@
3 3
4#include <asm/setup.h> 4#include <asm/setup.h>
5#include <asm/page.h> 5#include <asm/page.h>
6#ifdef __ASSEMBLY__
7#include <asm/thread_info.h>
8#endif
6 9
7/* 10/*
8 * Stack layout in 'ret_from_exception': 11 * Stack layout in 'ret_from_exception':
@@ -47,14 +50,6 @@
47 50
48LFLUSH_I_AND_D = 0x00000808 51LFLUSH_I_AND_D = 0x00000808
49 52
50/* process bits for task_struct.ptrace */
51PT_TRACESYS_OFF = 3
52PT_TRACESYS_BIT = 1
53PT_PTRACED_OFF = 3
54PT_PTRACED_BIT = 0
55PT_DTRACE_OFF = 3
56PT_DTRACE_BIT = 2
57
58#define SAVE_ALL_INT save_all_int 53#define SAVE_ALL_INT save_all_int
59#define SAVE_ALL_SYS save_all_sys 54#define SAVE_ALL_SYS save_all_sys
60#define RESTORE_ALL restore_all 55#define RESTORE_ALL restore_all
diff --git a/arch/m68k/include/asm/entry_no.h b/arch/m68k/include/asm/entry_no.h
index 80e41492aa2a..26be277394f9 100644
--- a/arch/m68k/include/asm/entry_no.h
+++ b/arch/m68k/include/asm/entry_no.h
@@ -32,16 +32,6 @@
32 32
33#ifdef __ASSEMBLY__ 33#ifdef __ASSEMBLY__
34 34
35/* process bits for task_struct.flags */
36PF_TRACESYS_OFF = 3
37PF_TRACESYS_BIT = 5
38PF_PTRACED_OFF = 3
39PF_PTRACED_BIT = 4
40PF_DTRACE_OFF = 1
41PF_DTRACE_BIT = 5
42
43LENOSYS = 38
44
45#define SWITCH_STACK_SIZE (6*4+4) /* Includes return address */ 35#define SWITCH_STACK_SIZE (6*4+4) /* Includes return address */
46 36
47/* 37/*
diff --git a/arch/m68k/include/asm/gpio.h b/arch/m68k/include/asm/gpio.h
index 283214dc65a7..1b57adbafad5 100644
--- a/arch/m68k/include/asm/gpio.h
+++ b/arch/m68k/include/asm/gpio.h
@@ -36,7 +36,8 @@
36 */ 36 */
37#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \ 37#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
38 defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ 38 defined(CONFIG_M520x) || defined(CONFIG_M523x) || \
39 defined(CONFIG_M527x) || defined(CONFIG_M528x) || defined(CONFIG_M532x) 39 defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
40 defined(CONFIG_M532x) || defined(CONFIG_M548x)
40 41
41/* These parts have GPIO organized by 8 bit ports */ 42/* These parts have GPIO organized by 8 bit ports */
42 43
@@ -136,6 +137,8 @@ static inline u32 __mcf_gpio_ppdr(unsigned gpio)
136#endif 137#endif
137 else 138 else
138 return MCFGPIO_PPDR + mcfgpio_port(gpio - MCFGPIO_SCR_START); 139 return MCFGPIO_PPDR + mcfgpio_port(gpio - MCFGPIO_SCR_START);
140#else
141 return 0;
139#endif 142#endif
140} 143}
141 144
@@ -173,6 +176,8 @@ static inline u32 __mcf_gpio_podr(unsigned gpio)
173#endif 176#endif
174 else 177 else
175 return MCFGPIO_PODR + mcfgpio_port(gpio - MCFGPIO_SCR_START); 178 return MCFGPIO_PODR + mcfgpio_port(gpio - MCFGPIO_SCR_START);
179#else
180 return 0;
176#endif 181#endif
177} 182}
178 183
diff --git a/arch/m68k/include/asm/io_mm.h b/arch/m68k/include/asm/io_mm.h
index 9e673e3bd434..0fb3468000e7 100644
--- a/arch/m68k/include/asm/io_mm.h
+++ b/arch/m68k/include/asm/io_mm.h
@@ -49,23 +49,6 @@
49#define MULTI_ISA 0 49#define MULTI_ISA 0
50#endif /* Q40 */ 50#endif /* Q40 */
51 51
52/* GG-II Zorro to ISA bridge */
53#ifdef CONFIG_GG2
54
55extern unsigned long gg2_isa_base;
56#define GG2_ISA_IO_B(ioaddr) (gg2_isa_base+1+((unsigned long)(ioaddr)*4))
57#define GG2_ISA_IO_W(ioaddr) (gg2_isa_base+ ((unsigned long)(ioaddr)*4))
58#define GG2_ISA_MEM_B(madr) (gg2_isa_base+1+(((unsigned long)(madr)*4) & 0xfffff))
59#define GG2_ISA_MEM_W(madr) (gg2_isa_base+ (((unsigned long)(madr)*4) & 0xfffff))
60
61#ifndef MULTI_ISA
62#define MULTI_ISA 0
63#else
64#undef MULTI_ISA
65#define MULTI_ISA 1
66#endif
67#endif /* GG2 */
68
69#ifdef CONFIG_AMIGA_PCMCIA 52#ifdef CONFIG_AMIGA_PCMCIA
70#include <asm/amigayle.h> 53#include <asm/amigayle.h>
71 54
@@ -89,8 +72,7 @@ extern unsigned long gg2_isa_base;
89#endif 72#endif
90 73
91#define ISA_TYPE_Q40 (1) 74#define ISA_TYPE_Q40 (1)
92#define ISA_TYPE_GG2 (2) 75#define ISA_TYPE_AG (2)
93#define ISA_TYPE_AG (3)
94 76
95#if defined(CONFIG_Q40) && !defined(MULTI_ISA) 77#if defined(CONFIG_Q40) && !defined(MULTI_ISA)
96#define ISA_TYPE ISA_TYPE_Q40 78#define ISA_TYPE ISA_TYPE_Q40
@@ -100,10 +82,6 @@ extern unsigned long gg2_isa_base;
100#define ISA_TYPE ISA_TYPE_AG 82#define ISA_TYPE ISA_TYPE_AG
101#define ISA_SEX 1 83#define ISA_SEX 1
102#endif 84#endif
103#if defined(CONFIG_GG2) && !defined(MULTI_ISA)
104#define ISA_TYPE ISA_TYPE_GG2
105#define ISA_SEX 0
106#endif
107 85
108#ifdef MULTI_ISA 86#ifdef MULTI_ISA
109extern int isa_type; 87extern int isa_type;
@@ -125,9 +103,6 @@ static inline u8 __iomem *isa_itb(unsigned long addr)
125#ifdef CONFIG_Q40 103#ifdef CONFIG_Q40
126 case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_IO_B(addr); 104 case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_IO_B(addr);
127#endif 105#endif
128#ifdef CONFIG_GG2
129 case ISA_TYPE_GG2: return (u8 __iomem *)GG2_ISA_IO_B(addr);
130#endif
131#ifdef CONFIG_AMIGA_PCMCIA 106#ifdef CONFIG_AMIGA_PCMCIA
132 case ISA_TYPE_AG: return (u8 __iomem *)AG_ISA_IO_B(addr); 107 case ISA_TYPE_AG: return (u8 __iomem *)AG_ISA_IO_B(addr);
133#endif 108#endif
@@ -141,9 +116,6 @@ static inline u16 __iomem *isa_itw(unsigned long addr)
141#ifdef CONFIG_Q40 116#ifdef CONFIG_Q40
142 case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_IO_W(addr); 117 case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_IO_W(addr);
143#endif 118#endif
144#ifdef CONFIG_GG2
145 case ISA_TYPE_GG2: return (u16 __iomem *)GG2_ISA_IO_W(addr);
146#endif
147#ifdef CONFIG_AMIGA_PCMCIA 119#ifdef CONFIG_AMIGA_PCMCIA
148 case ISA_TYPE_AG: return (u16 __iomem *)AG_ISA_IO_W(addr); 120 case ISA_TYPE_AG: return (u16 __iomem *)AG_ISA_IO_W(addr);
149#endif 121#endif
@@ -167,9 +139,6 @@ static inline u8 __iomem *isa_mtb(unsigned long addr)
167#ifdef CONFIG_Q40 139#ifdef CONFIG_Q40
168 case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_MEM_B(addr); 140 case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_MEM_B(addr);
169#endif 141#endif
170#ifdef CONFIG_GG2
171 case ISA_TYPE_GG2: return (u8 __iomem *)GG2_ISA_MEM_B(addr);
172#endif
173#ifdef CONFIG_AMIGA_PCMCIA 142#ifdef CONFIG_AMIGA_PCMCIA
174 case ISA_TYPE_AG: return (u8 __iomem *)addr; 143 case ISA_TYPE_AG: return (u8 __iomem *)addr;
175#endif 144#endif
@@ -183,9 +152,6 @@ static inline u16 __iomem *isa_mtw(unsigned long addr)
183#ifdef CONFIG_Q40 152#ifdef CONFIG_Q40
184 case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_MEM_W(addr); 153 case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_MEM_W(addr);
185#endif 154#endif
186#ifdef CONFIG_GG2
187 case ISA_TYPE_GG2: return (u16 __iomem *)GG2_ISA_MEM_W(addr);
188#endif
189#ifdef CONFIG_AMIGA_PCMCIA 155#ifdef CONFIG_AMIGA_PCMCIA
190 case ISA_TYPE_AG: return (u16 __iomem *)addr; 156 case ISA_TYPE_AG: return (u16 __iomem *)addr;
191#endif 157#endif
@@ -217,9 +183,6 @@ static inline void isa_delay(void)
217#ifdef CONFIG_Q40 183#ifdef CONFIG_Q40
218 case ISA_TYPE_Q40: isa_outb(0,0x80); break; 184 case ISA_TYPE_Q40: isa_outb(0,0x80); break;
219#endif 185#endif
220#ifdef CONFIG_GG2
221 case ISA_TYPE_GG2: break;
222#endif
223#ifdef CONFIG_AMIGA_PCMCIA 186#ifdef CONFIG_AMIGA_PCMCIA
224 case ISA_TYPE_AG: break; 187 case ISA_TYPE_AG: break;
225#endif 188#endif
@@ -287,9 +250,13 @@ static inline void isa_delay(void)
287#define outb(val,port) ((void)0) 250#define outb(val,port) ((void)0)
288#define outb_p(val,port) ((void)0) 251#define outb_p(val,port) ((void)0)
289#define inw(port) 0xffff 252#define inw(port) 0xffff
253#define inw_p(port) 0xffff
290#define outw(val,port) ((void)0) 254#define outw(val,port) ((void)0)
255#define outw_p(val,port) ((void)0)
291#define inl(port) 0xffffffffUL 256#define inl(port) 0xffffffffUL
257#define inl_p(port) 0xffffffffUL
292#define outl(val,port) ((void)0) 258#define outl(val,port) ((void)0)
259#define outl_p(val,port) ((void)0)
293 260
294#define insb(port,buf,nr) ((void)0) 261#define insb(port,buf,nr) ((void)0)
295#define outsb(port,buf,nr) ((void)0) 262#define outsb(port,buf,nr) ((void)0)
diff --git a/arch/m68k/include/asm/ioctls.h b/arch/m68k/include/asm/ioctls.h
index 91a57d665460..1332bb4ca5b0 100644
--- a/arch/m68k/include/asm/ioctls.h
+++ b/arch/m68k/include/asm/ioctls.h
@@ -1,86 +1,8 @@
1#ifndef __ARCH_M68K_IOCTLS_H__ 1#ifndef __ARCH_M68K_IOCTLS_H__
2#define __ARCH_M68K_IOCTLS_H__ 2#define __ARCH_M68K_IOCTLS_H__
3 3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS 0x5401
9#define TCSETS 0x5402
10#define TCSETSW 0x5403
11#define TCSETSF 0x5404
12#define TCGETA 0x5405
13#define TCSETA 0x5406
14#define TCSETAW 0x5407
15#define TCSETAF 0x5408
16#define TCSBRK 0x5409
17#define TCXONC 0x540A
18#define TCFLSH 0x540B
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP 0x540F
23#define TIOCSPGRP 0x5410
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46#define TIOCSBRK 0x5427 /* BSD compatibility */
47#define TIOCCBRK 0x5428 /* BSD compatibility */
48#define TIOCGSID 0x5429 /* Return the session ID of FD */
49#define TCGETS2 _IOR('T',0x2A, struct termios2)
50#define TCSETS2 _IOW('T',0x2B, struct termios2)
51#define TCSETSW2 _IOW('T',0x2C, struct termios2)
52#define TCSETSF2 _IOW('T',0x2D, struct termios2)
53#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
54#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
55#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */
56
57#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
58#define FIOCLEX 0x5451
59#define FIOASYNC 0x5452
60#define TIOCSERCONFIG 0x5453
61#define TIOCSERGWILD 0x5454
62#define TIOCSERSWILD 0x5455
63#define TIOCGLCKTRMIOS 0x5456
64#define TIOCSLCKTRMIOS 0x5457
65#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
66#define TIOCSERGETLSR 0x5459 /* Get line status register */
67#define TIOCSERGETMULTI 0x545A /* Get multiport config */
68#define TIOCSERSETMULTI 0x545B /* Set multiport config */
69
70#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
71#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
72#define FIOQSIZE 0x545E 4#define FIOQSIZE 0x545E
73 5
74/* Used for packet mode */ 6#include <asm-generic/ioctls.h>
75#define TIOCPKT_DATA 0
76#define TIOCPKT_FLUSHREAD 1
77#define TIOCPKT_FLUSHWRITE 2
78#define TIOCPKT_STOP 4
79#define TIOCPKT_START 8
80#define TIOCPKT_NOSTOP 16
81#define TIOCPKT_DOSTOP 32
82#define TIOCPKT_IOCTL 64
83
84#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
85 7
86#endif /* __ARCH_M68K_IOCTLS_H__ */ 8#endif /* __ARCH_M68K_IOCTLS_H__ */
diff --git a/arch/m68k/include/asm/m548xgpt.h b/arch/m68k/include/asm/m548xgpt.h
new file mode 100644
index 000000000000..c8ef158a1c4e
--- /dev/null
+++ b/arch/m68k/include/asm/m548xgpt.h
@@ -0,0 +1,88 @@
1/*
2 * File: m548xgpt.h
3 * Purpose: Register and bit definitions for the MCF548X
4 *
5 * Notes:
6 *
7 */
8
9#ifndef m548xgpt_h
10#define m548xgpt_h
11
12/*********************************************************************
13*
14* General Purpose Timers (GPT)
15*
16*********************************************************************/
17
18/* Register read/write macros */
19#define MCF_GPT_GMS0 0x000800
20#define MCF_GPT_GCIR0 0x000804
21#define MCF_GPT_GPWM0 0x000808
22#define MCF_GPT_GSR0 0x00080C
23#define MCF_GPT_GMS1 0x000810
24#define MCF_GPT_GCIR1 0x000814
25#define MCF_GPT_GPWM1 0x000818
26#define MCF_GPT_GSR1 0x00081C
27#define MCF_GPT_GMS2 0x000820
28#define MCF_GPT_GCIR2 0x000824
29#define MCF_GPT_GPWM2 0x000828
30#define MCF_GPT_GSR2 0x00082C
31#define MCF_GPT_GMS3 0x000830
32#define MCF_GPT_GCIR3 0x000834
33#define MCF_GPT_GPWM3 0x000838
34#define MCF_GPT_GSR3 0x00083C
35#define MCF_GPT_GMS(x) (0x000800+((x)*0x010))
36#define MCF_GPT_GCIR(x) (0x000804+((x)*0x010))
37#define MCF_GPT_GPWM(x) (0x000808+((x)*0x010))
38#define MCF_GPT_GSR(x) (0x00080C+((x)*0x010))
39
40/* Bit definitions and macros for MCF_GPT_GMS */
41#define MCF_GPT_GMS_TMS(x) (((x)&0x00000007)<<0)
42#define MCF_GPT_GMS_GPIO(x) (((x)&0x00000003)<<4)
43#define MCF_GPT_GMS_IEN (0x00000100)
44#define MCF_GPT_GMS_OD (0x00000200)
45#define MCF_GPT_GMS_SC (0x00000400)
46#define MCF_GPT_GMS_CE (0x00001000)
47#define MCF_GPT_GMS_WDEN (0x00008000)
48#define MCF_GPT_GMS_ICT(x) (((x)&0x00000003)<<16)
49#define MCF_GPT_GMS_OCT(x) (((x)&0x00000003)<<20)
50#define MCF_GPT_GMS_OCPW(x) (((x)&0x000000FF)<<24)
51#define MCF_GPT_GMS_OCT_FRCLOW (0x00000000)
52#define MCF_GPT_GMS_OCT_PULSEHI (0x00100000)
53#define MCF_GPT_GMS_OCT_PULSELO (0x00200000)
54#define MCF_GPT_GMS_OCT_TOGGLE (0x00300000)
55#define MCF_GPT_GMS_ICT_ANY (0x00000000)
56#define MCF_GPT_GMS_ICT_RISE (0x00010000)
57#define MCF_GPT_GMS_ICT_FALL (0x00020000)
58#define MCF_GPT_GMS_ICT_PULSE (0x00030000)
59#define MCF_GPT_GMS_GPIO_INPUT (0x00000000)
60#define MCF_GPT_GMS_GPIO_OUTLO (0x00000020)
61#define MCF_GPT_GMS_GPIO_OUTHI (0x00000030)
62#define MCF_GPT_GMS_TMS_DISABLE (0x00000000)
63#define MCF_GPT_GMS_TMS_INCAPT (0x00000001)
64#define MCF_GPT_GMS_TMS_OUTCAPT (0x00000002)
65#define MCF_GPT_GMS_TMS_PWM (0x00000003)
66#define MCF_GPT_GMS_TMS_GPIO (0x00000004)
67
68/* Bit definitions and macros for MCF_GPT_GCIR */
69#define MCF_GPT_GCIR_CNT(x) (((x)&0x0000FFFF)<<0)
70#define MCF_GPT_GCIR_PRE(x) (((x)&0x0000FFFF)<<16)
71
72/* Bit definitions and macros for MCF_GPT_GPWM */
73#define MCF_GPT_GPWM_LOAD (0x00000001)
74#define MCF_GPT_GPWM_PWMOP (0x00000100)
75#define MCF_GPT_GPWM_WIDTH(x) (((x)&0x0000FFFF)<<16)
76
77/* Bit definitions and macros for MCF_GPT_GSR */
78#define MCF_GPT_GSR_CAPT (0x00000001)
79#define MCF_GPT_GSR_COMP (0x00000002)
80#define MCF_GPT_GSR_PWMP (0x00000004)
81#define MCF_GPT_GSR_TEXP (0x00000008)
82#define MCF_GPT_GSR_PIN (0x00000100)
83#define MCF_GPT_GSR_OVF(x) (((x)&0x00000007)<<12)
84#define MCF_GPT_GSR_CAPTURE(x) (((x)&0x0000FFFF)<<16)
85
86/********************************************************************/
87
88#endif /* m548xgpt_h */
diff --git a/arch/m68k/include/asm/m548xsim.h b/arch/m68k/include/asm/m548xsim.h
new file mode 100644
index 000000000000..149135ef30d2
--- /dev/null
+++ b/arch/m68k/include/asm/m548xsim.h
@@ -0,0 +1,55 @@
1/*
2 * m548xsim.h -- ColdFire 547x/548x System Integration Unit support.
3 */
4
5#ifndef m548xsim_h
6#define m548xsim_h
7
8#define MCFINT_VECBASE 64
9
10/*
11 * Interrupt Controller Registers
12 */
13#define MCFICM_INTC0 0x0700 /* Base for Interrupt Ctrl 0 */
14#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
15#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
16#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
17#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */
18#define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */
19#define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */
20#define MCFINTC_IRLR 0x18 /* */
21#define MCFINTC_IACKL 0x19 /* */
22#define MCFINTC_ICR0 0x40 /* Base ICR register */
23
24/*
25 * Define system peripheral IRQ usage.
26 */
27#define MCF_IRQ_TIMER (64 + 54) /* Slice Timer 0 */
28#define MCF_IRQ_PROFILER (64 + 53) /* Slice Timer 1 */
29
30/*
31 * Generic GPIO support
32 */
33#define MCFGPIO_PIN_MAX 0 /* I am too lazy to count */
34#define MCFGPIO_IRQ_MAX -1
35#define MCFGPIO_IRQ_VECBASE -1
36
37/*
38 * Some PSC related definitions
39 */
40#define MCF_PAR_PSC(x) (0x000A4F-((x)&0x3))
41#define MCF_PAR_SDA (0x0008)
42#define MCF_PAR_SCL (0x0004)
43#define MCF_PAR_PSC_TXD (0x04)
44#define MCF_PAR_PSC_RXD (0x08)
45#define MCF_PAR_PSC_RTS(x) (((x)&0x03)<<4)
46#define MCF_PAR_PSC_CTS(x) (((x)&0x03)<<6)
47#define MCF_PAR_PSC_CTS_GPIO (0x00)
48#define MCF_PAR_PSC_CTS_BCLK (0x80)
49#define MCF_PAR_PSC_CTS_CTS (0xC0)
50#define MCF_PAR_PSC_RTS_GPIO (0x00)
51#define MCF_PAR_PSC_RTS_FSYNC (0x20)
52#define MCF_PAR_PSC_RTS_RTS (0x30)
53#define MCF_PAR_PSC_CANRX (0x40)
54
55#endif /* m548xsim_h */
diff --git a/arch/m68k/include/asm/machdep.h b/arch/m68k/include/asm/machdep.h
index fc24b6fc5508..789f3b2de0e9 100644
--- a/arch/m68k/include/asm/machdep.h
+++ b/arch/m68k/include/asm/machdep.h
@@ -1,5 +1,44 @@
1#ifdef __uClinux__ 1#ifndef _M68K_MACHDEP_H
2#include "machdep_no.h" 2#define _M68K_MACHDEP_H
3#else 3
4#include "machdep_mm.h" 4#include <linux/seq_file.h>
5#endif 5#include <linux/interrupt.h>
6
7struct pt_regs;
8struct mktime;
9struct rtc_time;
10struct rtc_pll_info;
11struct buffer_head;
12
13extern void (*mach_sched_init) (irq_handler_t handler);
14/* machine dependent irq functions */
15extern void (*mach_init_IRQ) (void);
16extern void (*mach_get_model) (char *model);
17extern void (*mach_get_hardware_list) (struct seq_file *m);
18/* machine dependent timer functions */
19extern unsigned long (*mach_gettimeoffset)(void);
20extern int (*mach_hwclk)(int, struct rtc_time*);
21extern unsigned int (*mach_get_ss)(void);
22extern int (*mach_get_rtc_pll)(struct rtc_pll_info *);
23extern int (*mach_set_rtc_pll)(struct rtc_pll_info *);
24extern int (*mach_set_clock_mmss)(unsigned long);
25extern void (*mach_gettod)(int *year, int *mon, int *day, int *hour,
26 int *min, int *sec);
27extern void (*mach_reset)( void );
28extern void (*mach_halt)( void );
29extern void (*mach_power_off)( void );
30extern unsigned long (*mach_hd_init) (unsigned long, unsigned long);
31extern void (*mach_hd_setup)(char *, int *);
32extern long mach_max_dma_address;
33extern void (*mach_heartbeat) (int);
34extern void (*mach_l2_flush) (int);
35extern void (*mach_beep) (unsigned int, unsigned int);
36
37/* Hardware clock functions */
38extern void hw_timer_init(void);
39extern unsigned long hw_timer_offset(void);
40extern irqreturn_t arch_timer_interrupt(int irq, void *dummy);
41
42extern void config_BSP(char *command, int len);
43
44#endif /* _M68K_MACHDEP_H */
diff --git a/arch/m68k/include/asm/machdep_mm.h b/arch/m68k/include/asm/machdep_mm.h
deleted file mode 100644
index 5637dcef314e..000000000000
--- a/arch/m68k/include/asm/machdep_mm.h
+++ /dev/null
@@ -1,35 +0,0 @@
1#ifndef _M68K_MACHDEP_H
2#define _M68K_MACHDEP_H
3
4#include <linux/seq_file.h>
5#include <linux/interrupt.h>
6
7struct pt_regs;
8struct mktime;
9struct rtc_time;
10struct rtc_pll_info;
11struct buffer_head;
12
13extern void (*mach_sched_init) (irq_handler_t handler);
14/* machine dependent irq functions */
15extern void (*mach_init_IRQ) (void);
16extern void (*mach_get_model) (char *model);
17extern void (*mach_get_hardware_list) (struct seq_file *m);
18/* machine dependent timer functions */
19extern unsigned long (*mach_gettimeoffset)(void);
20extern int (*mach_hwclk)(int, struct rtc_time*);
21extern unsigned int (*mach_get_ss)(void);
22extern int (*mach_get_rtc_pll)(struct rtc_pll_info *);
23extern int (*mach_set_rtc_pll)(struct rtc_pll_info *);
24extern int (*mach_set_clock_mmss)(unsigned long);
25extern void (*mach_reset)( void );
26extern void (*mach_halt)( void );
27extern void (*mach_power_off)( void );
28extern unsigned long (*mach_hd_init) (unsigned long, unsigned long);
29extern void (*mach_hd_setup)(char *, int *);
30extern long mach_max_dma_address;
31extern void (*mach_heartbeat) (int);
32extern void (*mach_l2_flush) (int);
33extern void (*mach_beep) (unsigned int, unsigned int);
34
35#endif /* _M68K_MACHDEP_H */
diff --git a/arch/m68k/include/asm/machdep_no.h b/arch/m68k/include/asm/machdep_no.h
deleted file mode 100644
index de9f47a51cc2..000000000000
--- a/arch/m68k/include/asm/machdep_no.h
+++ /dev/null
@@ -1,26 +0,0 @@
1#ifndef _M68KNOMMU_MACHDEP_H
2#define _M68KNOMMU_MACHDEP_H
3
4#include <linux/interrupt.h>
5
6/* Hardware clock functions */
7extern void hw_timer_init(void);
8extern unsigned long hw_timer_offset(void);
9
10extern irqreturn_t arch_timer_interrupt(int irq, void *dummy);
11
12/* Machine dependent time handling */
13extern void (*mach_gettod)(int *year, int *mon, int *day, int *hour,
14 int *min, int *sec);
15extern int (*mach_set_clock_mmss)(unsigned long);
16
17/* machine dependent power off functions */
18extern void (*mach_reset)( void );
19extern void (*mach_halt)( void );
20extern void (*mach_power_off)( void );
21
22extern void config_BSP(char *command, int len);
23
24extern void do_IRQ(int irq, struct pt_regs *fp);
25
26#endif /* _M68KNOMMU_MACHDEP_H */
diff --git a/arch/m68k/include/asm/mcfcache.h b/arch/m68k/include/asm/mcfcache.h
index c042634fadaa..f49dfc09f70a 100644
--- a/arch/m68k/include/asm/mcfcache.h
+++ b/arch/m68k/include/asm/mcfcache.h
@@ -107,7 +107,7 @@
107.endm 107.endm
108#endif /* CONFIG_M532x */ 108#endif /* CONFIG_M532x */
109 109
110#if defined(CONFIG_M5407) 110#if defined(CONFIG_M5407) || defined(CONFIG_M548x)
111/* 111/*
112 * Version 4 cores have a true harvard style separate instruction 112 * Version 4 cores have a true harvard style separate instruction
113 * and data cache. Invalidate and enable cache, also enable write 113 * and data cache. Invalidate and enable cache, also enable write
diff --git a/arch/m68k/include/asm/mcfsim.h b/arch/m68k/include/asm/mcfsim.h
index 9c70a67bf85f..6901fd68165b 100644
--- a/arch/m68k/include/asm/mcfsim.h
+++ b/arch/m68k/include/asm/mcfsim.h
@@ -41,6 +41,8 @@
41#elif defined(CONFIG_M5407) 41#elif defined(CONFIG_M5407)
42#include <asm/m5407sim.h> 42#include <asm/m5407sim.h>
43#include <asm/mcfintc.h> 43#include <asm/mcfintc.h>
44#elif defined(CONFIG_M548x)
45#include <asm/m548xsim.h>
44#endif 46#endif
45 47
46/****************************************************************************/ 48/****************************************************************************/
diff --git a/arch/m68k/include/asm/mcfslt.h b/arch/m68k/include/asm/mcfslt.h
new file mode 100644
index 000000000000..d0d0ecba5333
--- /dev/null
+++ b/arch/m68k/include/asm/mcfslt.h
@@ -0,0 +1,44 @@
1/****************************************************************************/
2
3/*
4 * mcfslt.h -- ColdFire internal Slice (SLT) timer support defines.
5 *
6 * (C) Copyright 2004, Greg Ungerer (gerg@snapgear.com)
7 * (C) Copyright 2009, Philippe De Muyter (phdm@macqel.be)
8 */
9
10/****************************************************************************/
11#ifndef mcfslt_h
12#define mcfslt_h
13/****************************************************************************/
14
15/*
16 * Get address specific defines for the 547x.
17 */
18#define MCFSLT_TIMER0 0x900 /* Base address of TIMER0 */
19#define MCFSLT_TIMER1 0x910 /* Base address of TIMER1 */
20
21
22/*
23 * Define the SLT timer register set addresses.
24 */
25#define MCFSLT_STCNT 0x00 /* Terminal count */
26#define MCFSLT_SCR 0x04 /* Control */
27#define MCFSLT_SCNT 0x08 /* Current count */
28#define MCFSLT_SSR 0x0C /* Status */
29
30/*
31 * Bit definitions for the SCR control register.
32 */
33#define MCFSLT_SCR_RUN 0x04000000 /* Run mode (continuous) */
34#define MCFSLT_SCR_IEN 0x02000000 /* Interrupt enable */
35#define MCFSLT_SCR_TEN 0x01000000 /* Timer enable */
36
37/*
38 * Bit definitions for the SSR status register.
39 */
40#define MCFSLT_SSR_BE 0x02000000 /* Bus error condition */
41#define MCFSLT_SSR_TE 0x01000000 /* Timeout condition */
42
43/****************************************************************************/
44#endif /* mcfslt_h */
diff --git a/arch/m68k/include/asm/mcfuart.h b/arch/m68k/include/asm/mcfuart.h
index 01a8716c5fc5..db72e2b889ca 100644
--- a/arch/m68k/include/asm/mcfuart.h
+++ b/arch/m68k/include/asm/mcfuart.h
@@ -47,6 +47,11 @@
47#define MCFUART_BASE1 0xfc060000 /* Base address of UART1 */ 47#define MCFUART_BASE1 0xfc060000 /* Base address of UART1 */
48#define MCFUART_BASE2 0xfc064000 /* Base address of UART2 */ 48#define MCFUART_BASE2 0xfc064000 /* Base address of UART2 */
49#define MCFUART_BASE3 0xfc068000 /* Base address of UART3 */ 49#define MCFUART_BASE3 0xfc068000 /* Base address of UART3 */
50#elif defined(CONFIG_M548x)
51#define MCFUART_BASE1 0x8600 /* on M548x */
52#define MCFUART_BASE2 0x8700 /* on M548x */
53#define MCFUART_BASE3 0x8800 /* on M548x */
54#define MCFUART_BASE4 0x8900 /* on M548x */
50#endif 55#endif
51 56
52 57
@@ -212,7 +217,9 @@ struct mcf_platform_uart {
212#define MCFUART_URF_RXS 0xc0 /* Receiver status */ 217#define MCFUART_URF_RXS 0xc0 /* Receiver status */
213#endif 218#endif
214 219
215#if defined(CONFIG_M5272) 220#if defined(CONFIG_M548x)
221#define MCFUART_TXFIFOSIZE 512
222#elif defined(CONFIG_M5272)
216#define MCFUART_TXFIFOSIZE 25 223#define MCFUART_TXFIFOSIZE 25
217#else 224#else
218#define MCFUART_TXFIFOSIZE 1 225#define MCFUART_TXFIFOSIZE 1
diff --git a/arch/m68k/include/asm/motorola_pgtable.h b/arch/m68k/include/asm/motorola_pgtable.h
index 8e9a8a754dde..45bd3f589bf0 100644
--- a/arch/m68k/include/asm/motorola_pgtable.h
+++ b/arch/m68k/include/asm/motorola_pgtable.h
@@ -221,9 +221,7 @@ static inline pte_t *pte_offset_kernel(pmd_t *pmdp, unsigned long address)
221} 221}
222 222
223#define pte_offset_map(pmdp,address) ((pte_t *)__pmd_page(*pmdp) + (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))) 223#define pte_offset_map(pmdp,address) ((pte_t *)__pmd_page(*pmdp) + (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
224#define pte_offset_map_nested(pmdp, address) pte_offset_map(pmdp, address)
225#define pte_unmap(pte) ((void)0) 224#define pte_unmap(pte) ((void)0)
226#define pte_unmap_nested(pte) ((void)0)
227 225
228/* 226/*
229 * Allocate and free page tables. The xxx_kernel() versions are 227 * Allocate and free page tables. The xxx_kernel() versions are
diff --git a/arch/m68k/include/asm/page.h b/arch/m68k/include/asm/page.h
index f2b4480cc98a..dfebb7c1e379 100644
--- a/arch/m68k/include/asm/page.h
+++ b/arch/m68k/include/asm/page.h
@@ -1,5 +1,49 @@
1#ifdef __uClinux__ 1#ifndef _M68K_PAGE_H
2#include "page_no.h" 2#define _M68K_PAGE_H
3
4#include <linux/const.h>
5#include <asm/setup.h>
6#include <asm/page_offset.h>
7
8/* PAGE_SHIFT determines the page size */
9#ifndef CONFIG_SUN3
10#define PAGE_SHIFT (12)
3#else 11#else
12#define PAGE_SHIFT (13)
13#endif
14#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
15#define PAGE_MASK (~(PAGE_SIZE-1))
16#define PAGE_OFFSET (PAGE_OFFSET_RAW)
17
18#ifndef __ASSEMBLY__
19
20/*
21 * These are used to make use of C type-checking..
22 */
23typedef struct { unsigned long pte; } pte_t;
24typedef struct { unsigned long pmd[16]; } pmd_t;
25typedef struct { unsigned long pgd; } pgd_t;
26typedef struct { unsigned long pgprot; } pgprot_t;
27typedef struct page *pgtable_t;
28
29#define pte_val(x) ((x).pte)
30#define pmd_val(x) ((&x)->pmd[0])
31#define pgd_val(x) ((x).pgd)
32#define pgprot_val(x) ((x).pgprot)
33
34#define __pte(x) ((pte_t) { (x) } )
35#define __pmd(x) ((pmd_t) { (x) } )
36#define __pgd(x) ((pgd_t) { (x) } )
37#define __pgprot(x) ((pgprot_t) { (x) } )
38
39#endif /* !__ASSEMBLY__ */
40
41#ifdef CONFIG_MMU
4#include "page_mm.h" 42#include "page_mm.h"
43#else
44#include "page_no.h"
5#endif 45#endif
46
47#include <asm-generic/getorder.h>
48
49#endif /* _M68K_PAGE_H */
diff --git a/arch/m68k/include/asm/page_mm.h b/arch/m68k/include/asm/page_mm.h
index d009f3ea39ab..31d5570d6567 100644
--- a/arch/m68k/include/asm/page_mm.h
+++ b/arch/m68k/include/asm/page_mm.h
@@ -1,29 +1,9 @@
1#ifndef _M68K_PAGE_H 1#ifndef _M68K_PAGE_MM_H
2#define _M68K_PAGE_H 2#define _M68K_PAGE_MM_H
3
4#include <linux/const.h>
5
6/* PAGE_SHIFT determines the page size */
7#ifndef CONFIG_SUN3
8#define PAGE_SHIFT (12)
9#else
10#define PAGE_SHIFT (13)
11#endif
12#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
13#define PAGE_MASK (~(PAGE_SIZE-1))
14
15#include <asm/setup.h>
16
17#if PAGE_SHIFT < 13
18#define THREAD_SIZE (8192)
19#else
20#define THREAD_SIZE PAGE_SIZE
21#endif
22 3
23#ifndef __ASSEMBLY__ 4#ifndef __ASSEMBLY__
24 5
25#include <linux/compiler.h> 6#include <linux/compiler.h>
26
27#include <asm/module.h> 7#include <asm/module.h>
28 8
29#define get_user_page(vaddr) __get_free_page(GFP_KERNEL) 9#define get_user_page(vaddr) __get_free_page(GFP_KERNEL)
@@ -84,33 +64,6 @@ static inline void clear_page(void *page)
84 flush_dcache_page(page); \ 64 flush_dcache_page(page); \
85 } while (0) 65 } while (0)
86 66
87/*
88 * These are used to make use of C type-checking..
89 */
90typedef struct { unsigned long pte; } pte_t;
91typedef struct { unsigned long pmd[16]; } pmd_t;
92typedef struct { unsigned long pgd; } pgd_t;
93typedef struct { unsigned long pgprot; } pgprot_t;
94typedef struct page *pgtable_t;
95
96#define pte_val(x) ((x).pte)
97#define pmd_val(x) ((&x)->pmd[0])
98#define pgd_val(x) ((x).pgd)
99#define pgprot_val(x) ((x).pgprot)
100
101#define __pte(x) ((pte_t) { (x) } )
102#define __pmd(x) ((pmd_t) { (x) } )
103#define __pgd(x) ((pgd_t) { (x) } )
104#define __pgprot(x) ((pgprot_t) { (x) } )
105
106#endif /* !__ASSEMBLY__ */
107
108#include <asm/page_offset.h>
109
110#define PAGE_OFFSET (PAGE_OFFSET_RAW)
111
112#ifndef __ASSEMBLY__
113
114extern unsigned long m68k_memoffset; 67extern unsigned long m68k_memoffset;
115 68
116#ifndef CONFIG_SUN3 69#ifndef CONFIG_SUN3
@@ -127,7 +80,7 @@ static inline unsigned long ___pa(void *vaddr)
127 : "0" (vaddr), "i" (m68k_fixup_memoffset)); 80 : "0" (vaddr), "i" (m68k_fixup_memoffset));
128 return paddr; 81 return paddr;
129} 82}
130#define __pa(vaddr) ___pa((void *)(vaddr)) 83#define __pa(vaddr) ___pa((void *)(long)(vaddr))
131static inline void *__va(unsigned long paddr) 84static inline void *__va(unsigned long paddr)
132{ 85{
133 void *vaddr; 86 void *vaddr;
@@ -223,6 +176,4 @@ static inline __attribute_const__ int __virt_to_node_shift(void)
223#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 176#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
224 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) 177 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
225 178
226#include <asm-generic/getorder.h> 179#endif /* _M68K_PAGE_MM_H */
227
228#endif /* _M68K_PAGE_H */
diff --git a/arch/m68k/include/asm/page_no.h b/arch/m68k/include/asm/page_no.h
index 8029a33e03c3..90595721185f 100644
--- a/arch/m68k/include/asm/page_no.h
+++ b/arch/m68k/include/asm/page_no.h
@@ -1,18 +1,11 @@
1#ifndef _M68KNOMMU_PAGE_H 1#ifndef _M68K_PAGE_NO_H
2#define _M68KNOMMU_PAGE_H 2#define _M68K_PAGE_NO_H
3
4#include <linux/const.h>
5
6/* PAGE_SHIFT determines the page size */
7
8#define PAGE_SHIFT (12)
9#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
10#define PAGE_MASK (~(PAGE_SIZE-1))
11
12#include <asm/setup.h>
13 3
14#ifndef __ASSEMBLY__ 4#ifndef __ASSEMBLY__
15 5
6extern unsigned long memory_start;
7extern unsigned long memory_end;
8
16#define get_user_page(vaddr) __get_free_page(GFP_KERNEL) 9#define get_user_page(vaddr) __get_free_page(GFP_KERNEL)
17#define free_user_page(page, addr) free_page(addr) 10#define free_user_page(page, addr) free_page(addr)
18 11
@@ -26,36 +19,6 @@
26 alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr) 19 alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
27#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE 20#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
28 21
29/*
30 * These are used to make use of C type-checking..
31 */
32typedef struct { unsigned long pte; } pte_t;
33typedef struct { unsigned long pmd[16]; } pmd_t;
34typedef struct { unsigned long pgd; } pgd_t;
35typedef struct { unsigned long pgprot; } pgprot_t;
36typedef struct page *pgtable_t;
37
38#define pte_val(x) ((x).pte)
39#define pmd_val(x) ((&x)->pmd[0])
40#define pgd_val(x) ((x).pgd)
41#define pgprot_val(x) ((x).pgprot)
42
43#define __pte(x) ((pte_t) { (x) } )
44#define __pmd(x) ((pmd_t) { (x) } )
45#define __pgd(x) ((pgd_t) { (x) } )
46#define __pgprot(x) ((pgprot_t) { (x) } )
47
48extern unsigned long memory_start;
49extern unsigned long memory_end;
50
51#endif /* !__ASSEMBLY__ */
52
53#include <asm/page_offset.h>
54
55#define PAGE_OFFSET (PAGE_OFFSET_RAW)
56
57#ifndef __ASSEMBLY__
58
59#define __pa(vaddr) ((unsigned long)(vaddr)) 22#define __pa(vaddr) ((unsigned long)(vaddr))
60#define __va(paddr) ((void *)(paddr)) 23#define __va(paddr) ((void *)(paddr))
61 24
@@ -74,6 +37,4 @@ extern unsigned long memory_end;
74 37
75#endif /* __ASSEMBLY__ */ 38#endif /* __ASSEMBLY__ */
76 39
77#include <asm-generic/getorder.h> 40#endif /* _M68K_PAGE_NO_H */
78
79#endif /* _M68KNOMMU_PAGE_H */
diff --git a/arch/m68k/include/asm/string.h b/arch/m68k/include/asm/string.h
index 2c356f90f171..2936dda938d7 100644
--- a/arch/m68k/include/asm/string.h
+++ b/arch/m68k/include/asm/string.h
@@ -1,5 +1,133 @@
1#ifdef __uClinux__ 1#ifndef _M68K_STRING_H_
2#include "string_no.h" 2#define _M68K_STRING_H_
3
4#include <linux/types.h>
5#include <linux/compiler.h>
6
7static inline size_t __kernel_strlen(const char *s)
8{
9 const char *sc;
10
11 for (sc = s; *sc++; )
12 ;
13 return sc - s - 1;
14}
15
16static inline char *__kernel_strcpy(char *dest, const char *src)
17{
18 char *xdest = dest;
19
20 asm volatile ("\n"
21 "1: move.b (%1)+,(%0)+\n"
22 " jne 1b"
23 : "+a" (dest), "+a" (src)
24 : : "memory");
25 return xdest;
26}
27
28#ifndef __IN_STRING_C
29
30#define __HAVE_ARCH_STRLEN
31#define strlen(s) (__builtin_constant_p(s) ? \
32 __builtin_strlen(s) : \
33 __kernel_strlen(s))
34
35#define __HAVE_ARCH_STRNLEN
36static inline size_t strnlen(const char *s, size_t count)
37{
38 const char *sc = s;
39
40 asm volatile ("\n"
41 "1: subq.l #1,%1\n"
42 " jcs 2f\n"
43 " tst.b (%0)+\n"
44 " jne 1b\n"
45 " subq.l #1,%0\n"
46 "2:"
47 : "+a" (sc), "+d" (count));
48 return sc - s;
49}
50
51#define __HAVE_ARCH_STRCPY
52#if __GNUC__ >= 4
53#define strcpy(d, s) (__builtin_constant_p(s) && \
54 __builtin_strlen(s) <= 32 ? \
55 __builtin_strcpy(d, s) : \
56 __kernel_strcpy(d, s))
3#else 57#else
4#include "string_mm.h" 58#define strcpy(d, s) __kernel_strcpy(d, s)
5#endif 59#endif
60
61#define __HAVE_ARCH_STRNCPY
62static inline char *strncpy(char *dest, const char *src, size_t n)
63{
64 char *xdest = dest;
65
66 asm volatile ("\n"
67 " jra 2f\n"
68 "1: move.b (%1),(%0)+\n"
69 " jeq 2f\n"
70 " addq.l #1,%1\n"
71 "2: subq.l #1,%2\n"
72 " jcc 1b\n"
73 : "+a" (dest), "+a" (src), "+d" (n)
74 : : "memory");
75 return xdest;
76}
77
78#define __HAVE_ARCH_STRCAT
79#define strcat(d, s) ({ \
80 char *__d = (d); \
81 strcpy(__d + strlen(__d), (s)); \
82})
83
84#define __HAVE_ARCH_STRCHR
85static inline char *strchr(const char *s, int c)
86{
87 char sc, ch = c;
88
89 for (; (sc = *s++) != ch; ) {
90 if (!sc)
91 return NULL;
92 }
93 return (char *)s - 1;
94}
95
96#ifndef CONFIG_COLDFIRE
97#define __HAVE_ARCH_STRCMP
98static inline int strcmp(const char *cs, const char *ct)
99{
100 char res;
101
102 asm ("\n"
103 "1: move.b (%0)+,%2\n" /* get *cs */
104 " cmp.b (%1)+,%2\n" /* compare a byte */
105 " jne 2f\n" /* not equal, break out */
106 " tst.b %2\n" /* at end of cs? */
107 " jne 1b\n" /* no, keep going */
108 " jra 3f\n" /* strings are equal */
109 "2: sub.b -(%1),%2\n" /* *cs - *ct */
110 "3:"
111 : "+a" (cs), "+a" (ct), "=d" (res));
112 return res;
113}
114
115#define __HAVE_ARCH_MEMMOVE
116extern void *memmove(void *, const void *, __kernel_size_t);
117
118#define __HAVE_ARCH_MEMCMP
119extern int memcmp(const void *, const void *, __kernel_size_t);
120#define memcmp(d, s, n) __builtin_memcmp(d, s, n)
121#endif /* CONFIG_COLDFIRE */
122
123#define __HAVE_ARCH_MEMSET
124extern void *memset(void *, int, __kernel_size_t);
125#define memset(d, c, n) __builtin_memset(d, c, n)
126
127#define __HAVE_ARCH_MEMCPY
128extern void *memcpy(void *, const void *, __kernel_size_t);
129#define memcpy(d, s, n) __builtin_memcpy(d, s, n)
130
131#endif
132
133#endif /* _M68K_STRING_H_ */
diff --git a/arch/m68k/include/asm/string_mm.h b/arch/m68k/include/asm/string_mm.h
deleted file mode 100644
index 2eb7df1e0f5d..000000000000
--- a/arch/m68k/include/asm/string_mm.h
+++ /dev/null
@@ -1,131 +0,0 @@
1#ifndef _M68K_STRING_H_
2#define _M68K_STRING_H_
3
4#include <linux/types.h>
5#include <linux/compiler.h>
6
7static inline size_t __kernel_strlen(const char *s)
8{
9 const char *sc;
10
11 for (sc = s; *sc++; )
12 ;
13 return sc - s - 1;
14}
15
16static inline char *__kernel_strcpy(char *dest, const char *src)
17{
18 char *xdest = dest;
19
20 asm volatile ("\n"
21 "1: move.b (%1)+,(%0)+\n"
22 " jne 1b"
23 : "+a" (dest), "+a" (src)
24 : : "memory");
25 return xdest;
26}
27
28#ifndef __IN_STRING_C
29
30#define __HAVE_ARCH_STRLEN
31#define strlen(s) (__builtin_constant_p(s) ? \
32 __builtin_strlen(s) : \
33 __kernel_strlen(s))
34
35#define __HAVE_ARCH_STRNLEN
36static inline size_t strnlen(const char *s, size_t count)
37{
38 const char *sc = s;
39
40 asm volatile ("\n"
41 "1: subq.l #1,%1\n"
42 " jcs 2f\n"
43 " tst.b (%0)+\n"
44 " jne 1b\n"
45 " subq.l #1,%0\n"
46 "2:"
47 : "+a" (sc), "+d" (count));
48 return sc - s;
49}
50
51#define __HAVE_ARCH_STRCPY
52#if __GNUC__ >= 4
53#define strcpy(d, s) (__builtin_constant_p(s) && \
54 __builtin_strlen(s) <= 32 ? \
55 __builtin_strcpy(d, s) : \
56 __kernel_strcpy(d, s))
57#else
58#define strcpy(d, s) __kernel_strcpy(d, s)
59#endif
60
61#define __HAVE_ARCH_STRNCPY
62static inline char *strncpy(char *dest, const char *src, size_t n)
63{
64 char *xdest = dest;
65
66 asm volatile ("\n"
67 " jra 2f\n"
68 "1: move.b (%1),(%0)+\n"
69 " jeq 2f\n"
70 " addq.l #1,%1\n"
71 "2: subq.l #1,%2\n"
72 " jcc 1b\n"
73 : "+a" (dest), "+a" (src), "+d" (n)
74 : : "memory");
75 return xdest;
76}
77
78#define __HAVE_ARCH_STRCAT
79#define strcat(d, s) ({ \
80 char *__d = (d); \
81 strcpy(__d + strlen(__d), (s)); \
82})
83
84#define __HAVE_ARCH_STRCHR
85static inline char *strchr(const char *s, int c)
86{
87 char sc, ch = c;
88
89 for (; (sc = *s++) != ch; ) {
90 if (!sc)
91 return NULL;
92 }
93 return (char *)s - 1;
94}
95
96#define __HAVE_ARCH_STRCMP
97static inline int strcmp(const char *cs, const char *ct)
98{
99 char res;
100
101 asm ("\n"
102 "1: move.b (%0)+,%2\n" /* get *cs */
103 " cmp.b (%1)+,%2\n" /* compare a byte */
104 " jne 2f\n" /* not equal, break out */
105 " tst.b %2\n" /* at end of cs? */
106 " jne 1b\n" /* no, keep going */
107 " jra 3f\n" /* strings are equal */
108 "2: sub.b -(%1),%2\n" /* *cs - *ct */
109 "3:"
110 : "+a" (cs), "+a" (ct), "=d" (res));
111 return res;
112}
113
114#define __HAVE_ARCH_MEMSET
115extern void *memset(void *, int, __kernel_size_t);
116#define memset(d, c, n) __builtin_memset(d, c, n)
117
118#define __HAVE_ARCH_MEMCPY
119extern void *memcpy(void *, const void *, __kernel_size_t);
120#define memcpy(d, s, n) __builtin_memcpy(d, s, n)
121
122#define __HAVE_ARCH_MEMMOVE
123extern void *memmove(void *, const void *, __kernel_size_t);
124
125#define __HAVE_ARCH_MEMCMP
126extern int memcmp(const void *, const void *, __kernel_size_t);
127#define memcmp(d, s, n) __builtin_memcmp(d, s, n)
128
129#endif
130
131#endif /* _M68K_STRING_H_ */
diff --git a/arch/m68k/include/asm/string_no.h b/arch/m68k/include/asm/string_no.h
deleted file mode 100644
index af09e17000fc..000000000000
--- a/arch/m68k/include/asm/string_no.h
+++ /dev/null
@@ -1,126 +0,0 @@
1#ifndef _M68KNOMMU_STRING_H_
2#define _M68KNOMMU_STRING_H_
3
4#ifdef __KERNEL__ /* only set these up for kernel code */
5
6#include <asm/setup.h>
7#include <asm/page.h>
8
9#define __HAVE_ARCH_STRCPY
10static inline char * strcpy(char * dest,const char *src)
11{
12 char *xdest = dest;
13
14 __asm__ __volatile__
15 ("1:\tmoveb %1@+,%0@+\n\t"
16 "jne 1b"
17 : "=a" (dest), "=a" (src)
18 : "0" (dest), "1" (src) : "memory");
19 return xdest;
20}
21
22#define __HAVE_ARCH_STRNCPY
23static inline char * strncpy(char *dest, const char *src, size_t n)
24{
25 char *xdest = dest;
26
27 if (n == 0)
28 return xdest;
29
30 __asm__ __volatile__
31 ("1:\tmoveb %1@+,%0@+\n\t"
32 "jeq 2f\n\t"
33 "subql #1,%2\n\t"
34 "jne 1b\n\t"
35 "2:"
36 : "=a" (dest), "=a" (src), "=d" (n)
37 : "0" (dest), "1" (src), "2" (n)
38 : "memory");
39 return xdest;
40}
41
42
43#ifndef CONFIG_COLDFIRE
44
45#define __HAVE_ARCH_STRCMP
46static inline int strcmp(const char * cs,const char * ct)
47{
48 char __res;
49
50 __asm__
51 ("1:\tmoveb %0@+,%2\n\t" /* get *cs */
52 "cmpb %1@+,%2\n\t" /* compare a byte */
53 "jne 2f\n\t" /* not equal, break out */
54 "tstb %2\n\t" /* at end of cs? */
55 "jne 1b\n\t" /* no, keep going */
56 "jra 3f\n\t" /* strings are equal */
57 "2:\tsubb %1@-,%2\n\t" /* *cs - *ct */
58 "3:"
59 : "=a" (cs), "=a" (ct), "=d" (__res)
60 : "0" (cs), "1" (ct));
61
62 return __res;
63}
64
65#define __HAVE_ARCH_STRNCMP
66static inline int strncmp(const char * cs,const char * ct,size_t count)
67{
68 char __res;
69
70 if (!count)
71 return 0;
72 __asm__
73 ("1:\tmovb %0@+,%3\n\t" /* get *cs */
74 "cmpb %1@+,%3\n\t" /* compare a byte */
75 "jne 3f\n\t" /* not equal, break out */
76 "tstb %3\n\t" /* at end of cs? */
77 "jeq 4f\n\t" /* yes, all done */
78 "subql #1,%2\n\t" /* no, adjust count */
79 "jne 1b\n\t" /* more to do, keep going */
80 "2:\tmoveq #0,%3\n\t" /* strings are equal */
81 "jra 4f\n\t"
82 "3:\tsubb %1@-,%3\n\t" /* *cs - *ct */
83 "4:"
84 : "=a" (cs), "=a" (ct), "=d" (count), "=d" (__res)
85 : "0" (cs), "1" (ct), "2" (count));
86 return __res;
87}
88
89#endif /* CONFIG_COLDFIRE */
90
91#define __HAVE_ARCH_MEMSET
92extern void * memset(void * s, int c, size_t count);
93
94#define __HAVE_ARCH_MEMCPY
95extern void * memcpy(void *d, const void *s, size_t count);
96
97#else /* KERNEL */
98
99/*
100 * let user libraries deal with these,
101 * IMHO the kernel has no place defining these functions for user apps
102 */
103
104#define __HAVE_ARCH_STRCPY 1
105#define __HAVE_ARCH_STRNCPY 1
106#define __HAVE_ARCH_STRCAT 1
107#define __HAVE_ARCH_STRNCAT 1
108#define __HAVE_ARCH_STRCMP 1
109#define __HAVE_ARCH_STRNCMP 1
110#define __HAVE_ARCH_STRNICMP 1
111#define __HAVE_ARCH_STRCHR 1
112#define __HAVE_ARCH_STRRCHR 1
113#define __HAVE_ARCH_STRSTR 1
114#define __HAVE_ARCH_STRLEN 1
115#define __HAVE_ARCH_STRNLEN 1
116#define __HAVE_ARCH_MEMSET 1
117#define __HAVE_ARCH_MEMCPY 1
118#define __HAVE_ARCH_MEMMOVE 1
119#define __HAVE_ARCH_MEMSCAN 1
120#define __HAVE_ARCH_MEMCMP 1
121#define __HAVE_ARCH_MEMCHR 1
122#define __HAVE_ARCH_STRTOK 1
123
124#endif /* KERNEL */
125
126#endif /* _M68K_STRING_H_ */
diff --git a/arch/m68k/include/asm/sun3_pgtable.h b/arch/m68k/include/asm/sun3_pgtable.h
index f847ec732d62..cf5fad9b5250 100644
--- a/arch/m68k/include/asm/sun3_pgtable.h
+++ b/arch/m68k/include/asm/sun3_pgtable.h
@@ -219,9 +219,7 @@ static inline pte_t pgoff_to_pte(unsigned off)
219#define pte_offset_kernel(pmd, address) ((pte_t *) __pmd_page(*pmd) + pte_index(address)) 219#define pte_offset_kernel(pmd, address) ((pte_t *) __pmd_page(*pmd) + pte_index(address))
220/* FIXME: should we bother with kmap() here? */ 220/* FIXME: should we bother with kmap() here? */
221#define pte_offset_map(pmd, address) ((pte_t *)kmap(pmd_page(*pmd)) + pte_index(address)) 221#define pte_offset_map(pmd, address) ((pte_t *)kmap(pmd_page(*pmd)) + pte_index(address))
222#define pte_offset_map_nested(pmd, address) pte_offset_map(pmd, address)
223#define pte_unmap(pte) kunmap(pte) 222#define pte_unmap(pte) kunmap(pte)
224#define pte_unmap_nested(pte) kunmap(pte)
225 223
226/* Macros to (de)construct the fake PTEs representing swap pages. */ 224/* Macros to (de)construct the fake PTEs representing swap pages. */
227#define __swp_type(x) ((x).val & 0x7F) 225#define __swp_type(x) ((x).val & 0x7F)
diff --git a/arch/m68k/include/asm/system_mm.h b/arch/m68k/include/asm/system_mm.h
index 12053c44cccf..47b01f4726bc 100644
--- a/arch/m68k/include/asm/system_mm.h
+++ b/arch/m68k/include/asm/system_mm.h
@@ -182,9 +182,7 @@ static inline unsigned long __cmpxchg(volatile void *p, unsigned long old,
182 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\ 182 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
183 (unsigned long)(n), sizeof(*(ptr)))) 183 (unsigned long)(n), sizeof(*(ptr))))
184 184
185#ifndef CONFIG_SMP
186#include <asm-generic/cmpxchg.h> 185#include <asm-generic/cmpxchg.h>
187#endif
188 186
189#endif 187#endif
190 188
diff --git a/arch/m68k/include/asm/system_no.h b/arch/m68k/include/asm/system_no.h
index 20126c09794e..6fe9f93bc3ff 100644
--- a/arch/m68k/include/asm/system_no.h
+++ b/arch/m68k/include/asm/system_no.h
@@ -59,17 +59,10 @@ asmlinkage void resume(void);
59#define wmb() asm volatile ("" : : :"memory") 59#define wmb() asm volatile ("" : : :"memory")
60#define set_mb(var, value) ({ (var) = (value); wmb(); }) 60#define set_mb(var, value) ({ (var) = (value); wmb(); })
61 61
62#ifdef CONFIG_SMP
63#define smp_mb() mb()
64#define smp_rmb() rmb()
65#define smp_wmb() wmb()
66#define smp_read_barrier_depends() read_barrier_depends()
67#else
68#define smp_mb() barrier() 62#define smp_mb() barrier()
69#define smp_rmb() barrier() 63#define smp_rmb() barrier()
70#define smp_wmb() barrier() 64#define smp_wmb() barrier()
71#define smp_read_barrier_depends() do { } while(0) 65#define smp_read_barrier_depends() do { } while(0)
72#endif
73 66
74#define read_barrier_depends() ((void)0) 67#define read_barrier_depends() ((void)0)
75 68
@@ -152,9 +145,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
152 (unsigned long)(n), sizeof(*(ptr)))) 145 (unsigned long)(n), sizeof(*(ptr))))
153#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) 146#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
154 147
155#ifndef CONFIG_SMP
156#include <asm-generic/cmpxchg.h> 148#include <asm-generic/cmpxchg.h>
157#endif
158 149
159#define arch_align_stack(x) (x) 150#define arch_align_stack(x) (x)
160 151
diff --git a/arch/m68k/include/asm/thread_info.h b/arch/m68k/include/asm/thread_info.h
index f31a3f42b7b3..1da5d53a00eb 100644
--- a/arch/m68k/include/asm/thread_info.h
+++ b/arch/m68k/include/asm/thread_info.h
@@ -1,5 +1,108 @@
1#ifdef __uClinux__ 1#ifndef _ASM_M68K_THREAD_INFO_H
2#include "thread_info_no.h" 2#define _ASM_M68K_THREAD_INFO_H
3
4#include <asm/types.h>
5#include <asm/page.h>
6
7/*
8 * On machines with 4k pages we default to an 8k thread size, though we
9 * allow a 4k with config option. Any other machine page size then
10 * the thread size must match the page size (which is 8k and larger here).
11 */
12#if PAGE_SHIFT < 13
13#ifdef CONFIG_4KSTACKS
14#define THREAD_SIZE 4096
3#else 15#else
4#include "thread_info_mm.h" 16#define THREAD_SIZE 8192
5#endif 17#endif
18#else
19#define THREAD_SIZE PAGE_SIZE
20#endif
21#define THREAD_SIZE_ORDER ((THREAD_SIZE / PAGE_SIZE) - 1)
22
23#ifndef __ASSEMBLY__
24
25struct thread_info {
26 struct task_struct *task; /* main task structure */
27 unsigned long flags;
28 struct exec_domain *exec_domain; /* execution domain */
29 int preempt_count; /* 0 => preemptable, <0 => BUG */
30 __u32 cpu; /* should always be 0 on m68k */
31 unsigned long tp_value; /* thread pointer */
32 struct restart_block restart_block;
33};
34#endif /* __ASSEMBLY__ */
35
36#define PREEMPT_ACTIVE 0x4000000
37
38#define INIT_THREAD_INFO(tsk) \
39{ \
40 .task = &tsk, \
41 .exec_domain = &default_exec_domain, \
42 .preempt_count = INIT_PREEMPT_COUNT, \
43 .restart_block = { \
44 .fn = do_no_restart_syscall, \
45 }, \
46}
47
48#define init_stack (init_thread_union.stack)
49
50#ifdef CONFIG_MMU
51
52#ifndef __ASSEMBLY__
53#include <asm/current.h>
54#endif
55
56#ifdef ASM_OFFSETS_C
57#define task_thread_info(tsk) ((struct thread_info *) NULL)
58#else
59#include <asm/asm-offsets.h>
60#define task_thread_info(tsk) ((struct thread_info *)((char *)tsk+TASK_TINFO))
61#endif
62
63#define init_thread_info (init_task.thread.info)
64#define task_stack_page(tsk) ((tsk)->stack)
65#define current_thread_info() task_thread_info(current)
66
67#define __HAVE_THREAD_FUNCTIONS
68
69#define setup_thread_stack(p, org) ({ \
70 *(struct task_struct **)(p)->stack = (p); \
71 task_thread_info(p)->task = (p); \
72})
73
74#define end_of_stack(p) ((unsigned long *)(p)->stack + 1)
75
76#else /* !CONFIG_MMU */
77
78#ifndef __ASSEMBLY__
79/* how to get the thread information struct from C */
80static inline struct thread_info *current_thread_info(void)
81{
82 struct thread_info *ti;
83 __asm__(
84 "move.l %%sp, %0 \n\t"
85 "and.l %1, %0"
86 : "=&d"(ti)
87 : "di" (~(THREAD_SIZE-1))
88 );
89 return ti;
90}
91#endif
92
93#define init_thread_info (init_thread_union.thread_info)
94
95#endif /* CONFIG_MMU */
96
97/* entry.S relies on these definitions!
98 * bits 0-7 are tested at every exception exit
99 * bits 8-15 are also tested at syscall exit
100 */
101#define TIF_SIGPENDING 6 /* signal pending */
102#define TIF_NEED_RESCHED 7 /* rescheduling necessary */
103#define TIF_DELAYED_TRACE 14 /* single step a syscall */
104#define TIF_SYSCALL_TRACE 15 /* syscall trace active */
105#define TIF_MEMDIE 16 /* is terminating due to OOM killer */
106#define TIF_FREEZE 17 /* thread is freezing for suspend */
107
108#endif /* _ASM_M68K_THREAD_INFO_H */
diff --git a/arch/m68k/include/asm/thread_info_mm.h b/arch/m68k/include/asm/thread_info_mm.h
deleted file mode 100644
index 3bf31dc51b12..000000000000
--- a/arch/m68k/include/asm/thread_info_mm.h
+++ /dev/null
@@ -1,71 +0,0 @@
1#ifndef _ASM_M68K_THREAD_INFO_H
2#define _ASM_M68K_THREAD_INFO_H
3
4#ifndef ASM_OFFSETS_C
5#include <asm/asm-offsets.h>
6#endif
7#include <asm/types.h>
8#include <asm/page.h>
9
10#ifndef __ASSEMBLY__
11#include <asm/current.h>
12
13struct thread_info {
14 struct task_struct *task; /* main task structure */
15 unsigned long flags;
16 struct exec_domain *exec_domain; /* execution domain */
17 int preempt_count; /* 0 => preemptable, <0 => BUG */
18 __u32 cpu; /* should always be 0 on m68k */
19 unsigned long tp_value; /* thread pointer */
20 struct restart_block restart_block;
21};
22#endif /* __ASSEMBLY__ */
23
24#define PREEMPT_ACTIVE 0x4000000
25
26#define INIT_THREAD_INFO(tsk) \
27{ \
28 .task = &tsk, \
29 .exec_domain = &default_exec_domain, \
30 .preempt_count = INIT_PREEMPT_COUNT, \
31 .restart_block = { \
32 .fn = do_no_restart_syscall, \
33 }, \
34}
35
36/* THREAD_SIZE should be 8k, so handle differently for 4k and 8k machines */
37#define THREAD_SIZE_ORDER (13 - PAGE_SHIFT)
38
39#define init_thread_info (init_task.thread.info)
40#define init_stack (init_thread_union.stack)
41
42#ifdef ASM_OFFSETS_C
43#define task_thread_info(tsk) ((struct thread_info *) NULL)
44#else
45#define task_thread_info(tsk) ((struct thread_info *)((char *)tsk+TASK_TINFO))
46#endif
47
48#define task_stack_page(tsk) ((tsk)->stack)
49#define current_thread_info() task_thread_info(current)
50
51#define __HAVE_THREAD_FUNCTIONS
52
53#define setup_thread_stack(p, org) ({ \
54 *(struct task_struct **)(p)->stack = (p); \
55 task_thread_info(p)->task = (p); \
56})
57
58#define end_of_stack(p) ((unsigned long *)(p)->stack + 1)
59
60/* entry.S relies on these definitions!
61 * bits 0-7 are tested at every exception exit
62 * bits 8-15 are also tested at syscall exit
63 */
64#define TIF_SIGPENDING 6 /* signal pending */
65#define TIF_NEED_RESCHED 7 /* rescheduling necessary */
66#define TIF_DELAYED_TRACE 14 /* single step a syscall */
67#define TIF_SYSCALL_TRACE 15 /* syscall trace active */
68#define TIF_MEMDIE 16 /* is terminating due to OOM killer */
69#define TIF_FREEZE 17 /* thread is freezing for suspend */
70
71#endif /* _ASM_M68K_THREAD_INFO_H */
diff --git a/arch/m68k/include/asm/thread_info_no.h b/arch/m68k/include/asm/thread_info_no.h
deleted file mode 100644
index 51f354b672e6..000000000000
--- a/arch/m68k/include/asm/thread_info_no.h
+++ /dev/null
@@ -1,102 +0,0 @@
1/* thread_info.h: m68knommu low-level thread information
2 * adapted from the i386 and PPC versions by Greg Ungerer (gerg@snapgear.com)
3 *
4 * Copyright (C) 2002 David Howells (dhowells@redhat.com)
5 * - Incorporating suggestions made by Linus Torvalds and Dave Miller
6 */
7
8#ifndef _ASM_THREAD_INFO_H
9#define _ASM_THREAD_INFO_H
10
11#include <asm/page.h>
12
13#ifdef __KERNEL__
14
15/*
16 * Size of kernel stack for each process. This must be a power of 2...
17 */
18#ifdef CONFIG_4KSTACKS
19#define THREAD_SIZE_ORDER (0)
20#else
21#define THREAD_SIZE_ORDER (1)
22#endif
23
24/*
25 * for asm files, THREAD_SIZE is now generated by asm-offsets.c
26 */
27#define THREAD_SIZE (PAGE_SIZE<<THREAD_SIZE_ORDER)
28
29#ifndef __ASSEMBLY__
30
31/*
32 * low level task data.
33 */
34struct thread_info {
35 struct task_struct *task; /* main task structure */
36 struct exec_domain *exec_domain; /* execution domain */
37 unsigned long flags; /* low level flags */
38 int cpu; /* cpu we're on */
39 int preempt_count; /* 0 => preemptable, <0 => BUG */
40 unsigned long tp_value; /* thread pointer */
41 struct restart_block restart_block;
42};
43
44/*
45 * macros/functions for gaining access to the thread information structure
46 */
47#define INIT_THREAD_INFO(tsk) \
48{ \
49 .task = &tsk, \
50 .exec_domain = &default_exec_domain, \
51 .flags = 0, \
52 .cpu = 0, \
53 .preempt_count = INIT_PREEMPT_COUNT, \
54 .restart_block = { \
55 .fn = do_no_restart_syscall, \
56 }, \
57}
58
59#define init_thread_info (init_thread_union.thread_info)
60#define init_stack (init_thread_union.stack)
61
62
63/* how to get the thread information struct from C */
64static inline struct thread_info *current_thread_info(void)
65{
66 struct thread_info *ti;
67 __asm__(
68 "move.l %%sp, %0 \n\t"
69 "and.l %1, %0"
70 : "=&d"(ti)
71 : "di" (~(THREAD_SIZE-1))
72 );
73 return ti;
74}
75
76#endif /* __ASSEMBLY__ */
77
78#define PREEMPT_ACTIVE 0x4000000
79
80/*
81 * thread information flag bit numbers
82 */
83#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
84#define TIF_SIGPENDING 1 /* signal pending */
85#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
86#define TIF_POLLING_NRFLAG 3 /* true if poll_idle() is polling
87 TIF_NEED_RESCHED */
88#define TIF_MEMDIE 4 /* is terminating due to OOM killer */
89#define TIF_FREEZE 16 /* is freezing for suspend */
90
91/* as above, but as bit values */
92#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
93#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
94#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
95#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
96#define _TIF_FREEZE (1<<TIF_FREEZE)
97
98#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
99
100#endif /* __KERNEL__ */
101
102#endif /* _ASM_THREAD_INFO_H */
diff --git a/arch/m68k/include/asm/traps.h b/arch/m68k/include/asm/traps.h
index 3011ec0f5365..0bffb17d5db7 100644
--- a/arch/m68k/include/asm/traps.h
+++ b/arch/m68k/include/asm/traps.h
@@ -1,5 +1,272 @@
1#ifdef __uClinux__ 1/*
2#include "traps_no.h" 2 * linux/include/asm/traps.h
3#else 3 *
4#include "traps_mm.h" 4 * Copyright (C) 1993 Hamish Macdonald
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11#ifndef _M68K_TRAPS_H
12#define _M68K_TRAPS_H
13
14#ifndef __ASSEMBLY__
15
16#include <linux/linkage.h>
17#include <asm/ptrace.h>
18
19typedef void (*e_vector)(void);
20extern e_vector vectors[];
21
22asmlinkage void auto_inthandler(void);
23asmlinkage void user_inthandler(void);
24asmlinkage void bad_inthandler(void);
25extern void init_vectors(void);
26
5#endif 27#endif
28
29#define VEC_RESETSP (0)
30#define VEC_RESETPC (1)
31#define VEC_BUSERR (2)
32#define VEC_ADDRERR (3)
33#define VEC_ILLEGAL (4)
34#define VEC_ZERODIV (5)
35#define VEC_CHK (6)
36#define VEC_TRAP (7)
37#define VEC_PRIV (8)
38#define VEC_TRACE (9)
39#define VEC_LINE10 (10)
40#define VEC_LINE11 (11)
41#define VEC_RESV12 (12)
42#define VEC_COPROC (13)
43#define VEC_FORMAT (14)
44#define VEC_UNINT (15)
45#define VEC_RESV16 (16)
46#define VEC_RESV17 (17)
47#define VEC_RESV18 (18)
48#define VEC_RESV19 (19)
49#define VEC_RESV20 (20)
50#define VEC_RESV21 (21)
51#define VEC_RESV22 (22)
52#define VEC_RESV23 (23)
53#define VEC_SPUR (24)
54#define VEC_INT1 (25)
55#define VEC_INT2 (26)
56#define VEC_INT3 (27)
57#define VEC_INT4 (28)
58#define VEC_INT5 (29)
59#define VEC_INT6 (30)
60#define VEC_INT7 (31)
61#define VEC_SYS (32)
62#define VEC_TRAP1 (33)
63#define VEC_TRAP2 (34)
64#define VEC_TRAP3 (35)
65#define VEC_TRAP4 (36)
66#define VEC_TRAP5 (37)
67#define VEC_TRAP6 (38)
68#define VEC_TRAP7 (39)
69#define VEC_TRAP8 (40)
70#define VEC_TRAP9 (41)
71#define VEC_TRAP10 (42)
72#define VEC_TRAP11 (43)
73#define VEC_TRAP12 (44)
74#define VEC_TRAP13 (45)
75#define VEC_TRAP14 (46)
76#define VEC_TRAP15 (47)
77#define VEC_FPBRUC (48)
78#define VEC_FPIR (49)
79#define VEC_FPDIVZ (50)
80#define VEC_FPUNDER (51)
81#define VEC_FPOE (52)
82#define VEC_FPOVER (53)
83#define VEC_FPNAN (54)
84#define VEC_FPUNSUP (55)
85#define VEC_MMUCFG (56)
86#define VEC_MMUILL (57)
87#define VEC_MMUACC (58)
88#define VEC_RESV59 (59)
89#define VEC_UNIMPEA (60)
90#define VEC_UNIMPII (61)
91#define VEC_RESV62 (62)
92#define VEC_RESV63 (63)
93#define VEC_USER (64)
94
95#define VECOFF(vec) ((vec)<<2)
96
97#ifndef __ASSEMBLY__
98
99/* Status register bits */
100#define PS_T (0x8000)
101#define PS_S (0x2000)
102#define PS_M (0x1000)
103#define PS_C (0x0001)
104
105/* bits for 68020/68030 special status word */
106
107#define FC (0x8000)
108#define FB (0x4000)
109#define RC (0x2000)
110#define RB (0x1000)
111#define DF (0x0100)
112#define RM (0x0080)
113#define RW (0x0040)
114#define SZ (0x0030)
115#define DFC (0x0007)
116
117/* bits for 68030 MMU status register (mmusr,psr) */
118
119#define MMU_B (0x8000) /* bus error */
120#define MMU_L (0x4000) /* limit violation */
121#define MMU_S (0x2000) /* supervisor violation */
122#define MMU_WP (0x0800) /* write-protected */
123#define MMU_I (0x0400) /* invalid descriptor */
124#define MMU_M (0x0200) /* ATC entry modified */
125#define MMU_T (0x0040) /* transparent translation */
126#define MMU_NUM (0x0007) /* number of levels traversed */
127
128
129/* bits for 68040 special status word */
130#define CP_040 (0x8000)
131#define CU_040 (0x4000)
132#define CT_040 (0x2000)
133#define CM_040 (0x1000)
134#define MA_040 (0x0800)
135#define ATC_040 (0x0400)
136#define LK_040 (0x0200)
137#define RW_040 (0x0100)
138#define SIZ_040 (0x0060)
139#define TT_040 (0x0018)
140#define TM_040 (0x0007)
141
142/* bits for 68040 write back status word */
143#define WBV_040 (0x80)
144#define WBSIZ_040 (0x60)
145#define WBBYT_040 (0x20)
146#define WBWRD_040 (0x40)
147#define WBLNG_040 (0x00)
148#define WBTT_040 (0x18)
149#define WBTM_040 (0x07)
150
151/* bus access size codes */
152#define BA_SIZE_BYTE (0x20)
153#define BA_SIZE_WORD (0x40)
154#define BA_SIZE_LONG (0x00)
155#define BA_SIZE_LINE (0x60)
156
157/* bus access transfer type codes */
158#define BA_TT_MOVE16 (0x08)
159
160/* bits for 68040 MMU status register (mmusr) */
161#define MMU_B_040 (0x0800)
162#define MMU_G_040 (0x0400)
163#define MMU_S_040 (0x0080)
164#define MMU_CM_040 (0x0060)
165#define MMU_M_040 (0x0010)
166#define MMU_WP_040 (0x0004)
167#define MMU_T_040 (0x0002)
168#define MMU_R_040 (0x0001)
169
170/* bits in the 68060 fault status long word (FSLW) */
171#define MMU060_MA (0x08000000) /* misaligned */
172#define MMU060_LK (0x02000000) /* locked transfer */
173#define MMU060_RW (0x01800000) /* read/write */
174# define MMU060_RW_W (0x00800000) /* write */
175# define MMU060_RW_R (0x01000000) /* read */
176# define MMU060_RW_RMW (0x01800000) /* read/modify/write */
177# define MMU060_W (0x00800000) /* general write, includes rmw */
178#define MMU060_SIZ (0x00600000) /* transfer size */
179#define MMU060_TT (0x00180000) /* transfer type (TT) bits */
180#define MMU060_TM (0x00070000) /* transfer modifier (TM) bits */
181#define MMU060_IO (0x00008000) /* instruction or operand */
182#define MMU060_PBE (0x00004000) /* push buffer bus error */
183#define MMU060_SBE (0x00002000) /* store buffer bus error */
184#define MMU060_PTA (0x00001000) /* pointer A fault */
185#define MMU060_PTB (0x00000800) /* pointer B fault */
186#define MMU060_IL (0x00000400) /* double indirect descr fault */
187#define MMU060_PF (0x00000200) /* page fault (invalid descr) */
188#define MMU060_SP (0x00000100) /* supervisor protection */
189#define MMU060_WP (0x00000080) /* write protection */
190#define MMU060_TWE (0x00000040) /* bus error on table search */
191#define MMU060_RE (0x00000020) /* bus error on read */
192#define MMU060_WE (0x00000010) /* bus error on write */
193#define MMU060_TTR (0x00000008) /* error caused by TTR translation */
194#define MMU060_BPE (0x00000004) /* branch prediction error */
195#define MMU060_SEE (0x00000001) /* software emulated error */
196
197/* cases of missing or invalid descriptors */
198#define MMU060_DESC_ERR (MMU060_PTA | MMU060_PTB | \
199 MMU060_IL | MMU060_PF)
200/* bits that indicate real errors */
201#define MMU060_ERR_BITS (MMU060_PBE | MMU060_SBE | MMU060_DESC_ERR | MMU060_SP | \
202 MMU060_WP | MMU060_TWE | MMU060_RE | MMU060_WE)
203
204/* structure for stack frames */
205
206struct frame {
207 struct pt_regs ptregs;
208 union {
209 struct {
210 unsigned long iaddr; /* instruction address */
211 } fmt2;
212 struct {
213 unsigned long effaddr; /* effective address */
214 } fmt3;
215 struct {
216 unsigned long effaddr; /* effective address */
217 unsigned long pc; /* pc of faulted instr */
218 } fmt4;
219 struct {
220 unsigned long effaddr; /* effective address */
221 unsigned short ssw; /* special status word */
222 unsigned short wb3s; /* write back 3 status */
223 unsigned short wb2s; /* write back 2 status */
224 unsigned short wb1s; /* write back 1 status */
225 unsigned long faddr; /* fault address */
226 unsigned long wb3a; /* write back 3 address */
227 unsigned long wb3d; /* write back 3 data */
228 unsigned long wb2a; /* write back 2 address */
229 unsigned long wb2d; /* write back 2 data */
230 unsigned long wb1a; /* write back 1 address */
231 unsigned long wb1dpd0; /* write back 1 data/push data 0*/
232 unsigned long pd1; /* push data 1*/
233 unsigned long pd2; /* push data 2*/
234 unsigned long pd3; /* push data 3*/
235 } fmt7;
236 struct {
237 unsigned long iaddr; /* instruction address */
238 unsigned short int1[4]; /* internal registers */
239 } fmt9;
240 struct {
241 unsigned short int1;
242 unsigned short ssw; /* special status word */
243 unsigned short isc; /* instruction stage c */
244 unsigned short isb; /* instruction stage b */
245 unsigned long daddr; /* data cycle fault address */
246 unsigned short int2[2];
247 unsigned long dobuf; /* data cycle output buffer */
248 unsigned short int3[2];
249 } fmta;
250 struct {
251 unsigned short int1;
252 unsigned short ssw; /* special status word */
253 unsigned short isc; /* instruction stage c */
254 unsigned short isb; /* instruction stage b */
255 unsigned long daddr; /* data cycle fault address */
256 unsigned short int2[2];
257 unsigned long dobuf; /* data cycle output buffer */
258 unsigned short int3[4];
259 unsigned long baddr; /* stage B address */
260 unsigned short int4[2];
261 unsigned long dibuf; /* data cycle input buffer */
262 unsigned short int5[3];
263 unsigned ver : 4; /* stack frame version # */
264 unsigned int6:12;
265 unsigned short int7[18];
266 } fmtb;
267 } un;
268};
269
270#endif /* __ASSEMBLY__ */
271
272#endif /* _M68K_TRAPS_H */
diff --git a/arch/m68k/include/asm/traps_mm.h b/arch/m68k/include/asm/traps_mm.h
deleted file mode 100644
index 8caef25624c7..000000000000
--- a/arch/m68k/include/asm/traps_mm.h
+++ /dev/null
@@ -1,272 +0,0 @@
1/*
2 * linux/include/asm/traps.h
3 *
4 * Copyright (C) 1993 Hamish Macdonald
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11#ifndef _M68K_TRAPS_H
12#define _M68K_TRAPS_H
13
14#ifndef __ASSEMBLY__
15
16#include <linux/linkage.h>
17#include <asm/ptrace.h>
18
19typedef void (*e_vector)(void);
20
21asmlinkage void auto_inthandler(void);
22asmlinkage void user_inthandler(void);
23asmlinkage void bad_inthandler(void);
24
25extern e_vector vectors[];
26
27#endif
28
29#define VEC_RESETSP (0)
30#define VEC_RESETPC (1)
31#define VEC_BUSERR (2)
32#define VEC_ADDRERR (3)
33#define VEC_ILLEGAL (4)
34#define VEC_ZERODIV (5)
35#define VEC_CHK (6)
36#define VEC_TRAP (7)
37#define VEC_PRIV (8)
38#define VEC_TRACE (9)
39#define VEC_LINE10 (10)
40#define VEC_LINE11 (11)
41#define VEC_RESV12 (12)
42#define VEC_COPROC (13)
43#define VEC_FORMAT (14)
44#define VEC_UNINT (15)
45#define VEC_RESV16 (16)
46#define VEC_RESV17 (17)
47#define VEC_RESV18 (18)
48#define VEC_RESV19 (19)
49#define VEC_RESV20 (20)
50#define VEC_RESV21 (21)
51#define VEC_RESV22 (22)
52#define VEC_RESV23 (23)
53#define VEC_SPUR (24)
54#define VEC_INT1 (25)
55#define VEC_INT2 (26)
56#define VEC_INT3 (27)
57#define VEC_INT4 (28)
58#define VEC_INT5 (29)
59#define VEC_INT6 (30)
60#define VEC_INT7 (31)
61#define VEC_SYS (32)
62#define VEC_TRAP1 (33)
63#define VEC_TRAP2 (34)
64#define VEC_TRAP3 (35)
65#define VEC_TRAP4 (36)
66#define VEC_TRAP5 (37)
67#define VEC_TRAP6 (38)
68#define VEC_TRAP7 (39)
69#define VEC_TRAP8 (40)
70#define VEC_TRAP9 (41)
71#define VEC_TRAP10 (42)
72#define VEC_TRAP11 (43)
73#define VEC_TRAP12 (44)
74#define VEC_TRAP13 (45)
75#define VEC_TRAP14 (46)
76#define VEC_TRAP15 (47)
77#define VEC_FPBRUC (48)
78#define VEC_FPIR (49)
79#define VEC_FPDIVZ (50)
80#define VEC_FPUNDER (51)
81#define VEC_FPOE (52)
82#define VEC_FPOVER (53)
83#define VEC_FPNAN (54)
84#define VEC_FPUNSUP (55)
85#define VEC_MMUCFG (56)
86#define VEC_MMUILL (57)
87#define VEC_MMUACC (58)
88#define VEC_RESV59 (59)
89#define VEC_UNIMPEA (60)
90#define VEC_UNIMPII (61)
91#define VEC_RESV62 (62)
92#define VEC_RESV63 (63)
93#define VEC_USER (64)
94
95#define VECOFF(vec) ((vec)<<2)
96
97#ifndef __ASSEMBLY__
98
99/* Status register bits */
100#define PS_T (0x8000)
101#define PS_S (0x2000)
102#define PS_M (0x1000)
103#define PS_C (0x0001)
104
105/* bits for 68020/68030 special status word */
106
107#define FC (0x8000)
108#define FB (0x4000)
109#define RC (0x2000)
110#define RB (0x1000)
111#define DF (0x0100)
112#define RM (0x0080)
113#define RW (0x0040)
114#define SZ (0x0030)
115#define DFC (0x0007)
116
117/* bits for 68030 MMU status register (mmusr,psr) */
118
119#define MMU_B (0x8000) /* bus error */
120#define MMU_L (0x4000) /* limit violation */
121#define MMU_S (0x2000) /* supervisor violation */
122#define MMU_WP (0x0800) /* write-protected */
123#define MMU_I (0x0400) /* invalid descriptor */
124#define MMU_M (0x0200) /* ATC entry modified */
125#define MMU_T (0x0040) /* transparent translation */
126#define MMU_NUM (0x0007) /* number of levels traversed */
127
128
129/* bits for 68040 special status word */
130#define CP_040 (0x8000)
131#define CU_040 (0x4000)
132#define CT_040 (0x2000)
133#define CM_040 (0x1000)
134#define MA_040 (0x0800)
135#define ATC_040 (0x0400)
136#define LK_040 (0x0200)
137#define RW_040 (0x0100)
138#define SIZ_040 (0x0060)
139#define TT_040 (0x0018)
140#define TM_040 (0x0007)
141
142/* bits for 68040 write back status word */
143#define WBV_040 (0x80)
144#define WBSIZ_040 (0x60)
145#define WBBYT_040 (0x20)
146#define WBWRD_040 (0x40)
147#define WBLNG_040 (0x00)
148#define WBTT_040 (0x18)
149#define WBTM_040 (0x07)
150
151/* bus access size codes */
152#define BA_SIZE_BYTE (0x20)
153#define BA_SIZE_WORD (0x40)
154#define BA_SIZE_LONG (0x00)
155#define BA_SIZE_LINE (0x60)
156
157/* bus access transfer type codes */
158#define BA_TT_MOVE16 (0x08)
159
160/* bits for 68040 MMU status register (mmusr) */
161#define MMU_B_040 (0x0800)
162#define MMU_G_040 (0x0400)
163#define MMU_S_040 (0x0080)
164#define MMU_CM_040 (0x0060)
165#define MMU_M_040 (0x0010)
166#define MMU_WP_040 (0x0004)
167#define MMU_T_040 (0x0002)
168#define MMU_R_040 (0x0001)
169
170/* bits in the 68060 fault status long word (FSLW) */
171#define MMU060_MA (0x08000000) /* misaligned */
172#define MMU060_LK (0x02000000) /* locked transfer */
173#define MMU060_RW (0x01800000) /* read/write */
174# define MMU060_RW_W (0x00800000) /* write */
175# define MMU060_RW_R (0x01000000) /* read */
176# define MMU060_RW_RMW (0x01800000) /* read/modify/write */
177# define MMU060_W (0x00800000) /* general write, includes rmw */
178#define MMU060_SIZ (0x00600000) /* transfer size */
179#define MMU060_TT (0x00180000) /* transfer type (TT) bits */
180#define MMU060_TM (0x00070000) /* transfer modifier (TM) bits */
181#define MMU060_IO (0x00008000) /* instruction or operand */
182#define MMU060_PBE (0x00004000) /* push buffer bus error */
183#define MMU060_SBE (0x00002000) /* store buffer bus error */
184#define MMU060_PTA (0x00001000) /* pointer A fault */
185#define MMU060_PTB (0x00000800) /* pointer B fault */
186#define MMU060_IL (0x00000400) /* double indirect descr fault */
187#define MMU060_PF (0x00000200) /* page fault (invalid descr) */
188#define MMU060_SP (0x00000100) /* supervisor protection */
189#define MMU060_WP (0x00000080) /* write protection */
190#define MMU060_TWE (0x00000040) /* bus error on table search */
191#define MMU060_RE (0x00000020) /* bus error on read */
192#define MMU060_WE (0x00000010) /* bus error on write */
193#define MMU060_TTR (0x00000008) /* error caused by TTR translation */
194#define MMU060_BPE (0x00000004) /* branch prediction error */
195#define MMU060_SEE (0x00000001) /* software emulated error */
196
197/* cases of missing or invalid descriptors */
198#define MMU060_DESC_ERR (MMU060_PTA | MMU060_PTB | \
199 MMU060_IL | MMU060_PF)
200/* bits that indicate real errors */
201#define MMU060_ERR_BITS (MMU060_PBE | MMU060_SBE | MMU060_DESC_ERR | MMU060_SP | \
202 MMU060_WP | MMU060_TWE | MMU060_RE | MMU060_WE)
203
204/* structure for stack frames */
205
206struct frame {
207 struct pt_regs ptregs;
208 union {
209 struct {
210 unsigned long iaddr; /* instruction address */
211 } fmt2;
212 struct {
213 unsigned long effaddr; /* effective address */
214 } fmt3;
215 struct {
216 unsigned long effaddr; /* effective address */
217 unsigned long pc; /* pc of faulted instr */
218 } fmt4;
219 struct {
220 unsigned long effaddr; /* effective address */
221 unsigned short ssw; /* special status word */
222 unsigned short wb3s; /* write back 3 status */
223 unsigned short wb2s; /* write back 2 status */
224 unsigned short wb1s; /* write back 1 status */
225 unsigned long faddr; /* fault address */
226 unsigned long wb3a; /* write back 3 address */
227 unsigned long wb3d; /* write back 3 data */
228 unsigned long wb2a; /* write back 2 address */
229 unsigned long wb2d; /* write back 2 data */
230 unsigned long wb1a; /* write back 1 address */
231 unsigned long wb1dpd0; /* write back 1 data/push data 0*/
232 unsigned long pd1; /* push data 1*/
233 unsigned long pd2; /* push data 2*/
234 unsigned long pd3; /* push data 3*/
235 } fmt7;
236 struct {
237 unsigned long iaddr; /* instruction address */
238 unsigned short int1[4]; /* internal registers */
239 } fmt9;
240 struct {
241 unsigned short int1;
242 unsigned short ssw; /* special status word */
243 unsigned short isc; /* instruction stage c */
244 unsigned short isb; /* instruction stage b */
245 unsigned long daddr; /* data cycle fault address */
246 unsigned short int2[2];
247 unsigned long dobuf; /* data cycle output buffer */
248 unsigned short int3[2];
249 } fmta;
250 struct {
251 unsigned short int1;
252 unsigned short ssw; /* special status word */
253 unsigned short isc; /* instruction stage c */
254 unsigned short isb; /* instruction stage b */
255 unsigned long daddr; /* data cycle fault address */
256 unsigned short int2[2];
257 unsigned long dobuf; /* data cycle output buffer */
258 unsigned short int3[4];
259 unsigned long baddr; /* stage B address */
260 unsigned short int4[2];
261 unsigned long dibuf; /* data cycle input buffer */
262 unsigned short int5[3];
263 unsigned ver : 4; /* stack frame version # */
264 unsigned int6:12;
265 unsigned short int7[18];
266 } fmtb;
267 } un;
268};
269
270#endif /* __ASSEMBLY__ */
271
272#endif /* _M68K_TRAPS_H */
diff --git a/arch/m68k/include/asm/traps_no.h b/arch/m68k/include/asm/traps_no.h
deleted file mode 100644
index d0671e5f8e29..000000000000
--- a/arch/m68k/include/asm/traps_no.h
+++ /dev/null
@@ -1,154 +0,0 @@
1/*
2 * linux/include/asm/traps.h
3 *
4 * Copyright (C) 1993 Hamish Macdonald
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11#ifndef _M68KNOMMU_TRAPS_H
12#define _M68KNOMMU_TRAPS_H
13
14#ifndef __ASSEMBLY__
15
16typedef void (*e_vector)(void);
17
18extern e_vector vectors[];
19extern void init_vectors(void);
20extern void enable_vector(unsigned int irq);
21extern void disable_vector(unsigned int irq);
22extern void ack_vector(unsigned int irq);
23
24#endif
25
26#define VEC_BUSERR (2)
27#define VEC_ADDRERR (3)
28#define VEC_ILLEGAL (4)
29#define VEC_ZERODIV (5)
30#define VEC_CHK (6)
31#define VEC_TRAP (7)
32#define VEC_PRIV (8)
33#define VEC_TRACE (9)
34#define VEC_LINE10 (10)
35#define VEC_LINE11 (11)
36#define VEC_RESV1 (12)
37#define VEC_COPROC (13)
38#define VEC_FORMAT (14)
39#define VEC_UNINT (15)
40#define VEC_SPUR (24)
41#define VEC_INT1 (25)
42#define VEC_INT2 (26)
43#define VEC_INT3 (27)
44#define VEC_INT4 (28)
45#define VEC_INT5 (29)
46#define VEC_INT6 (30)
47#define VEC_INT7 (31)
48#define VEC_SYS (32)
49#define VEC_TRAP1 (33)
50#define VEC_TRAP2 (34)
51#define VEC_TRAP3 (35)
52#define VEC_TRAP4 (36)
53#define VEC_TRAP5 (37)
54#define VEC_TRAP6 (38)
55#define VEC_TRAP7 (39)
56#define VEC_TRAP8 (40)
57#define VEC_TRAP9 (41)
58#define VEC_TRAP10 (42)
59#define VEC_TRAP11 (43)
60#define VEC_TRAP12 (44)
61#define VEC_TRAP13 (45)
62#define VEC_TRAP14 (46)
63#define VEC_TRAP15 (47)
64#define VEC_FPBRUC (48)
65#define VEC_FPIR (49)
66#define VEC_FPDIVZ (50)
67#define VEC_FPUNDER (51)
68#define VEC_FPOE (52)
69#define VEC_FPOVER (53)
70#define VEC_FPNAN (54)
71#define VEC_FPUNSUP (55)
72#define VEC_UNIMPEA (60)
73#define VEC_UNIMPII (61)
74#define VEC_USER (64)
75
76#define VECOFF(vec) ((vec)<<2)
77
78#ifndef __ASSEMBLY__
79
80/* Status register bits */
81#define PS_T (0x8000)
82#define PS_S (0x2000)
83#define PS_M (0x1000)
84#define PS_C (0x0001)
85
86/* structure for stack frames */
87
88struct frame {
89 struct pt_regs ptregs;
90 union {
91 struct {
92 unsigned long iaddr; /* instruction address */
93 } fmt2;
94 struct {
95 unsigned long effaddr; /* effective address */
96 } fmt3;
97 struct {
98 unsigned long effaddr; /* effective address */
99 unsigned long pc; /* pc of faulted instr */
100 } fmt4;
101 struct {
102 unsigned long effaddr; /* effective address */
103 unsigned short ssw; /* special status word */
104 unsigned short wb3s; /* write back 3 status */
105 unsigned short wb2s; /* write back 2 status */
106 unsigned short wb1s; /* write back 1 status */
107 unsigned long faddr; /* fault address */
108 unsigned long wb3a; /* write back 3 address */
109 unsigned long wb3d; /* write back 3 data */
110 unsigned long wb2a; /* write back 2 address */
111 unsigned long wb2d; /* write back 2 data */
112 unsigned long wb1a; /* write back 1 address */
113 unsigned long wb1dpd0; /* write back 1 data/push data 0*/
114 unsigned long pd1; /* push data 1*/
115 unsigned long pd2; /* push data 2*/
116 unsigned long pd3; /* push data 3*/
117 } fmt7;
118 struct {
119 unsigned long iaddr; /* instruction address */
120 unsigned short int1[4]; /* internal registers */
121 } fmt9;
122 struct {
123 unsigned short int1;
124 unsigned short ssw; /* special status word */
125 unsigned short isc; /* instruction stage c */
126 unsigned short isb; /* instruction stage b */
127 unsigned long daddr; /* data cycle fault address */
128 unsigned short int2[2];
129 unsigned long dobuf; /* data cycle output buffer */
130 unsigned short int3[2];
131 } fmta;
132 struct {
133 unsigned short int1;
134 unsigned short ssw; /* special status word */
135 unsigned short isc; /* instruction stage c */
136 unsigned short isb; /* instruction stage b */
137 unsigned long daddr; /* data cycle fault address */
138 unsigned short int2[2];
139 unsigned long dobuf; /* data cycle output buffer */
140 unsigned short int3[4];
141 unsigned long baddr; /* stage B address */
142 unsigned short int4[2];
143 unsigned long dibuf; /* data cycle input buffer */
144 unsigned short int5[3];
145 unsigned ver : 4; /* stack frame version # */
146 unsigned int6:12;
147 unsigned short int7[18];
148 } fmtb;
149 } un;
150};
151
152#endif /* __ASSEMBLY__ */
153
154#endif /* _M68KNOMMU_TRAPS_H */
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