diff options
Diffstat (limited to 'arch/m68k/include/asm/m5307sim.h')
-rw-r--r-- | arch/m68k/include/asm/m5307sim.h | 43 |
1 files changed, 16 insertions, 27 deletions
diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h index c6830e5b54ce..0bf57397e7a9 100644 --- a/arch/m68k/include/asm/m5307sim.h +++ b/arch/m68k/include/asm/m5307sim.h | |||
@@ -14,6 +14,11 @@ | |||
14 | #define m5307sim_h | 14 | #define m5307sim_h |
15 | /****************************************************************************/ | 15 | /****************************************************************************/ |
16 | 16 | ||
17 | #define CPU_NAME "COLDFIRE(m5307)" | ||
18 | #define CPU_INSTR_PER_JIFFY 3 | ||
19 | |||
20 | #include <asm/m53xxacr.h> | ||
21 | |||
17 | /* | 22 | /* |
18 | * Define the 5307 SIM register set addresses. | 23 | * Define the 5307 SIM register set addresses. |
19 | */ | 24 | */ |
@@ -94,6 +99,17 @@ | |||
94 | #define MCFSIM_PADAT (MCF_MBAR + 0x248) | 99 | #define MCFSIM_PADAT (MCF_MBAR + 0x248) |
95 | 100 | ||
96 | /* | 101 | /* |
102 | * UART module. | ||
103 | */ | ||
104 | #if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3) | ||
105 | #define MCFUART_BASE1 0x200 /* Base address of UART1 */ | ||
106 | #define MCFUART_BASE2 0x1c0 /* Base address of UART2 */ | ||
107 | #else | ||
108 | #define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ | ||
109 | #define MCFUART_BASE2 0x200 /* Base address of UART2 */ | ||
110 | #endif | ||
111 | |||
112 | /* | ||
97 | * Generic GPIO support | 113 | * Generic GPIO support |
98 | */ | 114 | */ |
99 | #define MCFGPIO_PIN_MAX 16 | 115 | #define MCFGPIO_PIN_MAX 16 |
@@ -146,32 +162,5 @@ | |||
146 | #define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */ | 162 | #define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */ |
147 | #define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */ | 163 | #define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */ |
148 | 164 | ||
149 | /* | ||
150 | * Define the Cache register flags. | ||
151 | */ | ||
152 | #define CACR_EC (1<<31) | ||
153 | #define CACR_ESB (1<<29) | ||
154 | #define CACR_DPI (1<<28) | ||
155 | #define CACR_HLCK (1<<27) | ||
156 | #define CACR_CINVA (1<<24) | ||
157 | #define CACR_DNFB (1<<10) | ||
158 | #define CACR_DCM_WTHRU (0<<8) | ||
159 | #define CACR_DCM_WBACK (1<<8) | ||
160 | #define CACR_DCM_OFF_PRE (2<<8) | ||
161 | #define CACR_DCM_OFF_IMP (3<<8) | ||
162 | #define CACR_DW (1<<5) | ||
163 | |||
164 | #define ACR_BASE_POS 24 | ||
165 | #define ACR_MASK_POS 16 | ||
166 | #define ACR_ENABLE (1<<15) | ||
167 | #define ACR_USER (0<<13) | ||
168 | #define ACR_SUPER (1<<13) | ||
169 | #define ACR_ANY (2<<13) | ||
170 | #define ACR_CM_WTHRU (0<<5) | ||
171 | #define ACR_CM_WBACK (1<<5) | ||
172 | #define ACR_CM_OFF_PRE (2<<5) | ||
173 | #define ACR_CM_OFF_IMP (3<<5) | ||
174 | #define ACR_WPROTECT (1<<2) | ||
175 | |||
176 | /****************************************************************************/ | 165 | /****************************************************************************/ |
177 | #endif /* m5307sim_h */ | 166 | #endif /* m5307sim_h */ |