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-rw-r--r--arch/m68k/include/asm/m5272sim.h24
1 files changed, 15 insertions, 9 deletions
diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h
index 6217edc21139..0665ba1a5d3c 100644
--- a/arch/m68k/include/asm/m5272sim.h
+++ b/arch/m68k/include/asm/m5272sim.h
@@ -63,16 +63,22 @@
63#define MCFSIM_DCMR1 0x5c /* DRAM 1 Mask reg (r/w) */ 63#define MCFSIM_DCMR1 0x5c /* DRAM 1 Mask reg (r/w) */
64#define MCFSIM_DCCR1 0x63 /* DRAM 1 Control reg (r/w) */ 64#define MCFSIM_DCCR1 0x63 /* DRAM 1 Control reg (r/w) */
65 65
66#define MCFSIM_PACNT 0x80 /* Port A Control (r/w) */ 66#define MCFSIM_PACNT (MCF_MBAR + 0x80) /* Port A Control (r/w) */
67#define MCFSIM_PADDR 0x84 /* Port A Direction (r/w) */ 67#define MCFSIM_PADDR (MCF_MBAR + 0x84) /* Port A Direction (r/w) */
68#define MCFSIM_PADAT 0x86 /* Port A Data (r/w) */ 68#define MCFSIM_PADAT (MCF_MBAR + 0x86) /* Port A Data (r/w) */
69#define MCFSIM_PBCNT 0x88 /* Port B Control (r/w) */ 69#define MCFSIM_PBCNT (MCF_MBAR + 0x88) /* Port B Control (r/w) */
70#define MCFSIM_PBDDR 0x8c /* Port B Direction (r/w) */ 70#define MCFSIM_PBDDR (MCF_MBAR + 0x8c) /* Port B Direction (r/w) */
71#define MCFSIM_PBDAT 0x8e /* Port B Data (r/w) */ 71#define MCFSIM_PBDAT (MCF_MBAR + 0x8e) /* Port B Data (r/w) */
72#define MCFSIM_PCDDR 0x94 /* Port C Direction (r/w) */ 72#define MCFSIM_PCDDR (MCF_MBAR + 0x94) /* Port C Direction (r/w) */
73#define MCFSIM_PCDAT 0x96 /* Port C Data (r/w) */ 73#define MCFSIM_PCDAT (MCF_MBAR + 0x96) /* Port C Data (r/w) */
74#define MCFSIM_PDCNT 0x98 /* Port D Control (r/w) */ 74#define MCFSIM_PDCNT (MCF_MBAR + 0x98) /* Port D Control (r/w) */
75 75
76 76
77/*
78 * Generic GPIO support
79 */
80#define MCFGPIO_PIN_MAX 48
81#define MCFGPIO_IRQ_MAX -1
82#define MCFGPIO_IRQ_VECBASE -1
77/****************************************************************************/ 83/****************************************************************************/
78#endif /* m5272sim_h */ 84#endif /* m5272sim_h */