1 files changed, 86 insertions, 0 deletions

diff --git a/arch/m68k/coldfire/m523x.c b/arch/m68k/coldfire/m523x.c
new file mode 100644
index 000000000000..6b7135e6d5b4
--- /dev/null
+++ b/arch/m68k/coldfire/m523x.c
@@ -0,0 +1,86 @@
+/***************************************************************************/
+
+/*
+ *      linux/arch/m68knommu/platform/523x/config.c
+ *
+ *      Sub-architcture dependent initialization code for the Freescale
+ *      523x CPUs.
+ *
+ *      Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com)
+ *      Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfclk.h>
+
+/***************************************************************************/
+
+DEFINE_CLK(pll, "pll.0", MCF_CLK);
+DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
+DEFINE_CLK(mcfpit0, "mcfpit.0", MCF_CLK);
+DEFINE_CLK(mcfpit1, "mcfpit.1", MCF_CLK);
+DEFINE_CLK(mcfpit2, "mcfpit.2", MCF_CLK);
+DEFINE_CLK(mcfpit3, "mcfpit.3", MCF_CLK);
+DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
+DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
+DEFINE_CLK(mcfuart2, "mcfuart.2", MCF_BUSCLK);
+DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK);
+DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK);
+
+struct clk *mcf_clks[] = {
+        &clk_pll,
+        &clk_sys,
+        &clk_mcfpit0,
+        &clk_mcfpit1,
+        &clk_mcfpit2,
+        &clk_mcfpit3,
+        &clk_mcfuart0,
+        &clk_mcfuart1,
+        &clk_mcfuart2,
+        &clk_mcfqspi0,
+        &clk_fec0,
+        NULL
+};
+
+/***************************************************************************/
+
+static void __init m523x_qspi_init(void)
+{
+#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
+        u16 par;
+
+        /* setup QSPS pins for QSPI with gpio CS control */
+        writeb(0x1f, MCFGPIO_PAR_QSPI);
+        /* and CS2 & CS3 as gpio */
+        par = readw(MCFGPIO_PAR_TIMER);
+        par &= 0x3f3f;
+        writew(par, MCFGPIO_PAR_TIMER);
+#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
+}
+
+/***************************************************************************/
+
+static void __init m523x_fec_init(void)
+{
+        /* Set multi-function pins to ethernet use */
+        writeb(readb(MCFGPIO_PAR_FECI2C) | 0xf0, MCFGPIO_PAR_FECI2C);
+}
+
+/***************************************************************************/
+
+void __init config_BSP(char *commandp, int size)
+{
+        mach_sched_init = hw_timer_init;
+        m523x_fec_init();
+        m523x_qspi_init();
+}
+
+/***************************************************************************/