diff options
Diffstat (limited to 'arch/m32r')
-rw-r--r-- | arch/m32r/kernel/time.c | 47 |
1 files changed, 7 insertions, 40 deletions
diff --git a/arch/m32r/kernel/time.c b/arch/m32r/kernel/time.c index 9cedcef11575..bda86820bffd 100644 --- a/arch/m32r/kernel/time.c +++ b/arch/m32r/kernel/time.c | |||
@@ -106,24 +106,6 @@ u32 arch_gettimeoffset(void) | |||
106 | } | 106 | } |
107 | 107 | ||
108 | /* | 108 | /* |
109 | * In order to set the CMOS clock precisely, set_rtc_mmss has to be | ||
110 | * called 500 ms after the second nowtime has started, because when | ||
111 | * nowtime is written into the registers of the CMOS clock, it will | ||
112 | * jump to the next second precisely 500 ms later. Check the Motorola | ||
113 | * MC146818A or Dallas DS12887 data sheet for details. | ||
114 | * | ||
115 | * BUG: This routine does not handle hour overflow properly; it just | ||
116 | * sets the minutes. Usually you won't notice until after reboot! | ||
117 | */ | ||
118 | static inline int set_rtc_mmss(unsigned long nowtime) | ||
119 | { | ||
120 | return 0; | ||
121 | } | ||
122 | |||
123 | /* last time the cmos clock got updated */ | ||
124 | static long last_rtc_update = 0; | ||
125 | |||
126 | /* | ||
127 | * timer_interrupt() needs to keep up the real-time clock, | 109 | * timer_interrupt() needs to keep up the real-time clock, |
128 | * as well as call the "do_timer()" routine every clocktick | 110 | * as well as call the "do_timer()" routine every clocktick |
129 | */ | 111 | */ |
@@ -138,23 +120,6 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id) | |||
138 | #ifndef CONFIG_SMP | 120 | #ifndef CONFIG_SMP |
139 | update_process_times(user_mode(get_irq_regs())); | 121 | update_process_times(user_mode(get_irq_regs())); |
140 | #endif | 122 | #endif |
141 | /* | ||
142 | * If we have an externally synchronized Linux clock, then update | ||
143 | * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be | ||
144 | * called as close as possible to 500 ms before the new second starts. | ||
145 | */ | ||
146 | write_seqlock(&xtime_lock); | ||
147 | if (ntp_synced() | ||
148 | && xtime.tv_sec > last_rtc_update + 660 | ||
149 | && (xtime.tv_nsec / 1000) >= 500000 - ((unsigned)TICK_SIZE) / 2 | ||
150 | && (xtime.tv_nsec / 1000) <= 500000 + ((unsigned)TICK_SIZE) / 2) | ||
151 | { | ||
152 | if (set_rtc_mmss(xtime.tv_sec) == 0) | ||
153 | last_rtc_update = xtime.tv_sec; | ||
154 | else /* do it again in 60 s */ | ||
155 | last_rtc_update = xtime.tv_sec - 600; | ||
156 | } | ||
157 | write_sequnlock(&xtime_lock); | ||
158 | /* As we return to user mode fire off the other CPU schedulers.. | 123 | /* As we return to user mode fire off the other CPU schedulers.. |
159 | this is basically because we don't yet share IRQ's around. | 124 | this is basically because we don't yet share IRQ's around. |
160 | This message is rigged to be safe on the 386 - basically it's | 125 | This message is rigged to be safe on the 386 - basically it's |
@@ -174,7 +139,7 @@ static struct irqaction irq0 = { | |||
174 | .name = "MFT2", | 139 | .name = "MFT2", |
175 | }; | 140 | }; |
176 | 141 | ||
177 | void __init time_init(void) | 142 | void read_persistent_clock(struct timespec *ts) |
178 | { | 143 | { |
179 | unsigned int epoch, year, mon, day, hour, min, sec; | 144 | unsigned int epoch, year, mon, day, hour, min, sec; |
180 | 145 | ||
@@ -194,11 +159,13 @@ void __init time_init(void) | |||
194 | epoch = 1952; | 159 | epoch = 1952; |
195 | year += epoch; | 160 | year += epoch; |
196 | 161 | ||
197 | xtime.tv_sec = mktime(year, mon, day, hour, min, sec); | 162 | ts->tv_sec = mktime(year, mon, day, hour, min, sec); |
198 | xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); | 163 | ts->tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); |
199 | set_normalized_timespec(&wall_to_monotonic, | 164 | } |
200 | -xtime.tv_sec, -xtime.tv_nsec); | ||
201 | 165 | ||
166 | |||
167 | void __init time_init(void) | ||
168 | { | ||
202 | #if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \ | 169 | #if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \ |
203 | || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \ | 170 | || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \ |
204 | || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) | 171 | || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) |