aboutsummaryrefslogtreecommitdiffstats
path: root/arch/m32r/platforms/usrv
diff options
context:
space:
mode:
Diffstat (limited to 'arch/m32r/platforms/usrv')
-rw-r--r--arch/m32r/platforms/usrv/Makefile1
-rw-r--r--arch/m32r/platforms/usrv/io.c225
-rw-r--r--arch/m32r/platforms/usrv/setup.c248
3 files changed, 474 insertions, 0 deletions
diff --git a/arch/m32r/platforms/usrv/Makefile b/arch/m32r/platforms/usrv/Makefile
new file mode 100644
index 000000000000..0de59084f21c
--- /dev/null
+++ b/arch/m32r/platforms/usrv/Makefile
@@ -0,0 +1 @@
obj-y := setup.o io.o
diff --git a/arch/m32r/platforms/usrv/io.c b/arch/m32r/platforms/usrv/io.c
new file mode 100644
index 000000000000..f5e50d37badb
--- /dev/null
+++ b/arch/m32r/platforms/usrv/io.c
@@ -0,0 +1,225 @@
1/*
2 * linux/arch/m32r/platforms/usrv/io.c
3 *
4 * Typical I/O routines for uServer board.
5 *
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Takeo Takahashi
8 *
9 * This file is subject to the terms and conditions of the GNU General
10 * Public License. See the file "COPYING" in the main directory of this
11 * archive for more details.
12 *
13 */
14
15#include <asm/m32r.h>
16#include <asm/page.h>
17#include <asm/io.h>
18
19#include <linux/types.h>
20#include "../../../../drivers/pcmcia/m32r_cfc.h"
21
22extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int);
23extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int);
24extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int);
25extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
26#define CFC_IOSTART CFC_IOPORT_BASE
27#define CFC_IOEND (CFC_IOSTART + (M32R_PCC_MAPSIZE * M32R_MAX_PCC) - 1)
28
29#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
30#define UART0_REGSTART 0x04c20000
31#define UART1_REGSTART 0x04c20100
32#define UART_IOMAP_SIZE 8
33#define UART0_IOSTART 0x3f8
34#define UART0_IOEND (UART0_IOSTART + UART_IOMAP_SIZE - 1)
35#define UART1_IOSTART 0x2f8
36#define UART1_IOEND (UART1_IOSTART + UART_IOMAP_SIZE - 1)
37#endif /* CONFIG_SERIAL_8250 || CONFIG_SERIAL_8250_MODULE */
38
39#define PORT2ADDR(port) _port2addr(port)
40
41static inline void *_port2addr(unsigned long port)
42{
43#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
44 if (port >= UART0_IOSTART && port <= UART0_IOEND)
45 port = ((port - UART0_IOSTART) << 1) + UART0_REGSTART;
46 else if (port >= UART1_IOSTART && port <= UART1_IOEND)
47 port = ((port - UART1_IOSTART) << 1) + UART1_REGSTART;
48#endif /* CONFIG_SERIAL_8250 || CONFIG_SERIAL_8250_MODULE */
49 return (void *)(port | (NONCACHE_OFFSET));
50}
51
52static inline void delay(void)
53{
54 __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
55}
56
57unsigned char _inb(unsigned long port)
58{
59 if (port >= CFC_IOSTART && port <= CFC_IOEND) {
60 unsigned char b;
61 pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0);
62 return b;
63 } else
64 return *(volatile unsigned char *)PORT2ADDR(port);
65}
66
67unsigned short _inw(unsigned long port)
68{
69 if (port >= CFC_IOSTART && port <= CFC_IOEND) {
70 unsigned short w;
71 pcc_ioread_word(0, port, &w, sizeof(w), 1, 0);
72 return w;
73 } else
74 return *(volatile unsigned short *)PORT2ADDR(port);
75}
76
77unsigned long _inl(unsigned long port)
78{
79 if (port >= CFC_IOSTART && port <= CFC_IOEND) {
80 unsigned long l;
81 pcc_ioread_word(0, port, &l, sizeof(l), 1, 0);
82 return l;
83 } else
84 return *(volatile unsigned long *)PORT2ADDR(port);
85}
86
87unsigned char _inb_p(unsigned long port)
88{
89 unsigned char v = _inb(port);
90 delay();
91 return v;
92}
93
94unsigned short _inw_p(unsigned long port)
95{
96 unsigned short v = _inw(port);
97 delay();
98 return v;
99}
100
101unsigned long _inl_p(unsigned long port)
102{
103 unsigned long v = _inl(port);
104 delay();
105 return v;
106}
107
108void _outb(unsigned char b, unsigned long port)
109{
110 if (port >= CFC_IOSTART && port <= CFC_IOEND)
111 pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0);
112 else
113 *(volatile unsigned char *)PORT2ADDR(port) = b;
114}
115
116void _outw(unsigned short w, unsigned long port)
117{
118 if (port >= CFC_IOSTART && port <= CFC_IOEND)
119 pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0);
120 else
121 *(volatile unsigned short *)PORT2ADDR(port) = w;
122}
123
124void _outl(unsigned long l, unsigned long port)
125{
126 if (port >= CFC_IOSTART && port <= CFC_IOEND)
127 pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0);
128 else
129 *(volatile unsigned long *)PORT2ADDR(port) = l;
130}
131
132void _outb_p(unsigned char b, unsigned long port)
133{
134 _outb(b, port);
135 delay();
136}
137
138void _outw_p(unsigned short w, unsigned long port)
139{
140 _outw(w, port);
141 delay();
142}
143
144void _outl_p(unsigned long l, unsigned long port)
145{
146 _outl(l, port);
147 delay();
148}
149
150void _insb(unsigned int port, void * addr, unsigned long count)
151{
152 if (port >= CFC_IOSTART && port <= CFC_IOEND)
153 pcc_ioread_byte(0, port, addr, sizeof(unsigned char), count, 1);
154 else {
155 unsigned char *buf = addr;
156 unsigned char *portp = PORT2ADDR(port);
157 while (count--)
158 *buf++ = *(volatile unsigned char *)portp;
159 }
160}
161
162void _insw(unsigned int port, void * addr, unsigned long count)
163{
164 unsigned short *buf = addr;
165 unsigned short *portp;
166
167 if (port >= CFC_IOSTART && port <= CFC_IOEND)
168 pcc_ioread_word(0, port, addr, sizeof(unsigned short), count,
169 1);
170 else {
171 portp = PORT2ADDR(port);
172 while (count--)
173 *buf++ = *(volatile unsigned short *)portp;
174 }
175}
176
177void _insl(unsigned int port, void * addr, unsigned long count)
178{
179 unsigned long *buf = addr;
180 unsigned long *portp;
181
182 portp = PORT2ADDR(port);
183 while (count--)
184 *buf++ = *(volatile unsigned long *)portp;
185}
186
187void _outsb(unsigned int port, const void * addr, unsigned long count)
188{
189 const unsigned char *buf = addr;
190 unsigned char *portp;
191
192 if (port >= CFC_IOSTART && port <= CFC_IOEND)
193 pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char),
194 count, 1);
195 else {
196 portp = PORT2ADDR(port);
197 while (count--)
198 *(volatile unsigned char *)portp = *buf++;
199 }
200}
201
202void _outsw(unsigned int port, const void * addr, unsigned long count)
203{
204 const unsigned short *buf = addr;
205 unsigned short *portp;
206
207 if (port >= CFC_IOSTART && port <= CFC_IOEND)
208 pcc_iowrite_word(0, port, (void *)addr, sizeof(unsigned short),
209 count, 1);
210 else {
211 portp = PORT2ADDR(port);
212 while (count--)
213 *(volatile unsigned short *)portp = *buf++;
214 }
215}
216
217void _outsl(unsigned int port, const void * addr, unsigned long count)
218{
219 const unsigned long *buf = addr;
220 unsigned char *portp;
221
222 portp = PORT2ADDR(port);
223 while (count--)
224 *(volatile unsigned long *)portp = *buf++;
225}
diff --git a/arch/m32r/platforms/usrv/setup.c b/arch/m32r/platforms/usrv/setup.c
new file mode 100644
index 000000000000..89588d649eb7
--- /dev/null
+++ b/arch/m32r/platforms/usrv/setup.c
@@ -0,0 +1,248 @@
1/*
2 * linux/arch/m32r/platforms/usrv/setup.c
3 *
4 * Setup routines for MITSUBISHI uServer
5 *
6 * Copyright (c) 2001, 2002, 2003 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto
8 */
9
10#include <linux/irq.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13
14#include <asm/system.h>
15#include <asm/m32r.h>
16#include <asm/io.h>
17
18#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
19
20icu_data_t icu_data[M32700UT_NUM_CPU_IRQ];
21
22static void disable_mappi_irq(unsigned int irq)
23{
24 unsigned long port, data;
25
26 port = irq2port(irq);
27 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
28 outl(data, port);
29}
30
31static void enable_mappi_irq(unsigned int irq)
32{
33 unsigned long port, data;
34
35 port = irq2port(irq);
36 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
37 outl(data, port);
38}
39
40static void mask_and_ack_mappi(unsigned int irq)
41{
42 disable_mappi_irq(irq);
43}
44
45static void end_mappi_irq(unsigned int irq)
46{
47 enable_mappi_irq(irq);
48}
49
50static unsigned int startup_mappi_irq(unsigned int irq)
51{
52 enable_mappi_irq(irq);
53 return 0;
54}
55
56static void shutdown_mappi_irq(unsigned int irq)
57{
58 unsigned long port;
59
60 port = irq2port(irq);
61 outl(M32R_ICUCR_ILEVEL7, port);
62}
63
64static struct hw_interrupt_type mappi_irq_type =
65{
66 .typename = "M32700-IRQ",
67 .startup = startup_mappi_irq,
68 .shutdown = shutdown_mappi_irq,
69 .enable = enable_mappi_irq,
70 .disable = disable_mappi_irq,
71 .ack = mask_and_ack_mappi,
72 .end = end_mappi_irq
73};
74
75/*
76 * Interrupt Control Unit of PLD on M32700UT (Level 2)
77 */
78#define irq2pldirq(x) ((x) - M32700UT_PLD_IRQ_BASE)
79#define pldirq2port(x) (unsigned long)((int)PLD_ICUCR1 + \
80 (((x) - 1) * sizeof(unsigned short)))
81
82typedef struct {
83 unsigned short icucr; /* ICU Control Register */
84} pld_icu_data_t;
85
86static pld_icu_data_t pld_icu_data[M32700UT_NUM_PLD_IRQ];
87
88static void disable_m32700ut_pld_irq(unsigned int irq)
89{
90 unsigned long port, data;
91 unsigned int pldirq;
92
93 pldirq = irq2pldirq(irq);
94 port = pldirq2port(pldirq);
95 data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
96 outw(data, port);
97}
98
99static void enable_m32700ut_pld_irq(unsigned int irq)
100{
101 unsigned long port, data;
102 unsigned int pldirq;
103
104 pldirq = irq2pldirq(irq);
105 port = pldirq2port(pldirq);
106 data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
107 outw(data, port);
108}
109
110static void mask_and_ack_m32700ut_pld(unsigned int irq)
111{
112 disable_m32700ut_pld_irq(irq);
113}
114
115static void end_m32700ut_pld_irq(unsigned int irq)
116{
117 enable_m32700ut_pld_irq(irq);
118 end_mappi_irq(M32R_IRQ_INT1);
119}
120
121static unsigned int startup_m32700ut_pld_irq(unsigned int irq)
122{
123 enable_m32700ut_pld_irq(irq);
124 return 0;
125}
126
127static void shutdown_m32700ut_pld_irq(unsigned int irq)
128{
129 unsigned long port;
130 unsigned int pldirq;
131
132 pldirq = irq2pldirq(irq);
133 port = pldirq2port(pldirq);
134 outw(PLD_ICUCR_ILEVEL7, port);
135}
136
137static struct hw_interrupt_type m32700ut_pld_irq_type =
138{
139 .typename = "USRV-PLD-IRQ",
140 .startup = startup_m32700ut_pld_irq,
141 .shutdown = shutdown_m32700ut_pld_irq,
142 .enable = enable_m32700ut_pld_irq,
143 .disable = disable_m32700ut_pld_irq,
144 .ack = mask_and_ack_m32700ut_pld,
145 .end = end_m32700ut_pld_irq
146};
147
148void __init init_IRQ(void)
149{
150 static int once = 0;
151 int i;
152
153 if (once)
154 return;
155 else
156 once++;
157
158 /* MFT2 : system timer */
159 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
160 irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
161 irq_desc[M32R_IRQ_MFT2].action = 0;
162 irq_desc[M32R_IRQ_MFT2].depth = 1;
163 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
164 disable_mappi_irq(M32R_IRQ_MFT2);
165
166#if defined(CONFIG_SERIAL_M32R_SIO)
167 /* SIO0_R : uart receive data */
168 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
169 irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
170 irq_desc[M32R_IRQ_SIO0_R].action = 0;
171 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
172 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
173 disable_mappi_irq(M32R_IRQ_SIO0_R);
174
175 /* SIO0_S : uart send data */
176 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
177 irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
178 irq_desc[M32R_IRQ_SIO0_S].action = 0;
179 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
180 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
181 disable_mappi_irq(M32R_IRQ_SIO0_S);
182
183 /* SIO1_R : uart receive data */
184 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
185 irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
186 irq_desc[M32R_IRQ_SIO1_R].action = 0;
187 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
188 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
189 disable_mappi_irq(M32R_IRQ_SIO1_R);
190
191 /* SIO1_S : uart send data */
192 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
193 irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
194 irq_desc[M32R_IRQ_SIO1_S].action = 0;
195 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
196 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
197 disable_mappi_irq(M32R_IRQ_SIO1_S);
198#endif /* CONFIG_SERIAL_M32R_SIO */
199
200 /* INT#67-#71: CFC#0 IREQ on PLD */
201 for (i = 0 ; i < CONFIG_M32R_CFC_NUM ; i++ ) {
202 irq_desc[PLD_IRQ_CF0 + i].status = IRQ_DISABLED;
203 irq_desc[PLD_IRQ_CF0 + i].chip = &m32700ut_pld_irq_type;
204 irq_desc[PLD_IRQ_CF0 + i].action = 0;
205 irq_desc[PLD_IRQ_CF0 + i].depth = 1; /* disable nested irq */
206 pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr
207 = PLD_ICUCR_ISMOD01; /* 'L' level sense */
208 disable_m32700ut_pld_irq(PLD_IRQ_CF0 + i);
209 }
210
211#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
212 /* INT#76: 16552D#0 IREQ on PLD */
213 irq_desc[PLD_IRQ_UART0].status = IRQ_DISABLED;
214 irq_desc[PLD_IRQ_UART0].chip = &m32700ut_pld_irq_type;
215 irq_desc[PLD_IRQ_UART0].action = 0;
216 irq_desc[PLD_IRQ_UART0].depth = 1; /* disable nested irq */
217 pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr
218 = PLD_ICUCR_ISMOD03; /* 'H' level sense */
219 disable_m32700ut_pld_irq(PLD_IRQ_UART0);
220
221 /* INT#77: 16552D#1 IREQ on PLD */
222 irq_desc[PLD_IRQ_UART1].status = IRQ_DISABLED;
223 irq_desc[PLD_IRQ_UART1].chip = &m32700ut_pld_irq_type;
224 irq_desc[PLD_IRQ_UART1].action = 0;
225 irq_desc[PLD_IRQ_UART1].depth = 1; /* disable nested irq */
226 pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr
227 = PLD_ICUCR_ISMOD03; /* 'H' level sense */
228 disable_m32700ut_pld_irq(PLD_IRQ_UART1);
229#endif /* CONFIG_SERIAL_8250 || CONFIG_SERIAL_8250_MODULE */
230
231#if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE)
232 /* INT#80: AK4524 IREQ on PLD */
233 irq_desc[PLD_IRQ_SNDINT].status = IRQ_DISABLED;
234 irq_desc[PLD_IRQ_SNDINT].chip = &m32700ut_pld_irq_type;
235 irq_desc[PLD_IRQ_SNDINT].action = 0;
236 irq_desc[PLD_IRQ_SNDINT].depth = 1; /* disable nested irq */
237 pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr
238 = PLD_ICUCR_ISMOD01; /* 'L' level sense */
239 disable_m32700ut_pld_irq(PLD_IRQ_SNDINT);
240#endif /* CONFIG_IDC_AK4524 || CONFIG_IDC_AK4524_MODULE */
241
242 /*
243 * INT1# is used for UART, MMC, CF Controller in FPGA.
244 * We enable it here.
245 */
246 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD11;
247 enable_mappi_irq(M32R_IRQ_INT1);
248}
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 15:10:03 -0500