aboutsummaryrefslogtreecommitdiffstats
path: root/arch/m32r/platforms/mappi
diff options
context:
space:
mode:
Diffstat (limited to 'arch/m32r/platforms/mappi')
-rw-r--r--arch/m32r/platforms/mappi/Makefile1
-rw-r--r--arch/m32r/platforms/mappi/io.c325
-rw-r--r--arch/m32r/platforms/mappi/setup.c201
3 files changed, 527 insertions, 0 deletions
diff --git a/arch/m32r/platforms/mappi/Makefile b/arch/m32r/platforms/mappi/Makefile
new file mode 100644
index 000000000000..0de59084f21c
--- /dev/null
+++ b/arch/m32r/platforms/mappi/Makefile
@@ -0,0 +1 @@
obj-y := setup.o io.o
diff --git a/arch/m32r/platforms/mappi/io.c b/arch/m32r/platforms/mappi/io.c
new file mode 100644
index 000000000000..ac1c396d477d
--- /dev/null
+++ b/arch/m32r/platforms/mappi/io.c
@@ -0,0 +1,325 @@
1/*
2 * linux/arch/m32r/platforms/mappi/io.c
3 *
4 * Typical I/O routines for Mappi board.
5 *
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto
8 */
9
10#include <asm/m32r.h>
11#include <asm/page.h>
12#include <asm/io.h>
13#include <asm/byteorder.h>
14
15#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
16#include <linux/types.h>
17
18#define M32R_PCC_IOMAP_SIZE 0x1000
19
20#define M32R_PCC_IOSTART0 0x1000
21#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1)
22#define M32R_PCC_IOSTART1 0x2000
23#define M32R_PCC_IOEND1 (M32R_PCC_IOSTART1 + M32R_PCC_IOMAP_SIZE - 1)
24
25extern void pcc_ioread(int, unsigned long, void *, size_t, size_t, int);
26extern void pcc_iowrite(int, unsigned long, void *, size_t, size_t, int);
27#endif /* CONFIG_PCMCIA && CONFIG_M32R_PCC */
28
29#define PORT2ADDR(port) _port2addr(port)
30
31static inline void *_port2addr(unsigned long port)
32{
33 return (void *)(port | NONCACHE_OFFSET);
34}
35
36static inline void *_port2addr_ne(unsigned long port)
37{
38 return (void *)((port<<1) + NONCACHE_OFFSET + 0x0C000000);
39}
40
41static inline void delay(void)
42{
43 __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
44}
45
46/*
47 * NIC I/O function
48 */
49
50#define PORT2ADDR_NE(port) _port2addr_ne(port)
51
52static inline unsigned char _ne_inb(void *portp)
53{
54 return (unsigned char) *(volatile unsigned short *)portp;
55}
56
57static inline unsigned short _ne_inw(void *portp)
58{
59 unsigned short tmp;
60
61 tmp = *(volatile unsigned short *)portp;
62 return le16_to_cpu(tmp);
63}
64
65static inline void _ne_outb(unsigned char b, void *portp)
66{
67 *(volatile unsigned short *)portp = (unsigned short)b;
68}
69
70static inline void _ne_outw(unsigned short w, void *portp)
71{
72 *(volatile unsigned short *)portp = cpu_to_le16(w);
73}
74
75unsigned char _inb(unsigned long port)
76{
77 if (port >= 0x300 && port < 0x320)
78 return _ne_inb(PORT2ADDR_NE(port));
79 else
80#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
81 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
82 unsigned char b;
83 pcc_ioread(0, port, &b, sizeof(b), 1, 0);
84 return b;
85 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
86 unsigned char b;
87 pcc_ioread(1, port, &b, sizeof(b), 1, 0);
88 return b;
89 } else
90#endif
91
92 return *(volatile unsigned char *)PORT2ADDR(port);
93}
94
95unsigned short _inw(unsigned long port)
96{
97 if (port >= 0x300 && port < 0x320)
98 return _ne_inw(PORT2ADDR_NE(port));
99 else
100#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
101 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
102 unsigned short w;
103 pcc_ioread(0, port, &w, sizeof(w), 1, 0);
104 return w;
105 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
106 unsigned short w;
107 pcc_ioread(1, port, &w, sizeof(w), 1, 0);
108 return w;
109 } else
110#endif
111 return *(volatile unsigned short *)PORT2ADDR(port);
112}
113
114unsigned long _inl(unsigned long port)
115{
116#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
117 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
118 unsigned long l;
119 pcc_ioread(0, port, &l, sizeof(l), 1, 0);
120 return l;
121 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
122 unsigned short l;
123 pcc_ioread(1, port, &l, sizeof(l), 1, 0);
124 return l;
125 } else
126#endif
127 return *(volatile unsigned long *)PORT2ADDR(port);
128}
129
130unsigned char _inb_p(unsigned long port)
131{
132 unsigned char v = _inb(port);
133 delay();
134 return (v);
135}
136
137unsigned short _inw_p(unsigned long port)
138{
139 unsigned short v = _inw(port);
140 delay();
141 return (v);
142}
143
144unsigned long _inl_p(unsigned long port)
145{
146 unsigned long v = _inl(port);
147 delay();
148 return (v);
149}
150
151void _outb(unsigned char b, unsigned long port)
152{
153 if (port >= 0x300 && port < 0x320)
154 _ne_outb(b, PORT2ADDR_NE(port));
155 else
156#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
157 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
158 pcc_iowrite(0, port, &b, sizeof(b), 1, 0);
159 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
160 pcc_iowrite(1, port, &b, sizeof(b), 1, 0);
161 } else
162#endif
163 *(volatile unsigned char *)PORT2ADDR(port) = b;
164}
165
166void _outw(unsigned short w, unsigned long port)
167{
168 if (port >= 0x300 && port < 0x320)
169 _ne_outw(w, PORT2ADDR_NE(port));
170 else
171#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
172 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
173 pcc_iowrite(0, port, &w, sizeof(w), 1, 0);
174 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
175 pcc_iowrite(1, port, &w, sizeof(w), 1, 0);
176 } else
177#endif
178 *(volatile unsigned short *)PORT2ADDR(port) = w;
179}
180
181void _outl(unsigned long l, unsigned long port)
182{
183#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
184 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
185 pcc_iowrite(0, port, &l, sizeof(l), 1, 0);
186 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
187 pcc_iowrite(1, port, &l, sizeof(l), 1, 0);
188 } else
189#endif
190 *(volatile unsigned long *)PORT2ADDR(port) = l;
191}
192
193void _outb_p(unsigned char b, unsigned long port)
194{
195 _outb(b, port);
196 delay();
197}
198
199void _outw_p(unsigned short w, unsigned long port)
200{
201 _outw(w, port);
202 delay();
203}
204
205void _outl_p(unsigned long l, unsigned long port)
206{
207 _outl(l, port);
208 delay();
209}
210
211void _insb(unsigned int port, void *addr, unsigned long count)
212{
213 unsigned short *buf = addr;
214 unsigned short *portp;
215
216 if (port >= 0x300 && port < 0x320){
217 portp = PORT2ADDR_NE(port);
218 while (count--)
219 *buf++ = *(volatile unsigned char *)portp;
220#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
221 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
222 pcc_ioread(0, port, (void *)addr, sizeof(unsigned char),
223 count, 1);
224 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
225 pcc_ioread(1, port, (void *)addr, sizeof(unsigned char),
226 count, 1);
227#endif
228 } else {
229 portp = PORT2ADDR(port);
230 while (count--)
231 *buf++ = *(volatile unsigned char *)portp;
232 }
233}
234
235void _insw(unsigned int port, void *addr, unsigned long count)
236{
237 unsigned short *buf = addr;
238 unsigned short *portp;
239
240 if (port >= 0x300 && port < 0x320) {
241 portp = PORT2ADDR_NE(port);
242 while (count--)
243 *buf++ = _ne_inw(portp);
244#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
245 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
246 pcc_ioread(0, port, (void *)addr, sizeof(unsigned short),
247 count, 1);
248 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
249 pcc_ioread(1, port, (void *)addr, sizeof(unsigned short),
250 count, 1);
251#endif
252 } else {
253 portp = PORT2ADDR(port);
254 while (count--)
255 *buf++ = *(volatile unsigned short *)portp;
256 }
257}
258
259void _insl(unsigned int port, void *addr, unsigned long count)
260{
261 unsigned long *buf = addr;
262 unsigned long *portp;
263
264 portp = PORT2ADDR(port);
265 while (count--)
266 *buf++ = *(volatile unsigned long *)portp;
267}
268
269void _outsb(unsigned int port, const void *addr, unsigned long count)
270{
271 const unsigned char *buf = addr;
272 unsigned char *portp;
273
274 if (port >= 0x300 && port < 0x320) {
275 portp = PORT2ADDR_NE(port);
276 while (count--)
277 _ne_outb(*buf++, portp);
278#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
279 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
280 pcc_iowrite(0, port, (void *)addr, sizeof(unsigned char),
281 count, 1);
282 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
283 pcc_iowrite(1, port, (void *)addr, sizeof(unsigned char),
284 count, 1);
285#endif
286 } else {
287 portp = PORT2ADDR(port);
288 while (count--)
289 *(volatile unsigned char *)portp = *buf++;
290 }
291}
292
293void _outsw(unsigned int port, const void *addr, unsigned long count)
294{
295 const unsigned short *buf = addr;
296 unsigned short *portp;
297
298 if (port >= 0x300 && port < 0x320) {
299 portp = PORT2ADDR_NE(port);
300 while (count--)
301 _ne_outw(*buf++, portp);
302#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
303 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
304 pcc_iowrite(0, port, (void *)addr, sizeof(unsigned short),
305 count, 1);
306 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
307 pcc_iowrite(1, port, (void *)addr, sizeof(unsigned short),
308 count, 1);
309#endif
310 } else {
311 portp = PORT2ADDR(port);
312 while (count--)
313 *(volatile unsigned short *)portp = *buf++;
314 }
315}
316
317void _outsl(unsigned int port, const void *addr, unsigned long count)
318{
319 const unsigned long *buf = addr;
320 unsigned char *portp;
321
322 portp = PORT2ADDR(port);
323 while (count--)
324 *(volatile unsigned long *)portp = *buf++;
325}
diff --git a/arch/m32r/platforms/mappi/setup.c b/arch/m32r/platforms/mappi/setup.c
new file mode 100644
index 000000000000..3ec087ff2214
--- /dev/null
+++ b/arch/m32r/platforms/mappi/setup.c
@@ -0,0 +1,201 @@
1/*
2 * linux/arch/m32r/platforms/mappi/setup.c
3 *
4 * Setup routines for Renesas MAPPI Board
5 *
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto
8 */
9
10#include <linux/irq.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14
15#include <asm/system.h>
16#include <asm/m32r.h>
17#include <asm/io.h>
18
19#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
20
21icu_data_t icu_data[NR_IRQS];
22
23static void disable_mappi_irq(unsigned int irq)
24{
25 unsigned long port, data;
26
27 port = irq2port(irq);
28 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
29 outl(data, port);
30}
31
32static void enable_mappi_irq(unsigned int irq)
33{
34 unsigned long port, data;
35
36 port = irq2port(irq);
37 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
38 outl(data, port);
39}
40
41static void mask_and_ack_mappi(unsigned int irq)
42{
43 disable_mappi_irq(irq);
44}
45
46static void end_mappi_irq(unsigned int irq)
47{
48 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
49 enable_mappi_irq(irq);
50}
51
52static unsigned int startup_mappi_irq(unsigned int irq)
53{
54 enable_mappi_irq(irq);
55 return (0);
56}
57
58static void shutdown_mappi_irq(unsigned int irq)
59{
60 unsigned long port;
61
62 port = irq2port(irq);
63 outl(M32R_ICUCR_ILEVEL7, port);
64}
65
66static struct hw_interrupt_type mappi_irq_type =
67{
68 .typename = "MAPPI-IRQ",
69 .startup = startup_mappi_irq,
70 .shutdown = shutdown_mappi_irq,
71 .enable = enable_mappi_irq,
72 .disable = disable_mappi_irq,
73 .ack = mask_and_ack_mappi,
74 .end = end_mappi_irq
75};
76
77void __init init_IRQ(void)
78{
79 static int once = 0;
80
81 if (once)
82 return;
83 else
84 once++;
85
86#ifdef CONFIG_NE2000
87 /* INT0 : LAN controller (RTL8019AS) */
88 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
89 irq_desc[M32R_IRQ_INT0].chip = &mappi_irq_type;
90 irq_desc[M32R_IRQ_INT0].action = NULL;
91 irq_desc[M32R_IRQ_INT0].depth = 1;
92 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
93 disable_mappi_irq(M32R_IRQ_INT0);
94#endif /* CONFIG_M32R_NE2000 */
95
96 /* MFT2 : system timer */
97 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
98 irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
99 irq_desc[M32R_IRQ_MFT2].action = NULL;
100 irq_desc[M32R_IRQ_MFT2].depth = 1;
101 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
102 disable_mappi_irq(M32R_IRQ_MFT2);
103
104#ifdef CONFIG_SERIAL_M32R_SIO
105 /* SIO0_R : uart receive data */
106 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
107 irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
108 irq_desc[M32R_IRQ_SIO0_R].action = NULL;
109 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
110 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
111 disable_mappi_irq(M32R_IRQ_SIO0_R);
112
113 /* SIO0_S : uart send data */
114 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
115 irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
116 irq_desc[M32R_IRQ_SIO0_S].action = NULL;
117 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
118 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
119 disable_mappi_irq(M32R_IRQ_SIO0_S);
120
121 /* SIO1_R : uart receive data */
122 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
123 irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
124 irq_desc[M32R_IRQ_SIO1_R].action = NULL;
125 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
126 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
127 disable_mappi_irq(M32R_IRQ_SIO1_R);
128
129 /* SIO1_S : uart send data */
130 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
131 irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
132 irq_desc[M32R_IRQ_SIO1_S].action = NULL;
133 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
134 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
135 disable_mappi_irq(M32R_IRQ_SIO1_S);
136#endif /* CONFIG_SERIAL_M32R_SIO */
137
138#if defined(CONFIG_M32R_PCC)
139 /* INT1 : pccard0 interrupt */
140 irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
141 irq_desc[M32R_IRQ_INT1].chip = &mappi_irq_type;
142 irq_desc[M32R_IRQ_INT1].action = NULL;
143 irq_desc[M32R_IRQ_INT1].depth = 1;
144 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
145 disable_mappi_irq(M32R_IRQ_INT1);
146
147 /* INT2 : pccard1 interrupt */
148 irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED;
149 irq_desc[M32R_IRQ_INT2].chip = &mappi_irq_type;
150 irq_desc[M32R_IRQ_INT2].action = NULL;
151 irq_desc[M32R_IRQ_INT2].depth = 1;
152 icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
153 disable_mappi_irq(M32R_IRQ_INT2);
154#endif /* CONFIG_M32RPCC */
155}
156
157#if defined(CONFIG_FB_S1D13XXX)
158
159#include <video/s1d13xxxfb.h>
160#include <asm/s1d13806.h>
161
162static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
163 .initregs = s1d13xxxfb_initregs,
164 .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
165 .platform_init_video = NULL,
166#ifdef CONFIG_PM
167 .platform_suspend_video = NULL,
168 .platform_resume_video = NULL,
169#endif
170};
171
172static struct resource s1d13xxxfb_resources[] = {
173 [0] = {
174 .start = 0x10200000UL,
175 .end = 0x1033FFFFUL,
176 .flags = IORESOURCE_MEM,
177 },
178 [1] = {
179 .start = 0x10000000UL,
180 .end = 0x100001FFUL,
181 .flags = IORESOURCE_MEM,
182 }
183};
184
185static struct platform_device s1d13xxxfb_device = {
186 .name = S1D_DEVICENAME,
187 .id = 0,
188 .dev = {
189 .platform_data = &s1d13xxxfb_data,
190 },
191 .num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
192 .resource = s1d13xxxfb_resources,
193};
194
195static int __init platform_init(void)
196{
197 platform_device_register(&s1d13xxxfb_device);
198 return 0;
199}
200arch_initcall(platform_init);
201#endif