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-rw-r--r--arch/m32r/platforms/mappi3/Makefile1
-rw-r--r--arch/m32r/platforms/mappi3/dot.gdbinit224
-rw-r--r--arch/m32r/platforms/mappi3/io.c405
-rw-r--r--arch/m32r/platforms/mappi3/setup.c251
4 files changed, 881 insertions, 0 deletions
diff --git a/arch/m32r/platforms/mappi3/Makefile b/arch/m32r/platforms/mappi3/Makefile
new file mode 100644
index 000000000000..0de59084f21c
--- /dev/null
+++ b/arch/m32r/platforms/mappi3/Makefile
@@ -0,0 +1 @@
obj-y := setup.o io.o
diff --git a/arch/m32r/platforms/mappi3/dot.gdbinit b/arch/m32r/platforms/mappi3/dot.gdbinit
new file mode 100644
index 000000000000..89c22184e139
--- /dev/null
+++ b/arch/m32r/platforms/mappi3/dot.gdbinit
@@ -0,0 +1,224 @@
1# .gdbinit file
2# $Id: dot.gdbinit,v 1.1 2005/04/11 02:21:08 sakugawa Exp $
3
4# setting
5set width 0d70
6set radix 0d16
7use_debug_dma
8
9# Initialize SDRAM controller for Mappi
10define sdram_init
11 # SDIR0
12 set *(unsigned long *)0x00ef6008 = 0x00000182
13 # SDIR1
14 set *(unsigned long *)0x00ef600c = 0x00000001
15 # Initialize wait
16 shell sleep 0.1
17 # MOD
18 set *(unsigned long *)0x00ef602c = 0x00000020
19 set *(unsigned long *)0x00ef604c = 0x00000020
20 # TR
21 set *(unsigned long *)0x00ef6028 = 0x00051502
22 set *(unsigned long *)0x00ef6048 = 0x00051502
23 # ADR
24 set *(unsigned long *)0x00ef6020 = 0x08000004
25 set *(unsigned long *)0x00ef6040 = 0x0c000004
26 # AutoRef On
27 set *(unsigned long *)0x00ef6004 = 0x00010517
28 # Access enable
29 set *(unsigned long *)0x00ef6024 = 0x00000001
30 set *(unsigned long *)0x00ef6044 = 0x00000001
31end
32
33# Initialize LAN controller for Mappi
34define lanc_init
35 # Set BSEL4
36 #set *(unsigned long *)0x00ef5004 = 0x0fff330f
37 #set *(unsigned long *)0x00ef5004 = 0x01113301
38
39# set *(unsigned long *)0x00ef5004 = 0x02011101
40# set *(unsigned long *)0x00ef5004 = 0x04441104
41end
42
43define clock_init
44 set *(unsigned long *)0x00ef4010 = 2
45 set *(unsigned long *)0x00ef4014 = 2
46 set *(unsigned long *)0x00ef4020 = 3
47 set *(unsigned long *)0x00ef4024 = 3
48 set *(unsigned long *)0x00ef4004 = 0x7
49# shell sleep 0.1
50# set *(unsigned long *)0x00ef4004 = 0x5
51 shell sleep 0.1
52 set *(unsigned long *)0x00ef4008 = 0x0200
53end
54
55define port_init
56 set $sfrbase = 0x00ef0000
57 set *(unsigned short *)0x00ef1060 = 0x5555
58 set *(unsigned short *)0x00ef1062 = 0x5555
59 set *(unsigned short *)0x00ef1064 = 0x5555
60 set *(unsigned short *)0x00ef1066 = 0x5555
61 set *(unsigned short *)0x00ef1068 = 0x5555
62 set *(unsigned short *)0x00ef106a = 0x0000
63 set *(unsigned short *)0x00ef106e = 0x5555
64 set *(unsigned short *)0x00ef1070 = 0x5555
65end
66
67# MMU enable
68define mmu_enable
69 set $evb=0x88000000
70 set *(unsigned long *)0xffff0024=1
71end
72
73# MMU disable
74define mmu_disable
75 set $evb=0
76 set *(unsigned long *)0xffff0024=0
77end
78
79# Show TLB entries
80define show_tlb_entries
81 set $i = 0
82 set $addr = $arg0
83 while ($i < 0d16 )
84 set $tlb_tag = *(unsigned long*)$addr
85 set $tlb_data = *(unsigned long*)($addr + 4)
86 printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
87 set $i = $i + 1
88 set $addr = $addr + 8
89 end
90end
91define itlb
92 set $itlb=0xfe000000
93 show_tlb_entries $itlb
94end
95define dtlb
96 set $dtlb=0xfe000800
97 show_tlb_entries $dtlb
98end
99
100# Cache ON
101define set_cache_type
102 set $mctype = (void*)0xfffffff8
103# chaos
104# set *(unsigned long *)($mctype) = 0x0000c000
105# m32102 i-cache only
106 set *(unsigned long *)($mctype) = 0x00008000
107# m32102 d-cache only
108# set *(unsigned long *)($mctype) = 0x00004000
109end
110define cache_on
111 set $param = (void*)0x08001000
112 set *(unsigned long *)($param) = 0x60ff6102
113end
114
115
116# Show current task structure
117define show_current
118 set $current = $spi & 0xffffe000
119 printf "$current=0x%08lX\n",$current
120 print *(struct task_struct *)$current
121end
122
123# Show user assigned task structure
124define show_task
125 set $task = $arg0 & 0xffffe000
126 printf "$task=0x%08lX\n",$task
127 print *(struct task_struct *)$task
128end
129document show_task
130 Show user assigned task structure
131 arg0 : task structure address
132end
133
134# Show M32R registers
135define show_regs
136 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
137 printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
138 printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
139 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
140 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
141 printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
142 printf "EVB[0x%08lX]\n",$evb
143
144 set $mests = *(unsigned long *)0xffff000c
145 set $mdeva = *(unsigned long *)0xffff0010
146 printf "MESTS[0x%08lX] MDEVA[0x%08lX]\n",$mests,$mdeva
147end
148
149
150# Setup all
151define setup
152 clock_init
153 shell sleep 0.1
154 port_init
155 sdram_init
156# lanc_init
157# dispc_init
158# set $evb=0x08000000
159end
160
161# Load modules
162define load_modules
163 use_debug_dma
164 load
165# load busybox.mot
166end
167
168# Set kernel parameters
169define set_kernel_parameters
170 set $param = (void*)0x08001000
171
172 ## MOUNT_ROOT_RDONLY
173 set {long}($param+0x00)=0
174 ## RAMDISK_FLAGS
175 #set {long}($param+0x04)=0
176 ## ORIG_ROOT_DEV
177 #set {long}($param+0x08)=0x00000100
178 ## LOADER_TYPE
179 #set {long}($param+0x0C)=0
180 ## INITRD_START
181 set {long}($param+0x10)=0x082a0000
182 ## INITRD_SIZE
183 set {long}($param+0x14)=0d6200000
184
185 # M32R_CPUCLK
186 set *(unsigned long *)($param + 0x0018) = 0d100000000
187 # M32R_BUSCLK
188 set *(unsigned long *)($param + 0x001c) = 0d50000000
189 # M32R_TIMER_DIVIDE
190 set *(unsigned long *)($param + 0x0020) = 0d128
191
192
193 set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6_04 nfsaddrs=192.168.0.102:192.168.0.1:192.168.0.1:255.255.255.0:mappi: \0"
194
195
196end
197
198# Boot
199define boot
200 set_kernel_parameters
201 debug_chaos
202 set *(unsigned long *)0x00f00000=0x08002000
203 set $pc=0x08002000
204 set $fp=0
205 del b
206 si
207end
208
209# Restart
210define restart
211 sdireset
212 sdireset
213 setup
214 load_modules
215 boot
216end
217
218sdireset
219sdireset
220file vmlinux
221target m32rsdi
222
223restart
224boot
diff --git a/arch/m32r/platforms/mappi3/io.c b/arch/m32r/platforms/mappi3/io.c
new file mode 100644
index 000000000000..1bc3f90fdc53
--- /dev/null
+++ b/arch/m32r/platforms/mappi3/io.c
@@ -0,0 +1,405 @@
1/*
2 * linux/arch/m32r/platforms/mappi3/io.c
3 *
4 * Typical I/O routines for Mappi3 board.
5 *
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Mamoru Sakugawa
8 */
9
10#include <asm/m32r.h>
11#include <asm/page.h>
12#include <asm/io.h>
13#include <asm/byteorder.h>
14
15#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
16#include <linux/types.h>
17
18#define M32R_PCC_IOMAP_SIZE 0x1000
19
20#define M32R_PCC_IOSTART0 0x1000
21#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1)
22
23extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int);
24extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int);
25extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int);
26extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
27#endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */
28
29#define PORT2ADDR(port) _port2addr(port)
30#define PORT2ADDR_NE(port) _port2addr_ne(port)
31#define PORT2ADDR_USB(port) _port2addr_usb(port)
32
33static inline void *_port2addr(unsigned long port)
34{
35 return (void *)(port | NONCACHE_OFFSET);
36}
37
38#if defined(CONFIG_IDE)
39static inline void *__port2addr_ata(unsigned long port)
40{
41 static int dummy_reg;
42
43 switch (port) {
44 /* IDE0 CF */
45 case 0x1f0: return (void *)(0x14002000 | NONCACHE_OFFSET);
46 case 0x1f1: return (void *)(0x14012800 | NONCACHE_OFFSET);
47 case 0x1f2: return (void *)(0x14012002 | NONCACHE_OFFSET);
48 case 0x1f3: return (void *)(0x14012802 | NONCACHE_OFFSET);
49 case 0x1f4: return (void *)(0x14012004 | NONCACHE_OFFSET);
50 case 0x1f5: return (void *)(0x14012804 | NONCACHE_OFFSET);
51 case 0x1f6: return (void *)(0x14012006 | NONCACHE_OFFSET);
52 case 0x1f7: return (void *)(0x14012806 | NONCACHE_OFFSET);
53 case 0x3f6: return (void *)(0x1401200e | NONCACHE_OFFSET);
54 /* IDE1 IDE */
55 case 0x170: /* Data 16bit */
56 return (void *)(0x14810000 | NONCACHE_OFFSET);
57 case 0x171: /* Features / Error */
58 return (void *)(0x14810002 | NONCACHE_OFFSET);
59 case 0x172: /* Sector count */
60 return (void *)(0x14810004 | NONCACHE_OFFSET);
61 case 0x173: /* Sector number */
62 return (void *)(0x14810006 | NONCACHE_OFFSET);
63 case 0x174: /* Cylinder low */
64 return (void *)(0x14810008 | NONCACHE_OFFSET);
65 case 0x175: /* Cylinder high */
66 return (void *)(0x1481000a | NONCACHE_OFFSET);
67 case 0x176: /* Device head */
68 return (void *)(0x1481000c | NONCACHE_OFFSET);
69 case 0x177: /* Command */
70 return (void *)(0x1481000e | NONCACHE_OFFSET);
71 case 0x376: /* Device control / Alt status */
72 return (void *)(0x1480800c | NONCACHE_OFFSET);
73
74 default: return (void *)&dummy_reg;
75 }
76}
77#endif
78
79#define LAN_IOSTART (0x300 | NONCACHE_OFFSET)
80#define LAN_IOEND (0x320 | NONCACHE_OFFSET)
81static inline void *_port2addr_ne(unsigned long port)
82{
83 return (void *)(port + 0x10000000);
84}
85
86static inline void *_port2addr_usb(unsigned long port)
87{
88 return (void *)(port + NONCACHE_OFFSET + 0x12000000);
89}
90static inline void delay(void)
91{
92 __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
93}
94
95/*
96 * NIC I/O function
97 */
98
99static inline unsigned char _ne_inb(void *portp)
100{
101 return (unsigned char) *(volatile unsigned char *)portp;
102}
103
104static inline unsigned short _ne_inw(void *portp)
105{
106 return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp);
107}
108
109static inline void _ne_insb(void *portp, void * addr, unsigned long count)
110{
111 unsigned char *buf = addr;
112
113 while (count--)
114 *buf++ = *(volatile unsigned char *)portp;
115}
116
117static inline void _ne_outb(unsigned char b, void *portp)
118{
119 *(volatile unsigned char *)portp = (unsigned char)b;
120}
121
122static inline void _ne_outw(unsigned short w, void *portp)
123{
124 *(volatile unsigned short *)portp = cpu_to_le16(w);
125}
126
127unsigned char _inb(unsigned long port)
128{
129 if (port >= LAN_IOSTART && port < LAN_IOEND)
130 return _ne_inb(PORT2ADDR_NE(port));
131#if defined(CONFIG_IDE)
132 else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
133 ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
134 return *(volatile unsigned char *)__port2addr_ata(port);
135 }
136#endif
137#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
138 else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
139 unsigned char b;
140 pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0);
141 return b;
142 } else
143#endif
144 return *(volatile unsigned char *)PORT2ADDR(port);
145}
146
147unsigned short _inw(unsigned long port)
148{
149 if (port >= LAN_IOSTART && port < LAN_IOEND)
150 return _ne_inw(PORT2ADDR_NE(port));
151#if defined(CONFIG_IDE)
152 else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
153 ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
154 return *(volatile unsigned short *)__port2addr_ata(port);
155 }
156#endif
157#if defined(CONFIG_USB)
158 else if (port >= 0x340 && port < 0x3a0)
159 return *(volatile unsigned short *)PORT2ADDR_USB(port);
160#endif
161
162#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
163 else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
164 unsigned short w;
165 pcc_ioread_word(0, port, &w, sizeof(w), 1, 0);
166 return w;
167 } else
168#endif
169 return *(volatile unsigned short *)PORT2ADDR(port);
170}
171
172unsigned long _inl(unsigned long port)
173{
174#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
175 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
176 unsigned long l;
177 pcc_ioread_word(0, port, &l, sizeof(l), 1, 0);
178 return l;
179 } else
180#endif
181 return *(volatile unsigned long *)PORT2ADDR(port);
182}
183
184unsigned char _inb_p(unsigned long port)
185{
186 unsigned char v = _inb(port);
187 delay();
188 return (v);
189}
190
191unsigned short _inw_p(unsigned long port)
192{
193 unsigned short v = _inw(port);
194 delay();
195 return (v);
196}
197
198unsigned long _inl_p(unsigned long port)
199{
200 unsigned long v = _inl(port);
201 delay();
202 return (v);
203}
204
205void _outb(unsigned char b, unsigned long port)
206{
207 if (port >= LAN_IOSTART && port < LAN_IOEND)
208 _ne_outb(b, PORT2ADDR_NE(port));
209 else
210#if defined(CONFIG_IDE)
211 if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
212 ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
213 *(volatile unsigned char *)__port2addr_ata(port) = b;
214 } else
215#endif
216#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
217 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
218 pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0);
219 } else
220#endif
221 *(volatile unsigned char *)PORT2ADDR(port) = b;
222}
223
224void _outw(unsigned short w, unsigned long port)
225{
226 if (port >= LAN_IOSTART && port < LAN_IOEND)
227 _ne_outw(w, PORT2ADDR_NE(port));
228 else
229#if defined(CONFIG_IDE)
230 if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
231 ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
232 *(volatile unsigned short *)__port2addr_ata(port) = w;
233 } else
234#endif
235#if defined(CONFIG_USB)
236 if (port >= 0x340 && port < 0x3a0)
237 *(volatile unsigned short *)PORT2ADDR_USB(port) = w;
238 else
239#endif
240#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
241 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
242 pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0);
243 } else
244#endif
245 *(volatile unsigned short *)PORT2ADDR(port) = w;
246}
247
248void _outl(unsigned long l, unsigned long port)
249{
250#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
251 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
252 pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0);
253 } else
254#endif
255 *(volatile unsigned long *)PORT2ADDR(port) = l;
256}
257
258void _outb_p(unsigned char b, unsigned long port)
259{
260 _outb(b, port);
261 delay();
262}
263
264void _outw_p(unsigned short w, unsigned long port)
265{
266 _outw(w, port);
267 delay();
268}
269
270void _outl_p(unsigned long l, unsigned long port)
271{
272 _outl(l, port);
273 delay();
274}
275
276void _insb(unsigned int port, void * addr, unsigned long count)
277{
278 if (port >= LAN_IOSTART && port < LAN_IOEND)
279 _ne_insb(PORT2ADDR_NE(port), addr, count);
280#if defined(CONFIG_IDE)
281 else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
282 ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
283 unsigned char *buf = addr;
284 unsigned char *portp = __port2addr_ata(port);
285 while (count--)
286 *buf++ = *(volatile unsigned char *)portp;
287 }
288#endif
289#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
290 else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
291 pcc_ioread_byte(0, port, (void *)addr, sizeof(unsigned char),
292 count, 1);
293 }
294#endif
295 else {
296 unsigned char *buf = addr;
297 unsigned char *portp = PORT2ADDR(port);
298 while (count--)
299 *buf++ = *(volatile unsigned char *)portp;
300 }
301}
302
303void _insw(unsigned int port, void * addr, unsigned long count)
304{
305 unsigned short *buf = addr;
306 unsigned short *portp;
307
308 if (port >= LAN_IOSTART && port < LAN_IOEND) {
309 portp = PORT2ADDR_NE(port);
310 while (count--)
311 *buf++ = *(volatile unsigned short *)portp;
312#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
313 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
314 pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short),
315 count, 1);
316#endif
317#if defined(CONFIG_IDE)
318 } else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
319 ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
320 portp = __port2addr_ata(port);
321 while (count--)
322 *buf++ = *(volatile unsigned short *)portp;
323#endif
324 } else {
325 portp = PORT2ADDR(port);
326 while (count--)
327 *buf++ = *(volatile unsigned short *)portp;
328 }
329}
330
331void _insl(unsigned int port, void * addr, unsigned long count)
332{
333 unsigned long *buf = addr;
334 unsigned long *portp;
335
336 portp = PORT2ADDR(port);
337 while (count--)
338 *buf++ = *(volatile unsigned long *)portp;
339}
340
341void _outsb(unsigned int port, const void * addr, unsigned long count)
342{
343 const unsigned char *buf = addr;
344 unsigned char *portp;
345
346 if (port >= LAN_IOSTART && port < LAN_IOEND) {
347 portp = PORT2ADDR_NE(port);
348 while (count--)
349 _ne_outb(*buf++, portp);
350#if defined(CONFIG_IDE)
351 } else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
352 ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
353 portp = __port2addr_ata(port);
354 while (count--)
355 *(volatile unsigned char *)portp = *buf++;
356#endif
357#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
358 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
359 pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char),
360 count, 1);
361#endif
362 } else {
363 portp = PORT2ADDR(port);
364 while (count--)
365 *(volatile unsigned char *)portp = *buf++;
366 }
367}
368
369void _outsw(unsigned int port, const void * addr, unsigned long count)
370{
371 const unsigned short *buf = addr;
372 unsigned short *portp;
373
374 if (port >= LAN_IOSTART && port < LAN_IOEND) {
375 portp = PORT2ADDR_NE(port);
376 while (count--)
377 *(volatile unsigned short *)portp = *buf++;
378#if defined(CONFIG_IDE)
379 } else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
380 ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
381 portp = __port2addr_ata(port);
382 while (count--)
383 *(volatile unsigned short *)portp = *buf++;
384#endif
385#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
386 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
387 pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short),
388 count, 1);
389#endif
390 } else {
391 portp = PORT2ADDR(port);
392 while (count--)
393 *(volatile unsigned short *)portp = *buf++;
394 }
395}
396
397void _outsl(unsigned int port, const void * addr, unsigned long count)
398{
399 const unsigned long *buf = addr;
400 unsigned char *portp;
401
402 portp = PORT2ADDR(port);
403 while (count--)
404 *(volatile unsigned long *)portp = *buf++;
405}
diff --git a/arch/m32r/platforms/mappi3/setup.c b/arch/m32r/platforms/mappi3/setup.c
new file mode 100644
index 000000000000..785b4bd6d9fd
--- /dev/null
+++ b/arch/m32r/platforms/mappi3/setup.c
@@ -0,0 +1,251 @@
1/*
2 * linux/arch/m32r/platforms/mappi3/setup.c
3 *
4 * Setup routines for Renesas MAPPI-III(M3A-2170) Board
5 *
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Mamoru Sakugawa
8 */
9
10#include <linux/irq.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14
15#include <asm/system.h>
16#include <asm/m32r.h>
17#include <asm/io.h>
18
19#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
20
21icu_data_t icu_data[NR_IRQS];
22
23static void disable_mappi3_irq(unsigned int irq)
24{
25 unsigned long port, data;
26
27 if ((irq == 0) ||(irq >= NR_IRQS)) {
28 printk("bad irq 0x%08x\n", irq);
29 return;
30 }
31 port = irq2port(irq);
32 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
33 outl(data, port);
34}
35
36static void enable_mappi3_irq(unsigned int irq)
37{
38 unsigned long port, data;
39
40 if ((irq == 0) ||(irq >= NR_IRQS)) {
41 printk("bad irq 0x%08x\n", irq);
42 return;
43 }
44 port = irq2port(irq);
45 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
46 outl(data, port);
47}
48
49static void mask_and_ack_mappi3(unsigned int irq)
50{
51 disable_mappi3_irq(irq);
52}
53
54static void end_mappi3_irq(unsigned int irq)
55{
56 enable_mappi3_irq(irq);
57}
58
59static unsigned int startup_mappi3_irq(unsigned int irq)
60{
61 enable_mappi3_irq(irq);
62 return (0);
63}
64
65static void shutdown_mappi3_irq(unsigned int irq)
66{
67 unsigned long port;
68
69 port = irq2port(irq);
70 outl(M32R_ICUCR_ILEVEL7, port);
71}
72
73static struct hw_interrupt_type mappi3_irq_type =
74{
75 .typename = "MAPPI3-IRQ",
76 .startup = startup_mappi3_irq,
77 .shutdown = shutdown_mappi3_irq,
78 .enable = enable_mappi3_irq,
79 .disable = disable_mappi3_irq,
80 .ack = mask_and_ack_mappi3,
81 .end = end_mappi3_irq
82};
83
84void __init init_IRQ(void)
85{
86#if defined(CONFIG_SMC91X)
87 /* INT0 : LAN controller (SMC91111) */
88 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
89 irq_desc[M32R_IRQ_INT0].chip = &mappi3_irq_type;
90 irq_desc[M32R_IRQ_INT0].action = 0;
91 irq_desc[M32R_IRQ_INT0].depth = 1;
92 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
93 disable_mappi3_irq(M32R_IRQ_INT0);
94#endif /* CONFIG_SMC91X */
95
96 /* MFT2 : system timer */
97 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
98 irq_desc[M32R_IRQ_MFT2].chip = &mappi3_irq_type;
99 irq_desc[M32R_IRQ_MFT2].action = 0;
100 irq_desc[M32R_IRQ_MFT2].depth = 1;
101 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
102 disable_mappi3_irq(M32R_IRQ_MFT2);
103
104#ifdef CONFIG_SERIAL_M32R_SIO
105 /* SIO0_R : uart receive data */
106 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
107 irq_desc[M32R_IRQ_SIO0_R].chip = &mappi3_irq_type;
108 irq_desc[M32R_IRQ_SIO0_R].action = 0;
109 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
110 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
111 disable_mappi3_irq(M32R_IRQ_SIO0_R);
112
113 /* SIO0_S : uart send data */
114 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
115 irq_desc[M32R_IRQ_SIO0_S].chip = &mappi3_irq_type;
116 irq_desc[M32R_IRQ_SIO0_S].action = 0;
117 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
118 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
119 disable_mappi3_irq(M32R_IRQ_SIO0_S);
120 /* SIO1_R : uart receive data */
121 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
122 irq_desc[M32R_IRQ_SIO1_R].chip = &mappi3_irq_type;
123 irq_desc[M32R_IRQ_SIO1_R].action = 0;
124 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
125 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
126 disable_mappi3_irq(M32R_IRQ_SIO1_R);
127
128 /* SIO1_S : uart send data */
129 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
130 irq_desc[M32R_IRQ_SIO1_S].chip = &mappi3_irq_type;
131 irq_desc[M32R_IRQ_SIO1_S].action = 0;
132 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
133 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
134 disable_mappi3_irq(M32R_IRQ_SIO1_S);
135#endif /* CONFIG_M32R_USE_DBG_CONSOLE */
136
137#if defined(CONFIG_USB)
138 /* INT1 : USB Host controller interrupt */
139 irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
140 irq_desc[M32R_IRQ_INT1].chip = &mappi3_irq_type;
141 irq_desc[M32R_IRQ_INT1].action = 0;
142 irq_desc[M32R_IRQ_INT1].depth = 1;
143 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
144 disable_mappi3_irq(M32R_IRQ_INT1);
145#endif /* CONFIG_USB */
146
147 /* CFC IREQ */
148 irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
149 irq_desc[PLD_IRQ_CFIREQ].chip = &mappi3_irq_type;
150 irq_desc[PLD_IRQ_CFIREQ].action = 0;
151 irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
152 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
153 disable_mappi3_irq(PLD_IRQ_CFIREQ);
154
155#if defined(CONFIG_M32R_CFC)
156 /* ICUCR41: CFC Insert & eject */
157 irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
158 irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi3_irq_type;
159 irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
160 irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
161 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
162 disable_mappi3_irq(PLD_IRQ_CFC_INSERT);
163
164#endif /* CONFIG_M32R_CFC */
165
166 /* IDE IREQ */
167 irq_desc[PLD_IRQ_IDEIREQ].status = IRQ_DISABLED;
168 irq_desc[PLD_IRQ_IDEIREQ].chip = &mappi3_irq_type;
169 irq_desc[PLD_IRQ_IDEIREQ].action = 0;
170 irq_desc[PLD_IRQ_IDEIREQ].depth = 1; /* disable nested irq */
171 icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
172 disable_mappi3_irq(PLD_IRQ_IDEIREQ);
173
174}
175
176#if defined(CONFIG_SMC91X)
177
178#define LAN_IOSTART 0x300
179#define LAN_IOEND 0x320
180static struct resource smc91x_resources[] = {
181 [0] = {
182 .start = (LAN_IOSTART),
183 .end = (LAN_IOEND),
184 .flags = IORESOURCE_MEM,
185 },
186 [1] = {
187 .start = M32R_IRQ_INT0,
188 .end = M32R_IRQ_INT0,
189 .flags = IORESOURCE_IRQ,
190 }
191};
192
193static struct platform_device smc91x_device = {
194 .name = "smc91x",
195 .id = 0,
196 .num_resources = ARRAY_SIZE(smc91x_resources),
197 .resource = smc91x_resources,
198};
199
200#endif
201
202#if defined(CONFIG_FB_S1D13XXX)
203
204#include <video/s1d13xxxfb.h>
205#include <asm/s1d13806.h>
206
207static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
208 .initregs = s1d13xxxfb_initregs,
209 .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
210 .platform_init_video = NULL,
211#ifdef CONFIG_PM
212 .platform_suspend_video = NULL,
213 .platform_resume_video = NULL,
214#endif
215};
216
217static struct resource s1d13xxxfb_resources[] = {
218 [0] = {
219 .start = 0x1d600000UL,
220 .end = 0x1d73FFFFUL,
221 .flags = IORESOURCE_MEM,
222 },
223 [1] = {
224 .start = 0x1d400000UL,
225 .end = 0x1d4001FFUL,
226 .flags = IORESOURCE_MEM,
227 }
228};
229
230static struct platform_device s1d13xxxfb_device = {
231 .name = S1D_DEVICENAME,
232 .id = 0,
233 .dev = {
234 .platform_data = &s1d13xxxfb_data,
235 },
236 .num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
237 .resource = s1d13xxxfb_resources,
238};
239#endif
240
241static int __init platform_init(void)
242{
243#if defined(CONFIG_SMC91X)
244 platform_device_register(&smc91x_device);
245#endif
246#if defined(CONFIG_FB_S1D13XXX)
247 platform_device_register(&s1d13xxxfb_device);
248#endif
249 return 0;
250}
251arch_initcall(platform_init);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 14:25:10 -0500