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Diffstat (limited to 'arch/m32r/platforms/m32104ut/setup.c')
-rw-r--r--arch/m32r/platforms/m32104ut/setup.c20
1 files changed, 4 insertions, 16 deletions
diff --git a/arch/m32r/platforms/m32104ut/setup.c b/arch/m32r/platforms/m32104ut/setup.c
index 402a59d7219b..962f38e58acc 100644
--- a/arch/m32r/platforms/m32104ut/setup.c
+++ b/arch/m32r/platforms/m32104ut/setup.c
@@ -85,36 +85,24 @@ void __init init_IRQ(void)
85 85
86#if defined(CONFIG_SMC91X) 86#if defined(CONFIG_SMC91X)
87 /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/ 87 /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/
88 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; 88 set_irq_chip(M32R_IRQ_INT0, &m32104ut_irq_type);
89 irq_desc[M32R_IRQ_INT0].chip = &m32104ut_irq_type;
90 irq_desc[M32R_IRQ_INT0].action = 0;
91 irq_desc[M32R_IRQ_INT0].depth = 1;
92 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; /* "H" level sense */ 89 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; /* "H" level sense */
93 disable_m32104ut_irq(M32R_IRQ_INT0); 90 disable_m32104ut_irq(M32R_IRQ_INT0);
94#endif /* CONFIG_SMC91X */ 91#endif /* CONFIG_SMC91X */
95 92
96 /* MFT2 : system timer */ 93 /* MFT2 : system timer */
97 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; 94 set_irq_chip(M32R_IRQ_MFT2, &m32104ut_irq_type);
98 irq_desc[M32R_IRQ_MFT2].chip = &m32104ut_irq_type;
99 irq_desc[M32R_IRQ_MFT2].action = 0;
100 irq_desc[M32R_IRQ_MFT2].depth = 1;
101 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 95 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
102 disable_m32104ut_irq(M32R_IRQ_MFT2); 96 disable_m32104ut_irq(M32R_IRQ_MFT2);
103 97
104#ifdef CONFIG_SERIAL_M32R_SIO 98#ifdef CONFIG_SERIAL_M32R_SIO
105 /* SIO0_R : uart receive data */ 99 /* SIO0_R : uart receive data */
106 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; 100 set_irq_chip(M32R_IRQ_SIO0_R, &m32104ut_irq_type);
107 irq_desc[M32R_IRQ_SIO0_R].chip = &m32104ut_irq_type;
108 irq_desc[M32R_IRQ_SIO0_R].action = 0;
109 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
110 icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN; 101 icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN;
111 disable_m32104ut_irq(M32R_IRQ_SIO0_R); 102 disable_m32104ut_irq(M32R_IRQ_SIO0_R);
112 103
113 /* SIO0_S : uart send data */ 104 /* SIO0_S : uart send data */
114 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; 105 set_irq_chip(M32R_IRQ_SIO0_S, &m32104ut_irq_type);
115 irq_desc[M32R_IRQ_SIO0_S].chip = &m32104ut_irq_type;
116 irq_desc[M32R_IRQ_SIO0_S].action = 0;
117 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
118 icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN; 106 icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN;
119 disable_m32104ut_irq(M32R_IRQ_SIO0_S); 107 disable_m32104ut_irq(M32R_IRQ_SIO0_S);
120#endif /* CONFIG_SERIAL_M32R_SIO */ 108#endif /* CONFIG_SERIAL_M32R_SIO */