diff options
Diffstat (limited to 'arch/m32r/mm/fault.c')
-rw-r--r-- | arch/m32r/mm/fault.c | 66 |
1 files changed, 19 insertions, 47 deletions
diff --git a/arch/m32r/mm/fault.c b/arch/m32r/mm/fault.c index 9b9feb0f1610..037d58e82fb5 100644 --- a/arch/m32r/mm/fault.c +++ b/arch/m32r/mm/fault.c | |||
@@ -49,32 +49,6 @@ unsigned int tlb_entry_d_dat[NR_CPUS]; | |||
49 | 49 | ||
50 | extern void init_tlb(void); | 50 | extern void init_tlb(void); |
51 | 51 | ||
52 | /* | ||
53 | * Unlock any spinlocks which will prevent us from getting the | ||
54 | * message out | ||
55 | */ | ||
56 | void bust_spinlocks(int yes) | ||
57 | { | ||
58 | int loglevel_save = console_loglevel; | ||
59 | |||
60 | if (yes) { | ||
61 | oops_in_progress = 1; | ||
62 | return; | ||
63 | } | ||
64 | #ifdef CONFIG_VT | ||
65 | unblank_screen(); | ||
66 | #endif | ||
67 | oops_in_progress = 0; | ||
68 | /* | ||
69 | * OK, the message is on the console. Now we call printk() | ||
70 | * without oops_in_progress set so that printk will give klogd | ||
71 | * a poke. Hold onto your hats... | ||
72 | */ | ||
73 | console_loglevel = 15; /* NMI oopser may have shut the console up */ | ||
74 | printk(" "); | ||
75 | console_loglevel = loglevel_save; | ||
76 | } | ||
77 | |||
78 | /*======================================================================* | 52 | /*======================================================================* |
79 | * do_page_fault() | 53 | * do_page_fault() |
80 | *======================================================================* | 54 | *======================================================================* |
@@ -362,8 +336,10 @@ vmalloc_fault: | |||
362 | if (!pte_present(*pte_k)) | 336 | if (!pte_present(*pte_k)) |
363 | goto no_context; | 337 | goto no_context; |
364 | 338 | ||
365 | addr = (address & PAGE_MASK) | (error_code & ACE_INSTRUCTION); | 339 | addr = (address & PAGE_MASK); |
340 | set_thread_fault_code(error_code); | ||
366 | update_mmu_cache(NULL, addr, *pte_k); | 341 | update_mmu_cache(NULL, addr, *pte_k); |
342 | set_thread_fault_code(0); | ||
367 | return; | 343 | return; |
368 | } | 344 | } |
369 | } | 345 | } |
@@ -377,7 +353,7 @@ vmalloc_fault: | |||
377 | void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr, | 353 | void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr, |
378 | pte_t pte) | 354 | pte_t pte) |
379 | { | 355 | { |
380 | unsigned long *entry1, *entry2; | 356 | volatile unsigned long *entry1, *entry2; |
381 | unsigned long pte_data, flags; | 357 | unsigned long pte_data, flags; |
382 | unsigned int *entry_dat; | 358 | unsigned int *entry_dat; |
383 | int inst = get_thread_fault_code() & ACE_INSTRUCTION; | 359 | int inst = get_thread_fault_code() & ACE_INSTRUCTION; |
@@ -391,30 +367,26 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr, | |||
391 | 367 | ||
392 | vaddr = (vaddr & PAGE_MASK) | get_asid(); | 368 | vaddr = (vaddr & PAGE_MASK) | get_asid(); |
393 | 369 | ||
370 | pte_data = pte_val(pte); | ||
371 | |||
394 | #ifdef CONFIG_CHIP_OPSP | 372 | #ifdef CONFIG_CHIP_OPSP |
395 | entry1 = (unsigned long *)ITLB_BASE; | 373 | entry1 = (unsigned long *)ITLB_BASE; |
396 | for(i = 0 ; i < NR_TLB_ENTRIES; i++) { | 374 | for (i = 0; i < NR_TLB_ENTRIES; i++) { |
397 | if(*entry1++ == vaddr) { | 375 | if (*entry1++ == vaddr) { |
398 | pte_data = pte_val(pte); | 376 | set_tlb_data(entry1, pte_data); |
399 | set_tlb_data(entry1, pte_data); | 377 | break; |
400 | break; | 378 | } |
401 | } | 379 | entry1++; |
402 | entry1++; | ||
403 | } | 380 | } |
404 | entry2 = (unsigned long *)DTLB_BASE; | 381 | entry2 = (unsigned long *)DTLB_BASE; |
405 | for(i = 0 ; i < NR_TLB_ENTRIES ; i++) { | 382 | for (i = 0; i < NR_TLB_ENTRIES; i++) { |
406 | if(*entry2++ == vaddr) { | 383 | if (*entry2++ == vaddr) { |
407 | pte_data = pte_val(pte); | 384 | set_tlb_data(entry2, pte_data); |
408 | set_tlb_data(entry2, pte_data); | 385 | break; |
409 | break; | 386 | } |
410 | } | 387 | entry2++; |
411 | entry2++; | ||
412 | } | 388 | } |
413 | local_irq_restore(flags); | ||
414 | return; | ||
415 | #else | 389 | #else |
416 | pte_data = pte_val(pte); | ||
417 | |||
418 | /* | 390 | /* |
419 | * Update TLB entries | 391 | * Update TLB entries |
420 | * entry1: ITLB entry address | 392 | * entry1: ITLB entry address |
@@ -439,6 +411,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr, | |||
439 | "i" (MSVA_offset), "i" (MTOP_offset), "i" (MIDXI_offset) | 411 | "i" (MSVA_offset), "i" (MTOP_offset), "i" (MIDXI_offset) |
440 | : "r4", "memory" | 412 | : "r4", "memory" |
441 | ); | 413 | ); |
414 | #endif | ||
442 | 415 | ||
443 | if ((!inst && entry2 >= DTLB_END) || (inst && entry1 >= ITLB_END)) | 416 | if ((!inst && entry2 >= DTLB_END) || (inst && entry1 >= ITLB_END)) |
444 | goto notfound; | 417 | goto notfound; |
@@ -482,7 +455,6 @@ notfound: | |||
482 | set_tlb_data(entry1, pte_data); | 455 | set_tlb_data(entry1, pte_data); |
483 | 456 | ||
484 | goto found; | 457 | goto found; |
485 | #endif | ||
486 | } | 458 | } |
487 | 459 | ||
488 | /*======================================================================* | 460 | /*======================================================================* |