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Diffstat (limited to 'arch/m32r/m32700ut/dot.gdbinit_200MHz_16MB')
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1# .gdbinit file
2# $Id: dot.gdbinit_200MHz_16MB,v 1.2 2004/10/20 03:02:27 fujiwara Exp $
3#-----
4# NOTE: this file is generated by a script, "gen_gdbinit.pl".
5# (Please type "gen_gdbinit.pl --help" and check the help message).
6# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
7#-----
8# target platform: m32700ut
9
10# setting
11set width 0d70
12set radix 0d16
13
14debug_chaos
15
16# clk xin:cpu:bif:bus=25:200:50:50
17define clock_init
18 set *(unsigned long *)0x00ef4008 = 0x00000000
19 set *(unsigned long *)0x00ef4004 = 0
20 shell sleep 0.1
21 # NOTE: Please change the master clock source from PLL-clock to Xin-clock
22 # and switch off PLL, before resetting the clock gear ratio.
23
24 set *(unsigned long *)0x00ef4024 = 2
25 set *(unsigned long *)0x00ef4020 = 2
26 set *(unsigned long *)0x00ef4010 = 0
27 set *(unsigned long *)0x00ef4014 = 0
28 set *(unsigned long *)0x00ef4004 = 3
29 shell sleep 0.1
30 set *(unsigned long *)0x00ef4008 = 0x00000200
31end
32
33# Initialize SDRAM controller
34define sdram_init
35 # SDIR0
36 set *(unsigned long *)0x00ef6008 = 0x00000182
37 # SDIR1
38 set *(unsigned long *)0x00ef600c = 0x00000001
39 # Initialize wait
40 shell sleep 0.1
41 # Ch0-MOD
42 set *(unsigned long *)0x00ef602c = 0x00000020
43 # Ch0-TR
44 set *(unsigned long *)0x00ef6028 = 0x00041302
45 # Ch0-ADR (size:16MB)
46 set *(unsigned long *)0x00ef6020 = 0x08000002
47 # AutoRef On
48 set *(unsigned long *)0x00ef6004 = 0x00010517
49 # Access enable
50 set *(unsigned long *)0x00ef6024 = 0x00000001
51end
52document sdram_init
53 SDRAM controller initialization
54 0x08000000 - 0x08ffffff (16MB)
55end
56
57# Initialize BSEL3 for UT-CFC
58define cfc_init
59 set $sfrbase = 0xa0ef0000
60# too fast
61# set *(unsigned long *)($sfrbase + 0x5300) = 0x0b0b8000
62# set *(unsigned long *)($sfrbase + 0x5304) = 0x00102204
63# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f8000
64# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f1fdf
65# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013220f
66# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013330f
67end
68document cfc_init
69 CF controller initialization
70end
71
72# MMU enable
73define mmu_enable
74 set $evb=0x88000000
75 set *(unsigned long *)0xffff0024=1
76end
77
78# MMU disable
79define mmu_disable
80 set $evb=0
81 set *(unsigned long *)0xffff0024=0
82end
83
84# Show TLB entries
85define show_tlb_entries
86 set $i = 0
87 set $addr = $arg0
88 set $nr_entries = $arg1
89 use_mon_code
90 while ($i < $nr_entries)
91 set $tlb_tag = *(unsigned long*)$addr
92 set $tlb_data = *(unsigned long*)($addr + 4)
93 printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
94 set $i = $i + 1
95 set $addr = $addr + 8
96 end
97 use_debug_dma
98end
99define itlb
100 set $itlb=0xfe000000
101 show_tlb_entries $itlb 0d32
102end
103define dtlb
104 set $dtlb=0xfe000800
105 show_tlb_entries $dtlb 0d32
106end
107
108# Initialize TLB entries
109define init_tlb_entries
110 set $i = 0
111 set $addr = $arg0
112 set $nr_entries = $arg1
113 use_mon_code
114 while ($i < $nr_entries)
115 set *(unsigned long *)($addr + 0x4) = 0
116 set $i = $i + 1
117 set $addr = $addr + 8
118 end
119 use_debug_dma
120end
121define tlb_init
122 set $itlb=0xfe000000
123 init_tlb_entries $itlb 0d32
124 set $dtlb=0xfe000800
125 init_tlb_entries $dtlb 0d32
126end
127
128# Show current task structure
129define show_current
130 set $current = $spi & 0xffffe000
131 printf "$current=0x%08lX\n",$current
132 print *(struct task_struct *)$current
133end
134
135# Show user assigned task structure
136define show_task
137 set = $arg0 & 0xffffe000
138 printf "$task=0x%08lX\n",$task
139 print *(struct task_struct *)$task
140end
141document show_task
142 Show user assigned task structure
143 arg0 : task structure address
144end
145
146# Show M32R registers
147define show_regs
148 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
149 printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
150 printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
151 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
152 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
153 printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
154 printf "EVB[0x%08lX]\n",$evb
155end
156
157# Setup all
158define setup
159 use_mon_code
160 set *(unsigned int)0xfffffffc=0x60
161 shell sleep 0.1
162 clock_init
163 shell sleep 0.1
164 # SDRAM: 16MB
165 set *(unsigned long *)0x00ef6020 = 0x08000002
166 cfc_init
167 # USB
168 set *(unsigned short *)0xb0301000 = 0x100
169
170 set $evb=0x08000000
171end
172
173# Load modules
174define load_modules
175 use_debug_dma
176 load
177end
178
179# Set kernel parameters
180define set_kernel_parameters
181 set $param = (void*)0x08001000
182 # INITRD_START
183# set *(unsigned long *)($param + 0x0010) = 0x08300000
184 # INITRD_SIZE
185# set *(unsigned long *)($param + 0x0014) = 0x00000000
186 # M32R_CPUCLK
187 set *(unsigned long *)($param + 0x0018) = 0d200000000
188 # M32R_BUSCLK
189 set *(unsigned long *)($param + 0x001c) = 0d50000000
190
191 # M32R_TIMER_DIVIDE
192 set *(unsigned long *)($param + 0x0020) = 0d128
193
194 set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs,rsize=1024,wsize=1024 nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 mem=16M \0"
195end
196
197# Boot
198define boot
199 set_kernel_parameters
200 set $fp = 0
201 set $pc = 0x08002000
202# set *(unsigned char *)0xffffffff = 0x03
203 si
204 c
205end
206
207# Set breakpoints
208define set_breakpoints
209 b *0x08000030
210end
211
212# Restart
213define restart
214 sdireset
215 sdireset
216 set $pc = 0
217 b *0x04001000
218 b *0x08001000
219 b *0x08002000
220 si
221 c
222 tlb_init
223 del
224 setup
225 load_modules
226 boot
227end
228
229define si
230 stepi
231 x/i $pc
232 show_reg
233end
234
235sdireset
236sdireset
237file vmlinux
238target m32rsdi
239set $pc = 0
240b *0x04001000
241b *0x08001000
242b *0x08002000
243c
244tlb_init
245del
246setup
247load_modules
248boot
249