1 files changed, 126 insertions, 0 deletions
diff --git a/arch/m32r/lib/delay.c b/arch/m32r/lib/delay.c
new file mode 100644
index 000000000000..fb29632c7eaa
--- /dev/null
+++ b/arch/m32r/lib/delay.c
@@ -0,0 +1,126 @@
+/*
+ * linux/arch/m32r/lib/delay.c
+ *
+ * Copyright (c) 2002  Hitoshi Yamamoto, Hirokazu Takata
+ * Copyright (c) 2004  Hirokazu Takata
+ */
+/* $Id$ */
+#include <linux/config.h>
+#include <linux/param.h>
+#ifdef CONFIG_SMP
+#include <linux/sched.h>
+#include <asm/current.h>
+#include <asm/smp.h>
+#endif  /* CONFIG_SMP */
+#include <asm/processor.h>
+void __delay(unsigned long loops)
+{
+#ifdef CONFIG_ISA_DUAL_ISSUE
+        __asm__ __volatile__ (
+                "beqz   %0, 2f                  \n\t"
+                "addi   %0, #-1                 \n\t"
+                " .fillinsn                     \n\t"
+                "1:                             \n\t"
+                "cmpz   %0  ||  addi  %0, #-1   \n\t"
+                "bc     2f  ||  cmpz  %0        \n\t"
+                "bc     2f  ||  addi  %0, #-1   \n\t"
+                "cmpz   %0  ||  addi  %0, #-1   \n\t"
+                "bc     2f  ||  cmpz  %0        \n\t"
+                "bnc    1b  ||  addi  %0, #-1   \n\t"
+                " .fillinsn                     \n\t"
+                "2:                             \n\t"
+                : "+r" (loops)
+                : "r" (0)
+                : "cbit"
+        );
+#else
+        __asm__ __volatile__ (
+                "beqz   %0, 2f                  \n\t"
+                " .fillinsn                     \n\t"
+                "1:                             \n\t"
+                "addi   %0, #-1                 \n\t"
+                "blez   %0, 2f                  \n\t"
+                "addi   %0, #-1                 \n\t"
+                "blez   %0, 2f                  \n\t"
+                "addi   %0, #-1                 \n\t"
+                "blez   %0, 2f                  \n\t"
+                "addi   %0, #-1                 \n\t"
+                "bgtz   %0, 1b                  \n\t"
+                " .fillinsn                     \n\t"
+                "2:                             \n\t"
+                : "+r" (loops)
+                : "r" (0)
+        );
+#endif
+}
+void __const_udelay(unsigned long xloops)
+{
+#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2)
+        /*
+         * loops [1] = (xloops >> 32) [sec] * loops_per_jiffy [1/jiffy]
+         *            * HZ [jiffy/sec]
+         *          = (xloops >> 32) [sec] * (loops_per_jiffy * HZ) [1/sec]
+         *          = (((xloops * loops_per_jiffy) >> 32) * HZ) [1]
+         *
+         * NOTE:
+         *   - '[]' depicts variable's dimension in the above equation.
+         *   - "rac" instruction rounds the accumulator in word size.
+         */
+        __asm__ __volatile__ (
+                "srli   %0, #1                          \n\t"
+                "mulwhi %0, %1  ; a0                    \n\t"
+                "mulwu1 %0, %1  ; a1                    \n\t"
+                "sadd           ; a0 += (a1 >> 16)      \n\t"
+                "rac    a0, a0, #1                      \n\t"
+                "mvfacmi %0, a0                         \n\t"
+                : "+r" (xloops)
+                : "r" (current_cpu_data.loops_per_jiffy)
+                : "a0", "a1"
+        );
+#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
+        /*
+         * u64 ull;
+         * ull = (u64)xloops * (u64)current_cpu_data.loops_per_jiffy;
+         * xloops = (ull >> 32);
+         */
+        __asm__ __volatile__ (
+                "and3   r4, %0, #0xffff         \n\t"
+                "and3   r5, %1, #0xffff         \n\t"
+                "mul    r4, r5                  \n\t"
+                "srl3   r6, %0, #16             \n\t"
+                "srli   r4, #16                 \n\t"
+                "mul    r5, r6                  \n\t"
+                "add    r4, r5                  \n\t"
+                "and3   r5, %0, #0xffff         \n\t"
+                "srl3   r6, %1, #16             \n\t"
+                "mul    r5, r6                  \n\t"
+                "add    r4, r5                  \n\t"
+                "srl3   r5, %0, #16             \n\t"
+                "srli   r4, #16                 \n\t"
+                "mul    r5, r6                  \n\t"
+                "add    r4, r5                  \n\t"
+                "mv     %0, r4                  \n\t"
+                : "+r" (xloops)
+                : "r" (current_cpu_data.loops_per_jiffy)
+                : "r4", "r5", "r6"
+        );
+#else
+#error unknown isa configuration
+#endif
+        __delay(xloops * HZ);
+}
+void __udelay(unsigned long usecs)
+{
+        __const_udelay(usecs * 0x000010c7);  /* 2**32 / 1000000 (rounded up) */
+}
+void __ndelay(unsigned long nsecs)
+{
+        __const_udelay(nsecs * 0x00005);  /* 2**32 / 1000000000 (rounded up) */
+}

diff --git a/arch/m32r/lib/delay.c b/arch/m32r/lib/delay.c new file mode 100644 index 000000000000..fb29632c7eaa --- /dev/null +++ b/arch/m32r/lib/delay.c
@@ -0,0 +1,126 @@
	1	/*
	2	* linux/arch/m32r/lib/delay.c
	3	*
	4	* Copyright (c) 2002 Hitoshi Yamamoto, Hirokazu Takata
	5	* Copyright (c) 2004 Hirokazu Takata
	6	*/
	7
	8	/* $Id$ */
	9
	10	#include <linux/config.h>
	11	#include <linux/param.h>
	12	#ifdef CONFIG_SMP
	13	#include <linux/sched.h>
	14	#include <asm/current.h>
	15	#include <asm/smp.h>
	16	#endif /* CONFIG_SMP */
	17	#include <asm/processor.h>
	18
	19	void __delay(unsigned long loops)
	20	{
	21	#ifdef CONFIG_ISA_DUAL_ISSUE
	22	__asm__ __volatile__ (
	23	"beqz %0, 2f \n\t"
	24	"addi %0, #-1 \n\t"
	25
	26	" .fillinsn \n\t"
	27	"1: \n\t"
	28	"cmpz %0 \|\| addi %0, #-1 \n\t"
	29	"bc 2f \|\| cmpz %0 \n\t"
	30	"bc 2f \|\| addi %0, #-1 \n\t"
	31	"cmpz %0 \|\| addi %0, #-1 \n\t"
	32	"bc 2f \|\| cmpz %0 \n\t"
	33	"bnc 1b \|\| addi %0, #-1 \n\t"
	34	" .fillinsn \n\t"
	35	"2: \n\t"
	36	: "+r" (loops)
	37	: "r" (0)
	38	: "cbit"
	39	);
	40	#else
	41	__asm__ __volatile__ (
	42	"beqz %0, 2f \n\t"
	43	" .fillinsn \n\t"
	44	"1: \n\t"
	45	"addi %0, #-1 \n\t"
	46	"blez %0, 2f \n\t"
	47	"addi %0, #-1 \n\t"
	48	"blez %0, 2f \n\t"
	49	"addi %0, #-1 \n\t"
	50	"blez %0, 2f \n\t"
	51	"addi %0, #-1 \n\t"
	52	"bgtz %0, 1b \n\t"
	53	" .fillinsn \n\t"
	54	"2: \n\t"
	55	: "+r" (loops)
	56	: "r" (0)
	57	);
	58	#endif
	59	}
	60
	61	void __const_udelay(unsigned long xloops)
	62	{
	63	#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2)
	64	/*
	65	* loops [1] = (xloops >> 32) [sec] * loops_per_jiffy [1/jiffy]
	66	* * HZ [jiffy/sec]
	67	* = (xloops >> 32) [sec] * (loops_per_jiffy * HZ) [1/sec]
	68	* = (((xloops * loops_per_jiffy) >> 32) * HZ) [1]
	69	*
	70	* NOTE:
	71	* - '[]' depicts variable's dimension in the above equation.
	72	* - "rac" instruction rounds the accumulator in word size.
	73	*/
	74	__asm__ __volatile__ (
	75	"srli %0, #1 \n\t"
	76	"mulwhi %0, %1 ; a0 \n\t"
	77	"mulwu1 %0, %1 ; a1 \n\t"
	78	"sadd ; a0 += (a1 >> 16) \n\t"
	79	"rac a0, a0, #1 \n\t"
	80	"mvfacmi %0, a0 \n\t"
	81	: "+r" (xloops)
	82	: "r" (current_cpu_data.loops_per_jiffy)
	83	: "a0", "a1"
	84	);
	85	#elif defined(CONFIG_ISA_M32R2) \|\| defined(CONFIG_ISA_M32R)
	86	/*
	87	* u64 ull;
	88	* ull = (u64)xloops * (u64)current_cpu_data.loops_per_jiffy;
	89	* xloops = (ull >> 32);
	90	*/
	91	__asm__ __volatile__ (
	92	"and3 r4, %0, #0xffff \n\t"
	93	"and3 r5, %1, #0xffff \n\t"
	94	"mul r4, r5 \n\t"
	95	"srl3 r6, %0, #16 \n\t"
	96	"srli r4, #16 \n\t"
	97	"mul r5, r6 \n\t"
	98	"add r4, r5 \n\t"
	99	"and3 r5, %0, #0xffff \n\t"
	100	"srl3 r6, %1, #16 \n\t"
	101	"mul r5, r6 \n\t"
	102	"add r4, r5 \n\t"
	103	"srl3 r5, %0, #16 \n\t"
	104	"srli r4, #16 \n\t"
	105	"mul r5, r6 \n\t"
	106	"add r4, r5 \n\t"
	107	"mv %0, r4 \n\t"
	108	: "+r" (xloops)
	109	: "r" (current_cpu_data.loops_per_jiffy)
	110	: "r4", "r5", "r6"
	111	);
	112	#else
	113	#error unknown isa configuration
	114	#endif
	115	__delay(xloops * HZ);
	116	}
	117
	118	void __udelay(unsigned long usecs)
	119	{
	120	__const_udelay(usecs * 0x000010c7); /* 2*32 / 1000000 (rounded up) /
	121	}
	122
	123	void __ndelay(unsigned long nsecs)
	124	{
	125	__const_udelay(nsecs * 0x00005); /* 2*32 / 1000000000 (rounded up) /
	126	}