diff options
Diffstat (limited to 'arch/m32r/kernel')
-rw-r--r-- | arch/m32r/kernel/Makefile | 1 | ||||
-rw-r--r-- | arch/m32r/kernel/entry.S | 19 | ||||
-rw-r--r-- | arch/m32r/kernel/io_m32104ut.c | 298 | ||||
-rw-r--r-- | arch/m32r/kernel/io_m32700ut.c | 24 | ||||
-rw-r--r-- | arch/m32r/kernel/io_mappi.c | 2 | ||||
-rw-r--r-- | arch/m32r/kernel/io_mappi2.c | 24 | ||||
-rw-r--r-- | arch/m32r/kernel/io_mappi3.c | 51 | ||||
-rw-r--r-- | arch/m32r/kernel/io_oaks32r.c | 2 | ||||
-rw-r--r-- | arch/m32r/kernel/io_opsput.c | 6 | ||||
-rw-r--r-- | arch/m32r/kernel/setup.c | 7 | ||||
-rw-r--r-- | arch/m32r/kernel/setup_m32104ut.c | 156 | ||||
-rw-r--r-- | arch/m32r/kernel/setup_m32700ut.c | 8 | ||||
-rw-r--r-- | arch/m32r/kernel/setup_mappi.c | 6 | ||||
-rw-r--r-- | arch/m32r/kernel/setup_mappi2.c | 6 | ||||
-rw-r--r-- | arch/m32r/kernel/setup_mappi3.c | 6 | ||||
-rw-r--r-- | arch/m32r/kernel/setup_oaks32r.c | 6 | ||||
-rw-r--r-- | arch/m32r/kernel/setup_opsput.c | 8 | ||||
-rw-r--r-- | arch/m32r/kernel/setup_usrv.c | 6 | ||||
-rw-r--r-- | arch/m32r/kernel/time.c | 4 |
19 files changed, 537 insertions, 103 deletions
diff --git a/arch/m32r/kernel/Makefile b/arch/m32r/kernel/Makefile index 6c6b6c376638..5a2fa886906f 100644 --- a/arch/m32r/kernel/Makefile +++ b/arch/m32r/kernel/Makefile | |||
@@ -16,5 +16,6 @@ obj-$(CONFIG_PLAT_M32700UT) += setup_m32700ut.o io_m32700ut.o | |||
16 | obj-$(CONFIG_PLAT_OPSPUT) += setup_opsput.o io_opsput.o | 16 | obj-$(CONFIG_PLAT_OPSPUT) += setup_opsput.o io_opsput.o |
17 | obj-$(CONFIG_MODULES) += module.o | 17 | obj-$(CONFIG_MODULES) += module.o |
18 | obj-$(CONFIG_PLAT_OAKS32R) += setup_oaks32r.o io_oaks32r.o | 18 | obj-$(CONFIG_PLAT_OAKS32R) += setup_oaks32r.o io_oaks32r.o |
19 | obj-$(CONFIG_PLAT_M32104UT) += setup_m32104ut.o io_m32104ut.o | ||
19 | 20 | ||
20 | EXTRA_AFLAGS := -traditional | 21 | EXTRA_AFLAGS := -traditional |
diff --git a/arch/m32r/kernel/entry.S b/arch/m32r/kernel/entry.S index 396c94218cc2..3871b65f0c82 100644 --- a/arch/m32r/kernel/entry.S +++ b/arch/m32r/kernel/entry.S | |||
@@ -315,7 +315,7 @@ ENTRY(ei_handler) | |||
315 | mv r1, sp ; arg1(regs) | 315 | mv r1, sp ; arg1(regs) |
316 | #if defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \ | 316 | #if defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \ |
317 | || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \ | 317 | || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \ |
318 | || defined(CONFIG_CHIP_OPSP) | 318 | || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) |
319 | 319 | ||
320 | ; GET_ICU_STATUS; | 320 | ; GET_ICU_STATUS; |
321 | seth r0, #shigh(M32R_ICU_ISTS_ADDR) | 321 | seth r0, #shigh(M32R_ICU_ISTS_ADDR) |
@@ -541,7 +541,20 @@ check_int2: | |||
541 | bra check_end | 541 | bra check_end |
542 | .fillinsn | 542 | .fillinsn |
543 | check_end: | 543 | check_end: |
544 | #endif /* CONFIG_PLAT_OPSPUT */ | 544 | #elif defined(CONFIG_PLAT_M32104UT) |
545 | add3 r2, r0, #-(M32R_IRQ_INT1) ; INT1# interrupt | ||
546 | bnez r2, check_end | ||
547 | ; read ICU status register of PLD | ||
548 | seth r0, #high(PLD_ICUISTS) | ||
549 | or3 r0, r0, #low(PLD_ICUISTS) | ||
550 | lduh r0, @r0 | ||
551 | slli r0, #21 | ||
552 | srli r0, #27 ; ISN | ||
553 | addi r0, #(M32104UT_PLD_IRQ_BASE) | ||
554 | bra check_end | ||
555 | .fillinsn | ||
556 | check_end: | ||
557 | #endif /* CONFIG_PLAT_M32104UT */ | ||
545 | bl do_IRQ | 558 | bl do_IRQ |
546 | #endif /* CONFIG_SMP */ | 559 | #endif /* CONFIG_SMP */ |
547 | ld r14, @sp+ | 560 | ld r14, @sp+ |
@@ -651,8 +664,6 @@ ENTRY(rie_handler) | |||
651 | /* void rie_handler(int error_code) */ | 664 | /* void rie_handler(int error_code) */ |
652 | SWITCH_TO_KERNEL_STACK | 665 | SWITCH_TO_KERNEL_STACK |
653 | SAVE_ALL | 666 | SAVE_ALL |
654 | mvfc r0, bpc | ||
655 | ld r1, @r0 | ||
656 | ldi r1, #0x20 ; error_code | 667 | ldi r1, #0x20 ; error_code |
657 | mv r0, sp ; pt_regs | 668 | mv r0, sp ; pt_regs |
658 | bl do_rie_handler | 669 | bl do_rie_handler |
diff --git a/arch/m32r/kernel/io_m32104ut.c b/arch/m32r/kernel/io_m32104ut.c new file mode 100644 index 000000000000..d26adab9586c --- /dev/null +++ b/arch/m32r/kernel/io_m32104ut.c | |||
@@ -0,0 +1,298 @@ | |||
1 | /* | ||
2 | * linux/arch/m32r/kernel/io_m32104ut.c | ||
3 | * | ||
4 | * Typical I/O routines for M32104UT board. | ||
5 | * | ||
6 | * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata, | ||
7 | * Hitoshi Yamamoto, Mamoru Sakugawa, | ||
8 | * Naoto Sugai, Hayato Fujiwara | ||
9 | */ | ||
10 | |||
11 | #include <linux/config.h> | ||
12 | #include <asm/m32r.h> | ||
13 | #include <asm/page.h> | ||
14 | #include <asm/io.h> | ||
15 | #include <asm/byteorder.h> | ||
16 | |||
17 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
18 | #include <linux/types.h> | ||
19 | |||
20 | #define M32R_PCC_IOMAP_SIZE 0x1000 | ||
21 | |||
22 | #define M32R_PCC_IOSTART0 0x1000 | ||
23 | #define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1) | ||
24 | |||
25 | extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int); | ||
26 | extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int); | ||
27 | extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int); | ||
28 | extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int); | ||
29 | #endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */ | ||
30 | |||
31 | #define PORT2ADDR(port) _port2addr(port) | ||
32 | |||
33 | static inline void *_port2addr(unsigned long port) | ||
34 | { | ||
35 | return (void *)(port | NONCACHE_OFFSET); | ||
36 | } | ||
37 | |||
38 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
39 | static inline void *__port2addr_ata(unsigned long port) | ||
40 | { | ||
41 | static int dummy_reg; | ||
42 | |||
43 | switch (port) { | ||
44 | case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET); | ||
45 | case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET); | ||
46 | case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET); | ||
47 | case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET); | ||
48 | case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET); | ||
49 | case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET); | ||
50 | case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET); | ||
51 | case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET); | ||
52 | case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET); | ||
53 | default: return (void *)&dummy_reg; | ||
54 | } | ||
55 | } | ||
56 | #endif | ||
57 | |||
58 | /* | ||
59 | * M32104T-LAN is located in the extended bus space | ||
60 | * from 0x01000000 to 0x01ffffff on physical address. | ||
61 | * The base address of LAN controller(LAN91C111) is 0x300. | ||
62 | */ | ||
63 | #define LAN_IOSTART (0x300 | NONCACHE_OFFSET) | ||
64 | #define LAN_IOEND (0x320 | NONCACHE_OFFSET) | ||
65 | static inline void *_port2addr_ne(unsigned long port) | ||
66 | { | ||
67 | return (void *)(port + NONCACHE_OFFSET + 0x01000000); | ||
68 | } | ||
69 | |||
70 | static inline void delay(void) | ||
71 | { | ||
72 | __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory"); | ||
73 | } | ||
74 | |||
75 | /* | ||
76 | * NIC I/O function | ||
77 | */ | ||
78 | |||
79 | #define PORT2ADDR_NE(port) _port2addr_ne(port) | ||
80 | |||
81 | static inline unsigned char _ne_inb(void *portp) | ||
82 | { | ||
83 | return *(volatile unsigned char *)portp; | ||
84 | } | ||
85 | |||
86 | static inline unsigned short _ne_inw(void *portp) | ||
87 | { | ||
88 | return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp); | ||
89 | } | ||
90 | |||
91 | static inline void _ne_insb(void *portp, void *addr, unsigned long count) | ||
92 | { | ||
93 | unsigned char *buf = (unsigned char *)addr; | ||
94 | |||
95 | while (count--) | ||
96 | *buf++ = _ne_inb(portp); | ||
97 | } | ||
98 | |||
99 | static inline void _ne_outb(unsigned char b, void *portp) | ||
100 | { | ||
101 | *(volatile unsigned char *)portp = b; | ||
102 | } | ||
103 | |||
104 | static inline void _ne_outw(unsigned short w, void *portp) | ||
105 | { | ||
106 | *(volatile unsigned short *)portp = cpu_to_le16(w); | ||
107 | } | ||
108 | |||
109 | unsigned char _inb(unsigned long port) | ||
110 | { | ||
111 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
112 | return _ne_inb(PORT2ADDR_NE(port)); | ||
113 | |||
114 | return *(volatile unsigned char *)PORT2ADDR(port); | ||
115 | } | ||
116 | |||
117 | unsigned short _inw(unsigned long port) | ||
118 | { | ||
119 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
120 | return _ne_inw(PORT2ADDR_NE(port)); | ||
121 | |||
122 | return *(volatile unsigned short *)PORT2ADDR(port); | ||
123 | } | ||
124 | |||
125 | unsigned long _inl(unsigned long port) | ||
126 | { | ||
127 | return *(volatile unsigned long *)PORT2ADDR(port); | ||
128 | } | ||
129 | |||
130 | unsigned char _inb_p(unsigned long port) | ||
131 | { | ||
132 | unsigned char v = _inb(port); | ||
133 | delay(); | ||
134 | return (v); | ||
135 | } | ||
136 | |||
137 | unsigned short _inw_p(unsigned long port) | ||
138 | { | ||
139 | unsigned short v = _inw(port); | ||
140 | delay(); | ||
141 | return (v); | ||
142 | } | ||
143 | |||
144 | unsigned long _inl_p(unsigned long port) | ||
145 | { | ||
146 | unsigned long v = _inl(port); | ||
147 | delay(); | ||
148 | return (v); | ||
149 | } | ||
150 | |||
151 | void _outb(unsigned char b, unsigned long port) | ||
152 | { | ||
153 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
154 | _ne_outb(b, PORT2ADDR_NE(port)); | ||
155 | else | ||
156 | *(volatile unsigned char *)PORT2ADDR(port) = b; | ||
157 | } | ||
158 | |||
159 | void _outw(unsigned short w, unsigned long port) | ||
160 | { | ||
161 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
162 | _ne_outw(w, PORT2ADDR_NE(port)); | ||
163 | else | ||
164 | *(volatile unsigned short *)PORT2ADDR(port) = w; | ||
165 | } | ||
166 | |||
167 | void _outl(unsigned long l, unsigned long port) | ||
168 | { | ||
169 | *(volatile unsigned long *)PORT2ADDR(port) = l; | ||
170 | } | ||
171 | |||
172 | void _outb_p(unsigned char b, unsigned long port) | ||
173 | { | ||
174 | _outb(b, port); | ||
175 | delay(); | ||
176 | } | ||
177 | |||
178 | void _outw_p(unsigned short w, unsigned long port) | ||
179 | { | ||
180 | _outw(w, port); | ||
181 | delay(); | ||
182 | } | ||
183 | |||
184 | void _outl_p(unsigned long l, unsigned long port) | ||
185 | { | ||
186 | _outl(l, port); | ||
187 | delay(); | ||
188 | } | ||
189 | |||
190 | void _insb(unsigned int port, void *addr, unsigned long count) | ||
191 | { | ||
192 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
193 | _ne_insb(PORT2ADDR_NE(port), addr, count); | ||
194 | else { | ||
195 | unsigned char *buf = addr; | ||
196 | unsigned char *portp = PORT2ADDR(port); | ||
197 | while (count--) | ||
198 | *buf++ = *(volatile unsigned char *)portp; | ||
199 | } | ||
200 | } | ||
201 | |||
202 | void _insw(unsigned int port, void *addr, unsigned long count) | ||
203 | { | ||
204 | unsigned short *buf = addr; | ||
205 | unsigned short *portp; | ||
206 | |||
207 | if (port >= LAN_IOSTART && port < LAN_IOEND) { | ||
208 | /* | ||
209 | * This portion is only used by smc91111.c to read data | ||
210 | * from the DATA_REG. Do not swap the data. | ||
211 | */ | ||
212 | portp = PORT2ADDR_NE(port); | ||
213 | while (count--) | ||
214 | *buf++ = *(volatile unsigned short *)portp; | ||
215 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
216 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
217 | pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short), | ||
218 | count, 1); | ||
219 | #endif | ||
220 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
221 | } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
222 | portp = __port2addr_ata(port); | ||
223 | while (count--) | ||
224 | *buf++ = *(volatile unsigned short *)portp; | ||
225 | #endif | ||
226 | } else { | ||
227 | portp = PORT2ADDR(port); | ||
228 | while (count--) | ||
229 | *buf++ = *(volatile unsigned short *)portp; | ||
230 | } | ||
231 | } | ||
232 | |||
233 | void _insl(unsigned int port, void *addr, unsigned long count) | ||
234 | { | ||
235 | unsigned long *buf = addr; | ||
236 | unsigned long *portp; | ||
237 | |||
238 | portp = PORT2ADDR(port); | ||
239 | while (count--) | ||
240 | *buf++ = *(volatile unsigned long *)portp; | ||
241 | } | ||
242 | |||
243 | void _outsb(unsigned int port, const void *addr, unsigned long count) | ||
244 | { | ||
245 | const unsigned char *buf = addr; | ||
246 | unsigned char *portp; | ||
247 | |||
248 | if (port >= LAN_IOSTART && port < LAN_IOEND) { | ||
249 | portp = PORT2ADDR_NE(port); | ||
250 | while (count--) | ||
251 | _ne_outb(*buf++, portp); | ||
252 | } else { | ||
253 | portp = PORT2ADDR(port); | ||
254 | while (count--) | ||
255 | *(volatile unsigned char *)portp = *buf++; | ||
256 | } | ||
257 | } | ||
258 | |||
259 | void _outsw(unsigned int port, const void *addr, unsigned long count) | ||
260 | { | ||
261 | const unsigned short *buf = addr; | ||
262 | unsigned short *portp; | ||
263 | |||
264 | if (port >= LAN_IOSTART && port < LAN_IOEND) { | ||
265 | /* | ||
266 | * This portion is only used by smc91111.c to write data | ||
267 | * into the DATA_REG. Do not swap the data. | ||
268 | */ | ||
269 | portp = PORT2ADDR_NE(port); | ||
270 | while (count--) | ||
271 | *(volatile unsigned short *)portp = *buf++; | ||
272 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
273 | } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
274 | portp = __port2addr_ata(port); | ||
275 | while (count--) | ||
276 | *(volatile unsigned short *)portp = *buf++; | ||
277 | #endif | ||
278 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
279 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
280 | pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short), | ||
281 | count, 1); | ||
282 | #endif | ||
283 | } else { | ||
284 | portp = PORT2ADDR(port); | ||
285 | while (count--) | ||
286 | *(volatile unsigned short *)portp = *buf++; | ||
287 | } | ||
288 | } | ||
289 | |||
290 | void _outsl(unsigned int port, const void *addr, unsigned long count) | ||
291 | { | ||
292 | const unsigned long *buf = addr; | ||
293 | unsigned char *portp; | ||
294 | |||
295 | portp = PORT2ADDR(port); | ||
296 | while (count--) | ||
297 | *(volatile unsigned long *)portp = *buf++; | ||
298 | } | ||
diff --git a/arch/m32r/kernel/io_m32700ut.c b/arch/m32r/kernel/io_m32700ut.c index eda9f963c1eb..939932d6cc00 100644 --- a/arch/m32r/kernel/io_m32700ut.c +++ b/arch/m32r/kernel/io_m32700ut.c | |||
@@ -36,7 +36,7 @@ extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int); | |||
36 | 36 | ||
37 | static inline void *_port2addr(unsigned long port) | 37 | static inline void *_port2addr(unsigned long port) |
38 | { | 38 | { |
39 | return (void *)(port + NONCACHE_OFFSET); | 39 | return (void *)(port | NONCACHE_OFFSET); |
40 | } | 40 | } |
41 | 41 | ||
42 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | 42 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) |
@@ -45,15 +45,15 @@ static inline void *__port2addr_ata(unsigned long port) | |||
45 | static int dummy_reg; | 45 | static int dummy_reg; |
46 | 46 | ||
47 | switch (port) { | 47 | switch (port) { |
48 | case 0x1f0: return (void *)0xac002000; | 48 | case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET); |
49 | case 0x1f1: return (void *)0xac012800; | 49 | case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET); |
50 | case 0x1f2: return (void *)0xac012002; | 50 | case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET); |
51 | case 0x1f3: return (void *)0xac012802; | 51 | case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET); |
52 | case 0x1f4: return (void *)0xac012004; | 52 | case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET); |
53 | case 0x1f5: return (void *)0xac012804; | 53 | case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET); |
54 | case 0x1f6: return (void *)0xac012006; | 54 | case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET); |
55 | case 0x1f7: return (void *)0xac012806; | 55 | case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET); |
56 | case 0x3f6: return (void *)0xac01200e; | 56 | case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET); |
57 | default: return (void *)&dummy_reg; | 57 | default: return (void *)&dummy_reg; |
58 | } | 58 | } |
59 | } | 59 | } |
@@ -64,8 +64,8 @@ static inline void *__port2addr_ata(unsigned long port) | |||
64 | * from 0x10000000 to 0x13ffffff on physical address. | 64 | * from 0x10000000 to 0x13ffffff on physical address. |
65 | * The base address of LAN controller(LAN91C111) is 0x300. | 65 | * The base address of LAN controller(LAN91C111) is 0x300. |
66 | */ | 66 | */ |
67 | #define LAN_IOSTART 0xa0000300 | 67 | #define LAN_IOSTART (0x300 | NONCACHE_OFFSET) |
68 | #define LAN_IOEND 0xa0000320 | 68 | #define LAN_IOEND (0x320 | NONCACHE_OFFSET) |
69 | static inline void *_port2addr_ne(unsigned long port) | 69 | static inline void *_port2addr_ne(unsigned long port) |
70 | { | 70 | { |
71 | return (void *)(port + 0x10000000); | 71 | return (void *)(port + 0x10000000); |
diff --git a/arch/m32r/kernel/io_mappi.c b/arch/m32r/kernel/io_mappi.c index 3c3da042fbd1..a662b537c5ba 100644 --- a/arch/m32r/kernel/io_mappi.c +++ b/arch/m32r/kernel/io_mappi.c | |||
@@ -31,7 +31,7 @@ extern void pcc_iowrite(int, unsigned long, void *, size_t, size_t, int); | |||
31 | 31 | ||
32 | static inline void *_port2addr(unsigned long port) | 32 | static inline void *_port2addr(unsigned long port) |
33 | { | 33 | { |
34 | return (void *)(port | (NONCACHE_OFFSET)); | 34 | return (void *)(port | NONCACHE_OFFSET); |
35 | } | 35 | } |
36 | 36 | ||
37 | static inline void *_port2addr_ne(unsigned long port) | 37 | static inline void *_port2addr_ne(unsigned long port) |
diff --git a/arch/m32r/kernel/io_mappi2.c b/arch/m32r/kernel/io_mappi2.c index df3c729cb3e0..e72d725606af 100644 --- a/arch/m32r/kernel/io_mappi2.c +++ b/arch/m32r/kernel/io_mappi2.c | |||
@@ -33,7 +33,7 @@ extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int); | |||
33 | 33 | ||
34 | static inline void *_port2addr(unsigned long port) | 34 | static inline void *_port2addr(unsigned long port) |
35 | { | 35 | { |
36 | return (void *)(port | (NONCACHE_OFFSET)); | 36 | return (void *)(port | NONCACHE_OFFSET); |
37 | } | 37 | } |
38 | 38 | ||
39 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | 39 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) |
@@ -42,22 +42,22 @@ static inline void *__port2addr_ata(unsigned long port) | |||
42 | static int dummy_reg; | 42 | static int dummy_reg; |
43 | 43 | ||
44 | switch (port) { | 44 | switch (port) { |
45 | case 0x1f0: return (void *)0xac002000; | 45 | case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET); |
46 | case 0x1f1: return (void *)0xac012800; | 46 | case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET); |
47 | case 0x1f2: return (void *)0xac012002; | 47 | case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET); |
48 | case 0x1f3: return (void *)0xac012802; | 48 | case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET); |
49 | case 0x1f4: return (void *)0xac012004; | 49 | case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET); |
50 | case 0x1f5: return (void *)0xac012804; | 50 | case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET); |
51 | case 0x1f6: return (void *)0xac012006; | 51 | case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET); |
52 | case 0x1f7: return (void *)0xac012806; | 52 | case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET); |
53 | case 0x3f6: return (void *)0xac01200e; | 53 | case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET); |
54 | default: return (void *)&dummy_reg; | 54 | default: return (void *)&dummy_reg; |
55 | } | 55 | } |
56 | } | 56 | } |
57 | #endif | 57 | #endif |
58 | 58 | ||
59 | #define LAN_IOSTART 0xa0000300 | 59 | #define LAN_IOSTART (0x300 | NONCACHE_OFFSET) |
60 | #define LAN_IOEND 0xa0000320 | 60 | #define LAN_IOEND (0x320 | NONCACHE_OFFSET) |
61 | #ifdef CONFIG_CHIP_OPSP | 61 | #ifdef CONFIG_CHIP_OPSP |
62 | static inline void *_port2addr_ne(unsigned long port) | 62 | static inline void *_port2addr_ne(unsigned long port) |
63 | { | 63 | { |
diff --git a/arch/m32r/kernel/io_mappi3.c b/arch/m32r/kernel/io_mappi3.c index f80321a58764..ed6da930bc64 100644 --- a/arch/m32r/kernel/io_mappi3.c +++ b/arch/m32r/kernel/io_mappi3.c | |||
@@ -33,7 +33,7 @@ extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int); | |||
33 | 33 | ||
34 | static inline void *_port2addr(unsigned long port) | 34 | static inline void *_port2addr(unsigned long port) |
35 | { | 35 | { |
36 | return (void *)(port + NONCACHE_OFFSET); | 36 | return (void *)(port | NONCACHE_OFFSET); |
37 | } | 37 | } |
38 | 38 | ||
39 | #if defined(CONFIG_IDE) | 39 | #if defined(CONFIG_IDE) |
@@ -43,33 +43,42 @@ static inline void *__port2addr_ata(unsigned long port) | |||
43 | 43 | ||
44 | switch (port) { | 44 | switch (port) { |
45 | /* IDE0 CF */ | 45 | /* IDE0 CF */ |
46 | case 0x1f0: return (void *)0xb4002000; | 46 | case 0x1f0: return (void *)(0x14002000 | NONCACHE_OFFSET); |
47 | case 0x1f1: return (void *)0xb4012800; | 47 | case 0x1f1: return (void *)(0x14012800 | NONCACHE_OFFSET); |
48 | case 0x1f2: return (void *)0xb4012002; | 48 | case 0x1f2: return (void *)(0x14012002 | NONCACHE_OFFSET); |
49 | case 0x1f3: return (void *)0xb4012802; | 49 | case 0x1f3: return (void *)(0x14012802 | NONCACHE_OFFSET); |
50 | case 0x1f4: return (void *)0xb4012004; | 50 | case 0x1f4: return (void *)(0x14012004 | NONCACHE_OFFSET); |
51 | case 0x1f5: return (void *)0xb4012804; | 51 | case 0x1f5: return (void *)(0x14012804 | NONCACHE_OFFSET); |
52 | case 0x1f6: return (void *)0xb4012006; | 52 | case 0x1f6: return (void *)(0x14012006 | NONCACHE_OFFSET); |
53 | case 0x1f7: return (void *)0xb4012806; | 53 | case 0x1f7: return (void *)(0x14012806 | NONCACHE_OFFSET); |
54 | case 0x3f6: return (void *)0xb401200e; | 54 | case 0x3f6: return (void *)(0x1401200e | NONCACHE_OFFSET); |
55 | /* IDE1 IDE */ | 55 | /* IDE1 IDE */ |
56 | case 0x170: return (void *)0xb4810000; /* Data 16bit */ | 56 | case 0x170: /* Data 16bit */ |
57 | case 0x171: return (void *)0xb4810002; /* Features / Error */ | 57 | return (void *)(0x14810000 | NONCACHE_OFFSET); |
58 | case 0x172: return (void *)0xb4810004; /* Sector count */ | 58 | case 0x171: /* Features / Error */ |
59 | case 0x173: return (void *)0xb4810006; /* Sector number */ | 59 | return (void *)(0x14810002 | NONCACHE_OFFSET); |
60 | case 0x174: return (void *)0xb4810008; /* Cylinder low */ | 60 | case 0x172: /* Sector count */ |
61 | case 0x175: return (void *)0xb481000a; /* Cylinder high */ | 61 | return (void *)(0x14810004 | NONCACHE_OFFSET); |
62 | case 0x176: return (void *)0xb481000c; /* Device head */ | 62 | case 0x173: /* Sector number */ |
63 | case 0x177: return (void *)0xb481000e; /* Command */ | 63 | return (void *)(0x14810006 | NONCACHE_OFFSET); |
64 | case 0x376: return (void *)0xb480800c; /* Device control / Alt status */ | 64 | case 0x174: /* Cylinder low */ |
65 | return (void *)(0x14810008 | NONCACHE_OFFSET); | ||
66 | case 0x175: /* Cylinder high */ | ||
67 | return (void *)(0x1481000a | NONCACHE_OFFSET); | ||
68 | case 0x176: /* Device head */ | ||
69 | return (void *)(0x1481000c | NONCACHE_OFFSET); | ||
70 | case 0x177: /* Command */ | ||
71 | return (void *)(0x1481000e | NONCACHE_OFFSET); | ||
72 | case 0x376: /* Device control / Alt status */ | ||
73 | return (void *)(0x1480800c | NONCACHE_OFFSET); | ||
65 | 74 | ||
66 | default: return (void *)&dummy_reg; | 75 | default: return (void *)&dummy_reg; |
67 | } | 76 | } |
68 | } | 77 | } |
69 | #endif | 78 | #endif |
70 | 79 | ||
71 | #define LAN_IOSTART 0xa0000300 | 80 | #define LAN_IOSTART (0x300 | NONCACHE_OFFSET) |
72 | #define LAN_IOEND 0xa0000320 | 81 | #define LAN_IOEND (0x320 | NONCACHE_OFFSET) |
73 | static inline void *_port2addr_ne(unsigned long port) | 82 | static inline void *_port2addr_ne(unsigned long port) |
74 | { | 83 | { |
75 | return (void *)(port + 0x10000000); | 84 | return (void *)(port + 0x10000000); |
diff --git a/arch/m32r/kernel/io_oaks32r.c b/arch/m32r/kernel/io_oaks32r.c index 8be323931e4a..910dd131c227 100644 --- a/arch/m32r/kernel/io_oaks32r.c +++ b/arch/m32r/kernel/io_oaks32r.c | |||
@@ -16,7 +16,7 @@ | |||
16 | 16 | ||
17 | static inline void *_port2addr(unsigned long port) | 17 | static inline void *_port2addr(unsigned long port) |
18 | { | 18 | { |
19 | return (void *)(port | (NONCACHE_OFFSET)); | 19 | return (void *)(port | NONCACHE_OFFSET); |
20 | } | 20 | } |
21 | 21 | ||
22 | static inline void *_port2addr_ne(unsigned long port) | 22 | static inline void *_port2addr_ne(unsigned long port) |
diff --git a/arch/m32r/kernel/io_opsput.c b/arch/m32r/kernel/io_opsput.c index 4793bd18e115..bec69297db3c 100644 --- a/arch/m32r/kernel/io_opsput.c +++ b/arch/m32r/kernel/io_opsput.c | |||
@@ -36,7 +36,7 @@ extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int); | |||
36 | 36 | ||
37 | static inline void *_port2addr(unsigned long port) | 37 | static inline void *_port2addr(unsigned long port) |
38 | { | 38 | { |
39 | return (void *)(port | (NONCACHE_OFFSET)); | 39 | return (void *)(port | NONCACHE_OFFSET); |
40 | } | 40 | } |
41 | 41 | ||
42 | /* | 42 | /* |
@@ -44,8 +44,8 @@ static inline void *_port2addr(unsigned long port) | |||
44 | * from 0x10000000 to 0x13ffffff on physical address. | 44 | * from 0x10000000 to 0x13ffffff on physical address. |
45 | * The base address of LAN controller(LAN91C111) is 0x300. | 45 | * The base address of LAN controller(LAN91C111) is 0x300. |
46 | */ | 46 | */ |
47 | #define LAN_IOSTART 0xa0000300 | 47 | #define LAN_IOSTART (0x300 | NONCACHE_OFFSET) |
48 | #define LAN_IOEND 0xa0000320 | 48 | #define LAN_IOEND (0x320 | NONCACHE_OFFSET) |
49 | static inline void *_port2addr_ne(unsigned long port) | 49 | static inline void *_port2addr_ne(unsigned long port) |
50 | { | 50 | { |
51 | return (void *)(port + 0x10000000); | 51 | return (void *)(port + 0x10000000); |
diff --git a/arch/m32r/kernel/setup.c b/arch/m32r/kernel/setup.c index f722ec8eb021..c2e4dccf0112 100644 --- a/arch/m32r/kernel/setup.c +++ b/arch/m32r/kernel/setup.c | |||
@@ -320,6 +320,9 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
320 | #elif defined(CONFIG_CHIP_MP) | 320 | #elif defined(CONFIG_CHIP_MP) |
321 | seq_printf(m, "cpu family\t: M32R-MP\n" | 321 | seq_printf(m, "cpu family\t: M32R-MP\n" |
322 | "cache size\t: I-xxKB/D-xxKB\n"); | 322 | "cache size\t: I-xxKB/D-xxKB\n"); |
323 | #elif defined(CONFIG_CHIP_M32104) | ||
324 | seq_printf(m,"cpu family\t: M32104\n" | ||
325 | "cache size\t: I-8KB/D-8KB\n"); | ||
323 | #else | 326 | #else |
324 | seq_printf(m, "cpu family\t: Unknown\n"); | 327 | seq_printf(m, "cpu family\t: Unknown\n"); |
325 | #endif | 328 | #endif |
@@ -340,6 +343,8 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
340 | seq_printf(m, "Machine\t\t: uServer\n"); | 343 | seq_printf(m, "Machine\t\t: uServer\n"); |
341 | #elif defined(CONFIG_PLAT_OAKS32R) | 344 | #elif defined(CONFIG_PLAT_OAKS32R) |
342 | seq_printf(m, "Machine\t\t: OAKS32R\n"); | 345 | seq_printf(m, "Machine\t\t: OAKS32R\n"); |
346 | #elif defined(CONFIG_PLAT_M32104UT) | ||
347 | seq_printf(m, "Machine\t\t: M3T-M32104UT uT Engine board\n"); | ||
343 | #else | 348 | #else |
344 | seq_printf(m, "Machine\t\t: Unknown\n"); | 349 | seq_printf(m, "Machine\t\t: Unknown\n"); |
345 | #endif | 350 | #endif |
@@ -389,7 +394,7 @@ unsigned long cpu_initialized __initdata = 0; | |||
389 | */ | 394 | */ |
390 | #if defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \ | 395 | #if defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \ |
391 | || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \ | 396 | || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \ |
392 | || defined(CONFIG_CHIP_OPSP) | 397 | || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) |
393 | void __init cpu_init (void) | 398 | void __init cpu_init (void) |
394 | { | 399 | { |
395 | int cpu_id = smp_processor_id(); | 400 | int cpu_id = smp_processor_id(); |
diff --git a/arch/m32r/kernel/setup_m32104ut.c b/arch/m32r/kernel/setup_m32104ut.c new file mode 100644 index 000000000000..6328e1357a80 --- /dev/null +++ b/arch/m32r/kernel/setup_m32104ut.c | |||
@@ -0,0 +1,156 @@ | |||
1 | /* | ||
2 | * linux/arch/m32r/kernel/setup_m32104ut.c | ||
3 | * | ||
4 | * Setup routines for M32104UT Board | ||
5 | * | ||
6 | * Copyright (c) 2002-2005 Hiroyuki Kondo, Hirokazu Takata, | ||
7 | * Hitoshi Yamamoto, Mamoru Sakugawa, | ||
8 | * Naoto Sugai, Hayato Fujiwara | ||
9 | */ | ||
10 | |||
11 | #include <linux/config.h> | ||
12 | #include <linux/irq.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/device.h> | ||
16 | |||
17 | #include <asm/system.h> | ||
18 | #include <asm/m32r.h> | ||
19 | #include <asm/io.h> | ||
20 | |||
21 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) | ||
22 | |||
23 | icu_data_t icu_data[NR_IRQS]; | ||
24 | |||
25 | static void disable_m32104ut_irq(unsigned int irq) | ||
26 | { | ||
27 | unsigned long port, data; | ||
28 | |||
29 | port = irq2port(irq); | ||
30 | data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; | ||
31 | outl(data, port); | ||
32 | } | ||
33 | |||
34 | static void enable_m32104ut_irq(unsigned int irq) | ||
35 | { | ||
36 | unsigned long port, data; | ||
37 | |||
38 | port = irq2port(irq); | ||
39 | data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; | ||
40 | outl(data, port); | ||
41 | } | ||
42 | |||
43 | static void mask_and_ack_m32104ut(unsigned int irq) | ||
44 | { | ||
45 | disable_m32104ut_irq(irq); | ||
46 | } | ||
47 | |||
48 | static void end_m32104ut_irq(unsigned int irq) | ||
49 | { | ||
50 | enable_m32104ut_irq(irq); | ||
51 | } | ||
52 | |||
53 | static unsigned int startup_m32104ut_irq(unsigned int irq) | ||
54 | { | ||
55 | enable_m32104ut_irq(irq); | ||
56 | return (0); | ||
57 | } | ||
58 | |||
59 | static void shutdown_m32104ut_irq(unsigned int irq) | ||
60 | { | ||
61 | unsigned long port; | ||
62 | |||
63 | port = irq2port(irq); | ||
64 | outl(M32R_ICUCR_ILEVEL7, port); | ||
65 | } | ||
66 | |||
67 | static struct hw_interrupt_type m32104ut_irq_type = | ||
68 | { | ||
69 | .typename = "M32104UT-IRQ", | ||
70 | .startup = startup_m32104ut_irq, | ||
71 | .shutdown = shutdown_m32104ut_irq, | ||
72 | .enable = enable_m32104ut_irq, | ||
73 | .disable = disable_m32104ut_irq, | ||
74 | .ack = mask_and_ack_m32104ut, | ||
75 | .end = end_m32104ut_irq | ||
76 | }; | ||
77 | |||
78 | void __init init_IRQ(void) | ||
79 | { | ||
80 | static int once = 0; | ||
81 | |||
82 | if (once) | ||
83 | return; | ||
84 | else | ||
85 | once++; | ||
86 | |||
87 | #if defined(CONFIG_SMC91X) | ||
88 | /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/ | ||
89 | irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; | ||
90 | irq_desc[M32R_IRQ_INT0].handler = &m32104ut_irq_type; | ||
91 | irq_desc[M32R_IRQ_INT0].action = 0; | ||
92 | irq_desc[M32R_IRQ_INT0].depth = 1; | ||
93 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; /* "H" level sense */ | ||
94 | disable_m32104ut_irq(M32R_IRQ_INT0); | ||
95 | #endif /* CONFIG_SMC91X */ | ||
96 | |||
97 | /* MFT2 : system timer */ | ||
98 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; | ||
99 | irq_desc[M32R_IRQ_MFT2].handler = &m32104ut_irq_type; | ||
100 | irq_desc[M32R_IRQ_MFT2].action = 0; | ||
101 | irq_desc[M32R_IRQ_MFT2].depth = 1; | ||
102 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | ||
103 | disable_m32104ut_irq(M32R_IRQ_MFT2); | ||
104 | |||
105 | #ifdef CONFIG_SERIAL_M32R_SIO | ||
106 | /* SIO0_R : uart receive data */ | ||
107 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; | ||
108 | irq_desc[M32R_IRQ_SIO0_R].handler = &m32104ut_irq_type; | ||
109 | irq_desc[M32R_IRQ_SIO0_R].action = 0; | ||
110 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; | ||
111 | icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN; | ||
112 | disable_m32104ut_irq(M32R_IRQ_SIO0_R); | ||
113 | |||
114 | /* SIO0_S : uart send data */ | ||
115 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; | ||
116 | irq_desc[M32R_IRQ_SIO0_S].handler = &m32104ut_irq_type; | ||
117 | irq_desc[M32R_IRQ_SIO0_S].action = 0; | ||
118 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; | ||
119 | icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN; | ||
120 | disable_m32104ut_irq(M32R_IRQ_SIO0_S); | ||
121 | #endif /* CONFIG_SERIAL_M32R_SIO */ | ||
122 | } | ||
123 | |||
124 | #if defined(CONFIG_SMC91X) | ||
125 | |||
126 | #define LAN_IOSTART 0x300 | ||
127 | #define LAN_IOEND 0x320 | ||
128 | static struct resource smc91x_resources[] = { | ||
129 | [0] = { | ||
130 | .start = (LAN_IOSTART), | ||
131 | .end = (LAN_IOEND), | ||
132 | .flags = IORESOURCE_MEM, | ||
133 | }, | ||
134 | [1] = { | ||
135 | .start = M32R_IRQ_INT0, | ||
136 | .end = M32R_IRQ_INT0, | ||
137 | .flags = IORESOURCE_IRQ, | ||
138 | } | ||
139 | }; | ||
140 | |||
141 | static struct platform_device smc91x_device = { | ||
142 | .name = "smc91x", | ||
143 | .id = 0, | ||
144 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
145 | .resource = smc91x_resources, | ||
146 | }; | ||
147 | #endif | ||
148 | |||
149 | static int __init platform_init(void) | ||
150 | { | ||
151 | #if defined(CONFIG_SMC91X) | ||
152 | platform_device_register(&smc91x_device); | ||
153 | #endif | ||
154 | return 0; | ||
155 | } | ||
156 | arch_initcall(platform_init); | ||
diff --git a/arch/m32r/kernel/setup_m32700ut.c b/arch/m32r/kernel/setup_m32700ut.c index cb76916b014d..fad1fc99bb27 100644 --- a/arch/m32r/kernel/setup_m32700ut.c +++ b/arch/m32r/kernel/setup_m32700ut.c | |||
@@ -26,15 +26,7 @@ | |||
26 | */ | 26 | */ |
27 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) | 27 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) |
28 | 28 | ||
29 | #ifndef CONFIG_SMP | ||
30 | typedef struct { | ||
31 | unsigned long icucr; /* ICU Control Register */ | ||
32 | } icu_data_t; | ||
33 | static icu_data_t icu_data[M32700UT_NUM_CPU_IRQ]; | ||
34 | #else | ||
35 | icu_data_t icu_data[M32700UT_NUM_CPU_IRQ]; | 29 | icu_data_t icu_data[M32700UT_NUM_CPU_IRQ]; |
36 | #endif /* CONFIG_SMP */ | ||
37 | |||
38 | 30 | ||
39 | static void disable_m32700ut_irq(unsigned int irq) | 31 | static void disable_m32700ut_irq(unsigned int irq) |
40 | { | 32 | { |
diff --git a/arch/m32r/kernel/setup_mappi.c b/arch/m32r/kernel/setup_mappi.c index 501d798cf050..00f253209cb3 100644 --- a/arch/m32r/kernel/setup_mappi.c +++ b/arch/m32r/kernel/setup_mappi.c | |||
@@ -19,12 +19,6 @@ | |||
19 | 19 | ||
20 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) | 20 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) |
21 | 21 | ||
22 | #ifndef CONFIG_SMP | ||
23 | typedef struct { | ||
24 | unsigned long icucr; /* ICU Control Register */ | ||
25 | } icu_data_t; | ||
26 | #endif /* CONFIG_SMP */ | ||
27 | |||
28 | icu_data_t icu_data[NR_IRQS]; | 22 | icu_data_t icu_data[NR_IRQS]; |
29 | 23 | ||
30 | static void disable_mappi_irq(unsigned int irq) | 24 | static void disable_mappi_irq(unsigned int irq) |
diff --git a/arch/m32r/kernel/setup_mappi2.c b/arch/m32r/kernel/setup_mappi2.c index 7f2db5bfd626..eebc9d8b4e72 100644 --- a/arch/m32r/kernel/setup_mappi2.c +++ b/arch/m32r/kernel/setup_mappi2.c | |||
@@ -19,12 +19,6 @@ | |||
19 | 19 | ||
20 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) | 20 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) |
21 | 21 | ||
22 | #ifndef CONFIG_SMP | ||
23 | typedef struct { | ||
24 | unsigned long icucr; /* ICU Control Register */ | ||
25 | } icu_data_t; | ||
26 | #endif /* CONFIG_SMP */ | ||
27 | |||
28 | icu_data_t icu_data[NR_IRQS]; | 22 | icu_data_t icu_data[NR_IRQS]; |
29 | 23 | ||
30 | static void disable_mappi2_irq(unsigned int irq) | 24 | static void disable_mappi2_irq(unsigned int irq) |
diff --git a/arch/m32r/kernel/setup_mappi3.c b/arch/m32r/kernel/setup_mappi3.c index f6ecdf7f555c..d2ff021e2d3d 100644 --- a/arch/m32r/kernel/setup_mappi3.c +++ b/arch/m32r/kernel/setup_mappi3.c | |||
@@ -19,12 +19,6 @@ | |||
19 | 19 | ||
20 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) | 20 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) |
21 | 21 | ||
22 | #ifndef CONFIG_SMP | ||
23 | typedef struct { | ||
24 | unsigned long icucr; /* ICU Control Register */ | ||
25 | } icu_data_t; | ||
26 | #endif /* CONFIG_SMP */ | ||
27 | |||
28 | icu_data_t icu_data[NR_IRQS]; | 22 | icu_data_t icu_data[NR_IRQS]; |
29 | 23 | ||
30 | static void disable_mappi3_irq(unsigned int irq) | 24 | static void disable_mappi3_irq(unsigned int irq) |
diff --git a/arch/m32r/kernel/setup_oaks32r.c b/arch/m32r/kernel/setup_oaks32r.c index 45add5b76f19..0e9e63538c0f 100644 --- a/arch/m32r/kernel/setup_oaks32r.c +++ b/arch/m32r/kernel/setup_oaks32r.c | |||
@@ -18,12 +18,6 @@ | |||
18 | 18 | ||
19 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) | 19 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) |
20 | 20 | ||
21 | #ifndef CONFIG_SMP | ||
22 | typedef struct { | ||
23 | unsigned long icucr; /* ICU Control Register */ | ||
24 | } icu_data_t; | ||
25 | #endif /* CONFIG_SMP */ | ||
26 | |||
27 | icu_data_t icu_data[NR_IRQS]; | 21 | icu_data_t icu_data[NR_IRQS]; |
28 | 22 | ||
29 | static void disable_oaks32r_irq(unsigned int irq) | 23 | static void disable_oaks32r_irq(unsigned int irq) |
diff --git a/arch/m32r/kernel/setup_opsput.c b/arch/m32r/kernel/setup_opsput.c index 1fbb140854e7..548e8fc7949b 100644 --- a/arch/m32r/kernel/setup_opsput.c +++ b/arch/m32r/kernel/setup_opsput.c | |||
@@ -27,15 +27,7 @@ | |||
27 | */ | 27 | */ |
28 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) | 28 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) |
29 | 29 | ||
30 | #ifndef CONFIG_SMP | ||
31 | typedef struct { | ||
32 | unsigned long icucr; /* ICU Control Register */ | ||
33 | } icu_data_t; | ||
34 | static icu_data_t icu_data[OPSPUT_NUM_CPU_IRQ]; | ||
35 | #else | ||
36 | icu_data_t icu_data[OPSPUT_NUM_CPU_IRQ]; | 30 | icu_data_t icu_data[OPSPUT_NUM_CPU_IRQ]; |
37 | #endif /* CONFIG_SMP */ | ||
38 | |||
39 | 31 | ||
40 | static void disable_opsput_irq(unsigned int irq) | 32 | static void disable_opsput_irq(unsigned int irq) |
41 | { | 33 | { |
diff --git a/arch/m32r/kernel/setup_usrv.c b/arch/m32r/kernel/setup_usrv.c index 634741bf9d35..64be659a23e7 100644 --- a/arch/m32r/kernel/setup_usrv.c +++ b/arch/m32r/kernel/setup_usrv.c | |||
@@ -18,12 +18,6 @@ | |||
18 | 18 | ||
19 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) | 19 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) |
20 | 20 | ||
21 | #if !defined(CONFIG_SMP) | ||
22 | typedef struct { | ||
23 | unsigned long icucr; /* ICU Control Register */ | ||
24 | } icu_data_t; | ||
25 | #endif /* CONFIG_SMP */ | ||
26 | |||
27 | icu_data_t icu_data[M32700UT_NUM_CPU_IRQ]; | 21 | icu_data_t icu_data[M32700UT_NUM_CPU_IRQ]; |
28 | 22 | ||
29 | static void disable_mappi_irq(unsigned int irq) | 23 | static void disable_mappi_irq(unsigned int irq) |
diff --git a/arch/m32r/kernel/time.c b/arch/m32r/kernel/time.c index 2ebce2063fea..b8e68b542302 100644 --- a/arch/m32r/kernel/time.c +++ b/arch/m32r/kernel/time.c | |||
@@ -57,7 +57,7 @@ static unsigned long do_gettimeoffset(void) | |||
57 | 57 | ||
58 | #if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \ | 58 | #if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \ |
59 | || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \ | 59 | || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \ |
60 | || defined(CONFIG_CHIP_OPSP) | 60 | || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) |
61 | #ifndef CONFIG_SMP | 61 | #ifndef CONFIG_SMP |
62 | 62 | ||
63 | unsigned long count; | 63 | unsigned long count; |
@@ -268,7 +268,7 @@ void __init time_init(void) | |||
268 | 268 | ||
269 | #if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \ | 269 | #if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \ |
270 | || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \ | 270 | || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \ |
271 | || defined(CONFIG_CHIP_OPSP) | 271 | || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) |
272 | 272 | ||
273 | /* M32102 MFT setup */ | 273 | /* M32102 MFT setup */ |
274 | setup_irq(M32R_IRQ_MFT2, &irq0); | 274 | setup_irq(M32R_IRQ_MFT2, &irq0); |