9 files changed, 76 insertions, 76 deletions

diff --git a/arch/m32r/kernel/irq.c b/arch/m32r/kernel/irq.c
index a4634b06f675..3841861df6a2 100644
--- a/arch/m32r/kernel/irq.c
+++ b/arch/m32r/kernel/irq.c
@@ -54,7 +54,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 for_each_online_cpu(j)
                         seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 #endif
-                seq_printf(p, " %14s", irq_desc[i].handler->typename);
+                seq_printf(p, " %14s", irq_desc[i].chip->typename);
                 seq_printf(p, "  %s", action->name);
 
                 for (action=action->next; action; action = action->next)
diff --git a/arch/m32r/kernel/setup_m32104ut.c b/arch/m32r/kernel/setup_m32104ut.c
index 6328e1357a80..f9f56c270195 100644
--- a/arch/m32r/kernel/setup_m32104ut.c
+++ b/arch/m32r/kernel/setup_m32104ut.c
@@ -87,7 +87,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SMC91X)
         /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/
         irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT0].handler = &m32104ut_irq_type;
+        irq_desc[M32R_IRQ_INT0].chip = &m32104ut_irq_type;
         irq_desc[M32R_IRQ_INT0].action = 0;
         irq_desc[M32R_IRQ_INT0].depth = 1;
         icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; /* "H" level sense */
@@ -96,7 +96,7 @@ void __init init_IRQ(void)
 
         /* MFT2 : system timer */
         irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_MFT2].handler = &m32104ut_irq_type;
+        irq_desc[M32R_IRQ_MFT2].chip = &m32104ut_irq_type;
         irq_desc[M32R_IRQ_MFT2].action = 0;
         irq_desc[M32R_IRQ_MFT2].depth = 1;
         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -105,7 +105,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_SIO
         /* SIO0_R : uart receive data */
         irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_R].handler = &m32104ut_irq_type;
+        irq_desc[M32R_IRQ_SIO0_R].chip = &m32104ut_irq_type;
         irq_desc[M32R_IRQ_SIO0_R].action = 0;
         irq_desc[M32R_IRQ_SIO0_R].depth = 1;
         icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN;
@@ -113,7 +113,7 @@ void __init init_IRQ(void)
 
         /* SIO0_S : uart send data */
         irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_S].handler = &m32104ut_irq_type;
+        irq_desc[M32R_IRQ_SIO0_S].chip = &m32104ut_irq_type;
         irq_desc[M32R_IRQ_SIO0_S].action = 0;
         irq_desc[M32R_IRQ_SIO0_S].depth = 1;
         icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN;
diff --git a/arch/m32r/kernel/setup_m32700ut.c b/arch/m32r/kernel/setup_m32700ut.c
index fad1fc99bb27..b6ab00eff580 100644
--- a/arch/m32r/kernel/setup_m32700ut.c
+++ b/arch/m32r/kernel/setup_m32700ut.c
@@ -301,7 +301,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SMC91X)
         /* INT#0: LAN controller on M32700UT-LAN (SMC91C111)*/
         irq_desc[M32700UT_LAN_IRQ_LAN].status = IRQ_DISABLED;
-        irq_desc[M32700UT_LAN_IRQ_LAN].handler = &m32700ut_lanpld_irq_type;
+        irq_desc[M32700UT_LAN_IRQ_LAN].chip = &m32700ut_lanpld_irq_type;
         irq_desc[M32700UT_LAN_IRQ_LAN].action = 0;
         irq_desc[M32700UT_LAN_IRQ_LAN].depth = 1;       /* disable nested irq */
         lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;   /* "H" edge sense */
@@ -310,7 +310,7 @@ void __init init_IRQ(void)
 
         /* MFT2 : system timer */
         irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_MFT2].handler = &m32700ut_irq_type;
+        irq_desc[M32R_IRQ_MFT2].chip = &m32700ut_irq_type;
         irq_desc[M32R_IRQ_MFT2].action = 0;
         irq_desc[M32R_IRQ_MFT2].depth = 1;
         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -318,7 +318,7 @@ void __init init_IRQ(void)
 
         /* SIO0 : receive */
         irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_R].handler = &m32700ut_irq_type;
+        irq_desc[M32R_IRQ_SIO0_R].chip = &m32700ut_irq_type;
         irq_desc[M32R_IRQ_SIO0_R].action = 0;
         irq_desc[M32R_IRQ_SIO0_R].depth = 1;
         icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -326,7 +326,7 @@ void __init init_IRQ(void)
 
         /* SIO0 : send */
         irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_S].handler = &m32700ut_irq_type;
+        irq_desc[M32R_IRQ_SIO0_S].chip = &m32700ut_irq_type;
         irq_desc[M32R_IRQ_SIO0_S].action = 0;
         irq_desc[M32R_IRQ_SIO0_S].depth = 1;
         icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -334,7 +334,7 @@ void __init init_IRQ(void)
 
         /* SIO1 : receive */
         irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_R].handler = &m32700ut_irq_type;
+        irq_desc[M32R_IRQ_SIO1_R].chip = &m32700ut_irq_type;
         irq_desc[M32R_IRQ_SIO1_R].action = 0;
         irq_desc[M32R_IRQ_SIO1_R].depth = 1;
         icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -342,7 +342,7 @@ void __init init_IRQ(void)
 
         /* SIO1 : send */
         irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_S].handler = &m32700ut_irq_type;
+        irq_desc[M32R_IRQ_SIO1_S].chip = &m32700ut_irq_type;
         irq_desc[M32R_IRQ_SIO1_S].action = 0;
         irq_desc[M32R_IRQ_SIO1_S].depth = 1;
         icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -350,7 +350,7 @@ void __init init_IRQ(void)
 
         /* DMA1 : */
         irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_DMA1].handler = &m32700ut_irq_type;
+        irq_desc[M32R_IRQ_DMA1].chip = &m32700ut_irq_type;
         irq_desc[M32R_IRQ_DMA1].action = 0;
         irq_desc[M32R_IRQ_DMA1].depth = 1;
         icu_data[M32R_IRQ_DMA1].icucr = 0;
@@ -359,7 +359,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_PLDSIO
         /* INT#1: SIO0 Receive on PLD */
         irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_SIO0_RCV].handler = &m32700ut_pld_irq_type;
+        irq_desc[PLD_IRQ_SIO0_RCV].chip = &m32700ut_pld_irq_type;
         irq_desc[PLD_IRQ_SIO0_RCV].action = 0;
         irq_desc[PLD_IRQ_SIO0_RCV].depth = 1;   /* disable nested irq */
         pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
@@ -367,7 +367,7 @@ void __init init_IRQ(void)
 
         /* INT#1: SIO0 Send on PLD */
         irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_SIO0_SND].handler = &m32700ut_pld_irq_type;
+        irq_desc[PLD_IRQ_SIO0_SND].chip = &m32700ut_pld_irq_type;
         irq_desc[PLD_IRQ_SIO0_SND].action = 0;
         irq_desc[PLD_IRQ_SIO0_SND].depth = 1;   /* disable nested irq */
         pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
@@ -376,7 +376,7 @@ void __init init_IRQ(void)
 
         /* INT#1: CFC IREQ on PLD */
         irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFIREQ].handler = &m32700ut_pld_irq_type;
+        irq_desc[PLD_IRQ_CFIREQ].chip = &m32700ut_pld_irq_type;
         irq_desc[PLD_IRQ_CFIREQ].action = 0;
         irq_desc[PLD_IRQ_CFIREQ].depth = 1;     /* disable nested irq */
         pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;       /* 'L' level sense */
@@ -384,7 +384,7 @@ void __init init_IRQ(void)
 
         /* INT#1: CFC Insert on PLD */
         irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFC_INSERT].handler = &m32700ut_pld_irq_type;
+        irq_desc[PLD_IRQ_CFC_INSERT].chip = &m32700ut_pld_irq_type;
         irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
         irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
         pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00;   /* 'L' edge sense */
@@ -392,7 +392,7 @@ void __init init_IRQ(void)
 
         /* INT#1: CFC Eject on PLD */
         irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFC_EJECT].handler = &m32700ut_pld_irq_type;
+        irq_desc[PLD_IRQ_CFC_EJECT].chip = &m32700ut_pld_irq_type;
         irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
         irq_desc[PLD_IRQ_CFC_EJECT].depth = 1;  /* disable nested irq */
         pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;    /* 'H' edge sense */
@@ -416,7 +416,7 @@ void __init init_IRQ(void)
         outw(USBCR_OTGS, USBCR);        /* USBCR: non-OTG */
 
     irq_desc[M32700UT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED;
-    irq_desc[M32700UT_LCD_IRQ_USB_INT1].handler = &m32700ut_lcdpld_irq_type;
+    irq_desc[M32700UT_LCD_IRQ_USB_INT1].chip = &m32700ut_lcdpld_irq_type;
     irq_desc[M32700UT_LCD_IRQ_USB_INT1].action = 0;
     irq_desc[M32700UT_LCD_IRQ_USB_INT1].depth = 1;
     lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;  /* "L" level sense */
@@ -434,7 +434,7 @@ void __init init_IRQ(void)
          * INT3# is used for AR
          */
         irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT3].handler = &m32700ut_irq_type;
+        irq_desc[M32R_IRQ_INT3].chip = &m32700ut_irq_type;
         irq_desc[M32R_IRQ_INT3].action = 0;
         irq_desc[M32R_IRQ_INT3].depth = 1;
         icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
diff --git a/arch/m32r/kernel/setup_mappi.c b/arch/m32r/kernel/setup_mappi.c
index 00f253209cb3..c268044185f5 100644
--- a/arch/m32r/kernel/setup_mappi.c
+++ b/arch/m32r/kernel/setup_mappi.c
@@ -86,7 +86,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_NE2000
         /* INT0 : LAN controller (RTL8019AS) */
         irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT0].handler = &mappi_irq_type;
+        irq_desc[M32R_IRQ_INT0].chip = &mappi_irq_type;
         irq_desc[M32R_IRQ_INT0].action = 0;
         irq_desc[M32R_IRQ_INT0].depth = 1;
         icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@ -95,7 +95,7 @@ void __init init_IRQ(void)
 
         /* MFT2 : system timer */
         irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_MFT2].handler = &mappi_irq_type;
+        irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
         irq_desc[M32R_IRQ_MFT2].action = 0;
         irq_desc[M32R_IRQ_MFT2].depth = 1;
         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -104,7 +104,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_SIO
         /* SIO0_R : uart receive data */
         irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_R].handler = &mappi_irq_type;
+        irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
         irq_desc[M32R_IRQ_SIO0_R].action = 0;
         irq_desc[M32R_IRQ_SIO0_R].depth = 1;
         icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -112,7 +112,7 @@ void __init init_IRQ(void)
 
         /* SIO0_S : uart send data */
         irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_S].handler = &mappi_irq_type;
+        irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
         irq_desc[M32R_IRQ_SIO0_S].action = 0;
         irq_desc[M32R_IRQ_SIO0_S].depth = 1;
         icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -120,7 +120,7 @@ void __init init_IRQ(void)
 
         /* SIO1_R : uart receive data */
         irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_R].handler = &mappi_irq_type;
+        irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
         irq_desc[M32R_IRQ_SIO1_R].action = 0;
         irq_desc[M32R_IRQ_SIO1_R].depth = 1;
         icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -128,7 +128,7 @@ void __init init_IRQ(void)
 
         /* SIO1_S : uart send data */
         irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_S].handler = &mappi_irq_type;
+        irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
         irq_desc[M32R_IRQ_SIO1_S].action = 0;
         irq_desc[M32R_IRQ_SIO1_S].depth = 1;
         icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -138,7 +138,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_M32R_PCC)
         /* INT1 : pccard0 interrupt */
         irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT1].handler = &mappi_irq_type;
+        irq_desc[M32R_IRQ_INT1].chip = &mappi_irq_type;
         irq_desc[M32R_IRQ_INT1].action = 0;
         irq_desc[M32R_IRQ_INT1].depth = 1;
         icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
@@ -146,7 +146,7 @@ void __init init_IRQ(void)
 
         /* INT2 : pccard1 interrupt */
         irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT2].handler = &mappi_irq_type;
+        irq_desc[M32R_IRQ_INT2].chip = &mappi_irq_type;
         irq_desc[M32R_IRQ_INT2].action = 0;
         irq_desc[M32R_IRQ_INT2].depth = 1;
         icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
diff --git a/arch/m32r/kernel/setup_mappi2.c b/arch/m32r/kernel/setup_mappi2.c
index eebc9d8b4e72..bd2327d5cca2 100644
--- a/arch/m32r/kernel/setup_mappi2.c
+++ b/arch/m32r/kernel/setup_mappi2.c
@@ -87,7 +87,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SMC91X)
         /* INT0 : LAN controller (SMC91111) */
         irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT0].handler = &mappi2_irq_type;
+        irq_desc[M32R_IRQ_INT0].chip = &mappi2_irq_type;
         irq_desc[M32R_IRQ_INT0].action = 0;
         irq_desc[M32R_IRQ_INT0].depth = 1;
         icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@ -96,7 +96,7 @@ void __init init_IRQ(void)
 
         /* MFT2 : system timer */
         irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_MFT2].handler = &mappi2_irq_type;
+        irq_desc[M32R_IRQ_MFT2].chip = &mappi2_irq_type;
         irq_desc[M32R_IRQ_MFT2].action = 0;
         irq_desc[M32R_IRQ_MFT2].depth = 1;
         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -105,7 +105,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_SIO
         /* SIO0_R : uart receive data */
         irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_R].handler = &mappi2_irq_type;
+        irq_desc[M32R_IRQ_SIO0_R].chip = &mappi2_irq_type;
         irq_desc[M32R_IRQ_SIO0_R].action = 0;
         irq_desc[M32R_IRQ_SIO0_R].depth = 1;
         icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -113,14 +113,14 @@ void __init init_IRQ(void)
 
         /* SIO0_S : uart send data */
         irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_S].handler = &mappi2_irq_type;
+        irq_desc[M32R_IRQ_SIO0_S].chip = &mappi2_irq_type;
         irq_desc[M32R_IRQ_SIO0_S].action = 0;
         irq_desc[M32R_IRQ_SIO0_S].depth = 1;
         icu_data[M32R_IRQ_SIO0_S].icucr = 0;
         disable_mappi2_irq(M32R_IRQ_SIO0_S);
         /* SIO1_R : uart receive data */
         irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_R].handler = &mappi2_irq_type;
+        irq_desc[M32R_IRQ_SIO1_R].chip = &mappi2_irq_type;
         irq_desc[M32R_IRQ_SIO1_R].action = 0;
         irq_desc[M32R_IRQ_SIO1_R].depth = 1;
         icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -128,7 +128,7 @@ void __init init_IRQ(void)
 
         /* SIO1_S : uart send data */
         irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_S].handler = &mappi2_irq_type;
+        irq_desc[M32R_IRQ_SIO1_S].chip = &mappi2_irq_type;
         irq_desc[M32R_IRQ_SIO1_S].action = 0;
         irq_desc[M32R_IRQ_SIO1_S].depth = 1;
         icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -138,7 +138,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_USB)
         /* INT1 : USB Host controller interrupt */
         irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT1].handler = &mappi2_irq_type;
+        irq_desc[M32R_IRQ_INT1].chip = &mappi2_irq_type;
         irq_desc[M32R_IRQ_INT1].action = 0;
         irq_desc[M32R_IRQ_INT1].depth = 1;
         icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
@@ -147,7 +147,7 @@ void __init init_IRQ(void)
 
         /* ICUCR40: CFC IREQ */
         irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFIREQ].handler = &mappi2_irq_type;
+        irq_desc[PLD_IRQ_CFIREQ].chip = &mappi2_irq_type;
         irq_desc[PLD_IRQ_CFIREQ].action = 0;
         irq_desc[PLD_IRQ_CFIREQ].depth = 1;     /* disable nested irq */
         icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
@@ -156,7 +156,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_M32R_CFC)
         /* ICUCR41: CFC Insert */
         irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFC_INSERT].handler = &mappi2_irq_type;
+        irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi2_irq_type;
         irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
         irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
         icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
@@ -164,7 +164,7 @@ void __init init_IRQ(void)
 
         /* ICUCR42: CFC Eject */
         irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFC_EJECT].handler = &mappi2_irq_type;
+        irq_desc[PLD_IRQ_CFC_EJECT].chip = &mappi2_irq_type;
         irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
         irq_desc[PLD_IRQ_CFC_EJECT].depth = 1;  /* disable nested irq */
         icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
diff --git a/arch/m32r/kernel/setup_mappi3.c b/arch/m32r/kernel/setup_mappi3.c
index d2ff021e2d3d..014b51d17505 100644
--- a/arch/m32r/kernel/setup_mappi3.c
+++ b/arch/m32r/kernel/setup_mappi3.c
@@ -87,7 +87,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SMC91X)
         /* INT0 : LAN controller (SMC91111) */
         irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT0].handler = &mappi3_irq_type;
+        irq_desc[M32R_IRQ_INT0].chip = &mappi3_irq_type;
         irq_desc[M32R_IRQ_INT0].action = 0;
         irq_desc[M32R_IRQ_INT0].depth = 1;
         icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@ -96,7 +96,7 @@ void __init init_IRQ(void)
 
         /* MFT2 : system timer */
         irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_MFT2].handler = &mappi3_irq_type;
+        irq_desc[M32R_IRQ_MFT2].chip = &mappi3_irq_type;
         irq_desc[M32R_IRQ_MFT2].action = 0;
         irq_desc[M32R_IRQ_MFT2].depth = 1;
         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -105,7 +105,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_SIO
         /* SIO0_R : uart receive data */
         irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_R].handler = &mappi3_irq_type;
+        irq_desc[M32R_IRQ_SIO0_R].chip = &mappi3_irq_type;
         irq_desc[M32R_IRQ_SIO0_R].action = 0;
         irq_desc[M32R_IRQ_SIO0_R].depth = 1;
         icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -113,14 +113,14 @@ void __init init_IRQ(void)
 
         /* SIO0_S : uart send data */
         irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_S].handler = &mappi3_irq_type;
+        irq_desc[M32R_IRQ_SIO0_S].chip = &mappi3_irq_type;
         irq_desc[M32R_IRQ_SIO0_S].action = 0;
         irq_desc[M32R_IRQ_SIO0_S].depth = 1;
         icu_data[M32R_IRQ_SIO0_S].icucr = 0;
         disable_mappi3_irq(M32R_IRQ_SIO0_S);
         /* SIO1_R : uart receive data */
         irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_R].handler = &mappi3_irq_type;
+        irq_desc[M32R_IRQ_SIO1_R].chip = &mappi3_irq_type;
         irq_desc[M32R_IRQ_SIO1_R].action = 0;
         irq_desc[M32R_IRQ_SIO1_R].depth = 1;
         icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -128,7 +128,7 @@ void __init init_IRQ(void)
 
         /* SIO1_S : uart send data */
         irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_S].handler = &mappi3_irq_type;
+        irq_desc[M32R_IRQ_SIO1_S].chip = &mappi3_irq_type;
         irq_desc[M32R_IRQ_SIO1_S].action = 0;
         irq_desc[M32R_IRQ_SIO1_S].depth = 1;
         icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -138,7 +138,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_USB)
         /* INT1 : USB Host controller interrupt */
         irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT1].handler = &mappi3_irq_type;
+        irq_desc[M32R_IRQ_INT1].chip = &mappi3_irq_type;
         irq_desc[M32R_IRQ_INT1].action = 0;
         irq_desc[M32R_IRQ_INT1].depth = 1;
         icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
@@ -147,7 +147,7 @@ void __init init_IRQ(void)
 
         /* CFC IREQ */
         irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFIREQ].handler = &mappi3_irq_type;
+        irq_desc[PLD_IRQ_CFIREQ].chip = &mappi3_irq_type;
         irq_desc[PLD_IRQ_CFIREQ].action = 0;
         irq_desc[PLD_IRQ_CFIREQ].depth = 1;     /* disable nested irq */
         icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
@@ -156,7 +156,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_M32R_CFC)
         /* ICUCR41: CFC Insert & eject */
         irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFC_INSERT].handler = &mappi3_irq_type;
+        irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi3_irq_type;
         irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
         irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
         icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
@@ -166,7 +166,7 @@ void __init init_IRQ(void)
 
         /* IDE IREQ */
         irq_desc[PLD_IRQ_IDEIREQ].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_IDEIREQ].handler = &mappi3_irq_type;
+        irq_desc[PLD_IRQ_IDEIREQ].chip = &mappi3_irq_type;
         irq_desc[PLD_IRQ_IDEIREQ].action = 0;
         irq_desc[PLD_IRQ_IDEIREQ].depth = 1;    /* disable nested irq */
         icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
diff --git a/arch/m32r/kernel/setup_oaks32r.c b/arch/m32r/kernel/setup_oaks32r.c
index 0e9e63538c0f..ea64831aef7a 100644
--- a/arch/m32r/kernel/setup_oaks32r.c
+++ b/arch/m32r/kernel/setup_oaks32r.c
@@ -85,7 +85,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_NE2000
         /* INT3 : LAN controller (RTL8019AS) */
         irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT3].handler = &oaks32r_irq_type;
+        irq_desc[M32R_IRQ_INT3].chip = &oaks32r_irq_type;
         irq_desc[M32R_IRQ_INT3].action = 0;
         irq_desc[M32R_IRQ_INT3].depth = 1;
         icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@ -94,7 +94,7 @@ void __init init_IRQ(void)
 
         /* MFT2 : system timer */
         irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_MFT2].handler = &oaks32r_irq_type;
+        irq_desc[M32R_IRQ_MFT2].chip = &oaks32r_irq_type;
         irq_desc[M32R_IRQ_MFT2].action = 0;
         irq_desc[M32R_IRQ_MFT2].depth = 1;
         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -103,7 +103,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_SIO
         /* SIO0_R : uart receive data */
         irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_R].handler = &oaks32r_irq_type;
+        irq_desc[M32R_IRQ_SIO0_R].chip = &oaks32r_irq_type;
         irq_desc[M32R_IRQ_SIO0_R].action = 0;
         irq_desc[M32R_IRQ_SIO0_R].depth = 1;
         icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -111,7 +111,7 @@ void __init init_IRQ(void)
 
         /* SIO0_S : uart send data */
         irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_S].handler = &oaks32r_irq_type;
+        irq_desc[M32R_IRQ_SIO0_S].chip = &oaks32r_irq_type;
         irq_desc[M32R_IRQ_SIO0_S].action = 0;
         irq_desc[M32R_IRQ_SIO0_S].depth = 1;
         icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -119,7 +119,7 @@ void __init init_IRQ(void)
 
         /* SIO1_R : uart receive data */
         irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_R].handler = &oaks32r_irq_type;
+        irq_desc[M32R_IRQ_SIO1_R].chip = &oaks32r_irq_type;
         irq_desc[M32R_IRQ_SIO1_R].action = 0;
         irq_desc[M32R_IRQ_SIO1_R].depth = 1;
         icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -127,7 +127,7 @@ void __init init_IRQ(void)
 
         /* SIO1_S : uart send data */
         irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_S].handler = &oaks32r_irq_type;
+        irq_desc[M32R_IRQ_SIO1_S].chip = &oaks32r_irq_type;
         irq_desc[M32R_IRQ_SIO1_S].action = 0;
         irq_desc[M32R_IRQ_SIO1_S].depth = 1;
         icu_data[M32R_IRQ_SIO1_S].icucr = 0;
diff --git a/arch/m32r/kernel/setup_opsput.c b/arch/m32r/kernel/setup_opsput.c
index 548e8fc7949b..55e8972d455a 100644
--- a/arch/m32r/kernel/setup_opsput.c
+++ b/arch/m32r/kernel/setup_opsput.c
@@ -302,7 +302,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SMC91X)
         /* INT#0: LAN controller on OPSPUT-LAN (SMC91C111)*/
         irq_desc[OPSPUT_LAN_IRQ_LAN].status = IRQ_DISABLED;
-        irq_desc[OPSPUT_LAN_IRQ_LAN].handler = &opsput_lanpld_irq_type;
+        irq_desc[OPSPUT_LAN_IRQ_LAN].chip = &opsput_lanpld_irq_type;
         irq_desc[OPSPUT_LAN_IRQ_LAN].action = 0;
         irq_desc[OPSPUT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */
         lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;     /* "H" edge sense */
@@ -311,7 +311,7 @@ void __init init_IRQ(void)
 
         /* MFT2 : system timer */
         irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_MFT2].handler = &opsput_irq_type;
+        irq_desc[M32R_IRQ_MFT2].chip = &opsput_irq_type;
         irq_desc[M32R_IRQ_MFT2].action = 0;
         irq_desc[M32R_IRQ_MFT2].depth = 1;
         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -319,7 +319,7 @@ void __init init_IRQ(void)
 
         /* SIO0 : receive */
         irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_R].handler = &opsput_irq_type;
+        irq_desc[M32R_IRQ_SIO0_R].chip = &opsput_irq_type;
         irq_desc[M32R_IRQ_SIO0_R].action = 0;
         irq_desc[M32R_IRQ_SIO0_R].depth = 1;
         icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -327,7 +327,7 @@ void __init init_IRQ(void)
 
         /* SIO0 : send */
         irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_S].handler = &opsput_irq_type;
+        irq_desc[M32R_IRQ_SIO0_S].chip = &opsput_irq_type;
         irq_desc[M32R_IRQ_SIO0_S].action = 0;
         irq_desc[M32R_IRQ_SIO0_S].depth = 1;
         icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -335,7 +335,7 @@ void __init init_IRQ(void)
 
         /* SIO1 : receive */
         irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_R].handler = &opsput_irq_type;
+        irq_desc[M32R_IRQ_SIO1_R].chip = &opsput_irq_type;
         irq_desc[M32R_IRQ_SIO1_R].action = 0;
         irq_desc[M32R_IRQ_SIO1_R].depth = 1;
         icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -343,7 +343,7 @@ void __init init_IRQ(void)
 
         /* SIO1 : send */
         irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_S].handler = &opsput_irq_type;
+        irq_desc[M32R_IRQ_SIO1_S].chip = &opsput_irq_type;
         irq_desc[M32R_IRQ_SIO1_S].action = 0;
         irq_desc[M32R_IRQ_SIO1_S].depth = 1;
         icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -351,7 +351,7 @@ void __init init_IRQ(void)
 
         /* DMA1 : */
         irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_DMA1].handler = &opsput_irq_type;
+        irq_desc[M32R_IRQ_DMA1].chip = &opsput_irq_type;
         irq_desc[M32R_IRQ_DMA1].action = 0;
         irq_desc[M32R_IRQ_DMA1].depth = 1;
         icu_data[M32R_IRQ_DMA1].icucr = 0;
@@ -360,7 +360,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_PLDSIO
         /* INT#1: SIO0 Receive on PLD */
         irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_SIO0_RCV].handler = &opsput_pld_irq_type;
+        irq_desc[PLD_IRQ_SIO0_RCV].chip = &opsput_pld_irq_type;
         irq_desc[PLD_IRQ_SIO0_RCV].action = 0;
         irq_desc[PLD_IRQ_SIO0_RCV].depth = 1;   /* disable nested irq */
         pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
@@ -368,7 +368,7 @@ void __init init_IRQ(void)
 
         /* INT#1: SIO0 Send on PLD */
         irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_SIO0_SND].handler = &opsput_pld_irq_type;
+        irq_desc[PLD_IRQ_SIO0_SND].chip = &opsput_pld_irq_type;
         irq_desc[PLD_IRQ_SIO0_SND].action = 0;
         irq_desc[PLD_IRQ_SIO0_SND].depth = 1;   /* disable nested irq */
         pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
@@ -378,7 +378,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_M32R_CFC)
         /* INT#1: CFC IREQ on PLD */
         irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFIREQ].handler = &opsput_pld_irq_type;
+        irq_desc[PLD_IRQ_CFIREQ].chip = &opsput_pld_irq_type;
         irq_desc[PLD_IRQ_CFIREQ].action = 0;
         irq_desc[PLD_IRQ_CFIREQ].depth = 1;     /* disable nested irq */
         pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;       /* 'L' level sense */
@@ -386,7 +386,7 @@ void __init init_IRQ(void)
 
         /* INT#1: CFC Insert on PLD */
         irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFC_INSERT].handler = &opsput_pld_irq_type;
+        irq_desc[PLD_IRQ_CFC_INSERT].chip = &opsput_pld_irq_type;
         irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
         irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
         pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00;   /* 'L' edge sense */
@@ -394,7 +394,7 @@ void __init init_IRQ(void)
 
         /* INT#1: CFC Eject on PLD */
         irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_CFC_EJECT].handler = &opsput_pld_irq_type;
+        irq_desc[PLD_IRQ_CFC_EJECT].chip = &opsput_pld_irq_type;
         irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
         irq_desc[PLD_IRQ_CFC_EJECT].depth = 1;  /* disable nested irq */
         pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;    /* 'H' edge sense */
@@ -420,7 +420,7 @@ void __init init_IRQ(void)
         outw(USBCR_OTGS, USBCR);        /* USBCR: non-OTG */
 
     irq_desc[OPSPUT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED;
-    irq_desc[OPSPUT_LCD_IRQ_USB_INT1].handler = &opsput_lcdpld_irq_type;
+    irq_desc[OPSPUT_LCD_IRQ_USB_INT1].chip = &opsput_lcdpld_irq_type;
     irq_desc[OPSPUT_LCD_IRQ_USB_INT1].action = 0;
     irq_desc[OPSPUT_LCD_IRQ_USB_INT1].depth = 1;
     lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;    /* "L" level sense */
@@ -438,7 +438,7 @@ void __init init_IRQ(void)
          * INT3# is used for AR
          */
         irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_INT3].handler = &opsput_irq_type;
+        irq_desc[M32R_IRQ_INT3].chip = &opsput_irq_type;
         irq_desc[M32R_IRQ_INT3].action = 0;
         irq_desc[M32R_IRQ_INT3].depth = 1;
         icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
diff --git a/arch/m32r/kernel/setup_usrv.c b/arch/m32r/kernel/setup_usrv.c
index 64be659a23e7..7fa12d8f66b4 100644
--- a/arch/m32r/kernel/setup_usrv.c
+++ b/arch/m32r/kernel/setup_usrv.c
@@ -158,7 +158,7 @@ void __init init_IRQ(void)
 
         /* MFT2 : system timer */
         irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_MFT2].handler = &mappi_irq_type;
+        irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
         irq_desc[M32R_IRQ_MFT2].action = 0;
         irq_desc[M32R_IRQ_MFT2].depth = 1;
         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -167,7 +167,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SERIAL_M32R_SIO)
         /* SIO0_R : uart receive data */
         irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_R].handler = &mappi_irq_type;
+        irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
         irq_desc[M32R_IRQ_SIO0_R].action = 0;
         irq_desc[M32R_IRQ_SIO0_R].depth = 1;
         icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -175,7 +175,7 @@ void __init init_IRQ(void)
 
         /* SIO0_S : uart send data */
         irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO0_S].handler = &mappi_irq_type;
+        irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
         irq_desc[M32R_IRQ_SIO0_S].action = 0;
         irq_desc[M32R_IRQ_SIO0_S].depth = 1;
         icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -183,7 +183,7 @@ void __init init_IRQ(void)
 
         /* SIO1_R : uart receive data */
         irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_R].handler = &mappi_irq_type;
+        irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
         irq_desc[M32R_IRQ_SIO1_R].action = 0;
         irq_desc[M32R_IRQ_SIO1_R].depth = 1;
         icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -191,7 +191,7 @@ void __init init_IRQ(void)
 
         /* SIO1_S : uart send data */
         irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-        irq_desc[M32R_IRQ_SIO1_S].handler = &mappi_irq_type;
+        irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
         irq_desc[M32R_IRQ_SIO1_S].action = 0;
         irq_desc[M32R_IRQ_SIO1_S].depth = 1;
         icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -201,7 +201,7 @@ void __init init_IRQ(void)
         /* INT#67-#71: CFC#0 IREQ on PLD */
         for (i = 0 ; i < CONFIG_CFC_NUM ; i++ ) {
                 irq_desc[PLD_IRQ_CF0 + i].status = IRQ_DISABLED;
-                irq_desc[PLD_IRQ_CF0 + i].handler = &m32700ut_pld_irq_type;
+                irq_desc[PLD_IRQ_CF0 + i].chip = &m32700ut_pld_irq_type;
                 irq_desc[PLD_IRQ_CF0 + i].action = 0;
                 irq_desc[PLD_IRQ_CF0 + i].depth = 1;    /* disable nested irq */
                 pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr
@@ -212,7 +212,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
         /* INT#76: 16552D#0 IREQ on PLD */
         irq_desc[PLD_IRQ_UART0].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_UART0].handler = &m32700ut_pld_irq_type;
+        irq_desc[PLD_IRQ_UART0].chip = &m32700ut_pld_irq_type;
         irq_desc[PLD_IRQ_UART0].action = 0;
         irq_desc[PLD_IRQ_UART0].depth = 1;      /* disable nested irq */
         pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr
@@ -221,7 +221,7 @@ void __init init_IRQ(void)
 
         /* INT#77: 16552D#1 IREQ on PLD */
         irq_desc[PLD_IRQ_UART1].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_UART1].handler = &m32700ut_pld_irq_type;
+        irq_desc[PLD_IRQ_UART1].chip = &m32700ut_pld_irq_type;
         irq_desc[PLD_IRQ_UART1].action = 0;
         irq_desc[PLD_IRQ_UART1].depth = 1;      /* disable nested irq */
         pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr
@@ -232,7 +232,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE)
         /* INT#80: AK4524 IREQ on PLD */
         irq_desc[PLD_IRQ_SNDINT].status = IRQ_DISABLED;
-        irq_desc[PLD_IRQ_SNDINT].handler = &m32700ut_pld_irq_type;
+        irq_desc[PLD_IRQ_SNDINT].chip = &m32700ut_pld_irq_type;
         irq_desc[PLD_IRQ_SNDINT].action = 0;
         irq_desc[PLD_IRQ_SNDINT].depth = 1;     /* disable nested irq */
         pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr