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Diffstat (limited to 'arch/m32r/kernel/setup_usrv.c')
-rw-r--r--arch/m32r/kernel/setup_usrv.c19
1 files changed, 9 insertions, 10 deletions
diff --git a/arch/m32r/kernel/setup_usrv.c b/arch/m32r/kernel/setup_usrv.c
index 64be659a23e7..f5b4b5ac31e7 100644
--- a/arch/m32r/kernel/setup_usrv.c
+++ b/arch/m32r/kernel/setup_usrv.c
@@ -7,7 +7,6 @@
7 * Hitoshi Yamamoto 7 * Hitoshi Yamamoto
8 */ 8 */
9 9
10#include <linux/config.h>
11#include <linux/irq.h> 10#include <linux/irq.h>
12#include <linux/kernel.h> 11#include <linux/kernel.h>
13#include <linux/init.h> 12#include <linux/init.h>
@@ -158,7 +157,7 @@ void __init init_IRQ(void)
158 157
159 /* MFT2 : system timer */ 158 /* MFT2 : system timer */
160 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; 159 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
161 irq_desc[M32R_IRQ_MFT2].handler = &mappi_irq_type; 160 irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
162 irq_desc[M32R_IRQ_MFT2].action = 0; 161 irq_desc[M32R_IRQ_MFT2].action = 0;
163 irq_desc[M32R_IRQ_MFT2].depth = 1; 162 irq_desc[M32R_IRQ_MFT2].depth = 1;
164 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 163 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -167,7 +166,7 @@ void __init init_IRQ(void)
167#if defined(CONFIG_SERIAL_M32R_SIO) 166#if defined(CONFIG_SERIAL_M32R_SIO)
168 /* SIO0_R : uart receive data */ 167 /* SIO0_R : uart receive data */
169 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; 168 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
170 irq_desc[M32R_IRQ_SIO0_R].handler = &mappi_irq_type; 169 irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
171 irq_desc[M32R_IRQ_SIO0_R].action = 0; 170 irq_desc[M32R_IRQ_SIO0_R].action = 0;
172 irq_desc[M32R_IRQ_SIO0_R].depth = 1; 171 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
173 icu_data[M32R_IRQ_SIO0_R].icucr = 0; 172 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -175,7 +174,7 @@ void __init init_IRQ(void)
175 174
176 /* SIO0_S : uart send data */ 175 /* SIO0_S : uart send data */
177 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; 176 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
178 irq_desc[M32R_IRQ_SIO0_S].handler = &mappi_irq_type; 177 irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
179 irq_desc[M32R_IRQ_SIO0_S].action = 0; 178 irq_desc[M32R_IRQ_SIO0_S].action = 0;
180 irq_desc[M32R_IRQ_SIO0_S].depth = 1; 179 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
181 icu_data[M32R_IRQ_SIO0_S].icucr = 0; 180 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -183,7 +182,7 @@ void __init init_IRQ(void)
183 182
184 /* SIO1_R : uart receive data */ 183 /* SIO1_R : uart receive data */
185 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; 184 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
186 irq_desc[M32R_IRQ_SIO1_R].handler = &mappi_irq_type; 185 irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
187 irq_desc[M32R_IRQ_SIO1_R].action = 0; 186 irq_desc[M32R_IRQ_SIO1_R].action = 0;
188 irq_desc[M32R_IRQ_SIO1_R].depth = 1; 187 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
189 icu_data[M32R_IRQ_SIO1_R].icucr = 0; 188 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -191,7 +190,7 @@ void __init init_IRQ(void)
191 190
192 /* SIO1_S : uart send data */ 191 /* SIO1_S : uart send data */
193 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; 192 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
194 irq_desc[M32R_IRQ_SIO1_S].handler = &mappi_irq_type; 193 irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
195 irq_desc[M32R_IRQ_SIO1_S].action = 0; 194 irq_desc[M32R_IRQ_SIO1_S].action = 0;
196 irq_desc[M32R_IRQ_SIO1_S].depth = 1; 195 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
197 icu_data[M32R_IRQ_SIO1_S].icucr = 0; 196 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -201,7 +200,7 @@ void __init init_IRQ(void)
201 /* INT#67-#71: CFC#0 IREQ on PLD */ 200 /* INT#67-#71: CFC#0 IREQ on PLD */
202 for (i = 0 ; i < CONFIG_CFC_NUM ; i++ ) { 201 for (i = 0 ; i < CONFIG_CFC_NUM ; i++ ) {
203 irq_desc[PLD_IRQ_CF0 + i].status = IRQ_DISABLED; 202 irq_desc[PLD_IRQ_CF0 + i].status = IRQ_DISABLED;
204 irq_desc[PLD_IRQ_CF0 + i].handler = &m32700ut_pld_irq_type; 203 irq_desc[PLD_IRQ_CF0 + i].chip = &m32700ut_pld_irq_type;
205 irq_desc[PLD_IRQ_CF0 + i].action = 0; 204 irq_desc[PLD_IRQ_CF0 + i].action = 0;
206 irq_desc[PLD_IRQ_CF0 + i].depth = 1; /* disable nested irq */ 205 irq_desc[PLD_IRQ_CF0 + i].depth = 1; /* disable nested irq */
207 pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr 206 pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr
@@ -212,7 +211,7 @@ void __init init_IRQ(void)
212#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) 211#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
213 /* INT#76: 16552D#0 IREQ on PLD */ 212 /* INT#76: 16552D#0 IREQ on PLD */
214 irq_desc[PLD_IRQ_UART0].status = IRQ_DISABLED; 213 irq_desc[PLD_IRQ_UART0].status = IRQ_DISABLED;
215 irq_desc[PLD_IRQ_UART0].handler = &m32700ut_pld_irq_type; 214 irq_desc[PLD_IRQ_UART0].chip = &m32700ut_pld_irq_type;
216 irq_desc[PLD_IRQ_UART0].action = 0; 215 irq_desc[PLD_IRQ_UART0].action = 0;
217 irq_desc[PLD_IRQ_UART0].depth = 1; /* disable nested irq */ 216 irq_desc[PLD_IRQ_UART0].depth = 1; /* disable nested irq */
218 pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr 217 pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr
@@ -221,7 +220,7 @@ void __init init_IRQ(void)
221 220
222 /* INT#77: 16552D#1 IREQ on PLD */ 221 /* INT#77: 16552D#1 IREQ on PLD */
223 irq_desc[PLD_IRQ_UART1].status = IRQ_DISABLED; 222 irq_desc[PLD_IRQ_UART1].status = IRQ_DISABLED;
224 irq_desc[PLD_IRQ_UART1].handler = &m32700ut_pld_irq_type; 223 irq_desc[PLD_IRQ_UART1].chip = &m32700ut_pld_irq_type;
225 irq_desc[PLD_IRQ_UART1].action = 0; 224 irq_desc[PLD_IRQ_UART1].action = 0;
226 irq_desc[PLD_IRQ_UART1].depth = 1; /* disable nested irq */ 225 irq_desc[PLD_IRQ_UART1].depth = 1; /* disable nested irq */
227 pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr 226 pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr
@@ -232,7 +231,7 @@ void __init init_IRQ(void)
232#if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE) 231#if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE)
233 /* INT#80: AK4524 IREQ on PLD */ 232 /* INT#80: AK4524 IREQ on PLD */
234 irq_desc[PLD_IRQ_SNDINT].status = IRQ_DISABLED; 233 irq_desc[PLD_IRQ_SNDINT].status = IRQ_DISABLED;
235 irq_desc[PLD_IRQ_SNDINT].handler = &m32700ut_pld_irq_type; 234 irq_desc[PLD_IRQ_SNDINT].chip = &m32700ut_pld_irq_type;
236 irq_desc[PLD_IRQ_SNDINT].action = 0; 235 irq_desc[PLD_IRQ_SNDINT].action = 0;
237 irq_desc[PLD_IRQ_SNDINT].depth = 1; /* disable nested irq */ 236 irq_desc[PLD_IRQ_SNDINT].depth = 1; /* disable nested irq */
238 pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr 237 pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr