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path: root/arch/m32r/kernel/setup_mappi2.c
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Diffstat (limited to 'arch/m32r/kernel/setup_mappi2.c')
-rw-r--r--arch/m32r/kernel/setup_mappi2.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/m32r/kernel/setup_mappi2.c b/arch/m32r/kernel/setup_mappi2.c
index eebc9d8b4e72..bd2327d5cca2 100644
--- a/arch/m32r/kernel/setup_mappi2.c
+++ b/arch/m32r/kernel/setup_mappi2.c
@@ -87,7 +87,7 @@ void __init init_IRQ(void)
87#if defined(CONFIG_SMC91X) 87#if defined(CONFIG_SMC91X)
88 /* INT0 : LAN controller (SMC91111) */ 88 /* INT0 : LAN controller (SMC91111) */
89 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; 89 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
90 irq_desc[M32R_IRQ_INT0].handler = &mappi2_irq_type; 90 irq_desc[M32R_IRQ_INT0].chip = &mappi2_irq_type;
91 irq_desc[M32R_IRQ_INT0].action = 0; 91 irq_desc[M32R_IRQ_INT0].action = 0;
92 irq_desc[M32R_IRQ_INT0].depth = 1; 92 irq_desc[M32R_IRQ_INT0].depth = 1;
93 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; 93 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@ -96,7 +96,7 @@ void __init init_IRQ(void)
96 96
97 /* MFT2 : system timer */ 97 /* MFT2 : system timer */
98 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; 98 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
99 irq_desc[M32R_IRQ_MFT2].handler = &mappi2_irq_type; 99 irq_desc[M32R_IRQ_MFT2].chip = &mappi2_irq_type;
100 irq_desc[M32R_IRQ_MFT2].action = 0; 100 irq_desc[M32R_IRQ_MFT2].action = 0;
101 irq_desc[M32R_IRQ_MFT2].depth = 1; 101 irq_desc[M32R_IRQ_MFT2].depth = 1;
102 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 102 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -105,7 +105,7 @@ void __init init_IRQ(void)
105#ifdef CONFIG_SERIAL_M32R_SIO 105#ifdef CONFIG_SERIAL_M32R_SIO
106 /* SIO0_R : uart receive data */ 106 /* SIO0_R : uart receive data */
107 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; 107 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
108 irq_desc[M32R_IRQ_SIO0_R].handler = &mappi2_irq_type; 108 irq_desc[M32R_IRQ_SIO0_R].chip = &mappi2_irq_type;
109 irq_desc[M32R_IRQ_SIO0_R].action = 0; 109 irq_desc[M32R_IRQ_SIO0_R].action = 0;
110 irq_desc[M32R_IRQ_SIO0_R].depth = 1; 110 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
111 icu_data[M32R_IRQ_SIO0_R].icucr = 0; 111 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -113,14 +113,14 @@ void __init init_IRQ(void)
113 113
114 /* SIO0_S : uart send data */ 114 /* SIO0_S : uart send data */
115 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; 115 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
116 irq_desc[M32R_IRQ_SIO0_S].handler = &mappi2_irq_type; 116 irq_desc[M32R_IRQ_SIO0_S].chip = &mappi2_irq_type;
117 irq_desc[M32R_IRQ_SIO0_S].action = 0; 117 irq_desc[M32R_IRQ_SIO0_S].action = 0;
118 irq_desc[M32R_IRQ_SIO0_S].depth = 1; 118 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
119 icu_data[M32R_IRQ_SIO0_S].icucr = 0; 119 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
120 disable_mappi2_irq(M32R_IRQ_SIO0_S); 120 disable_mappi2_irq(M32R_IRQ_SIO0_S);
121 /* SIO1_R : uart receive data */ 121 /* SIO1_R : uart receive data */
122 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; 122 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
123 irq_desc[M32R_IRQ_SIO1_R].handler = &mappi2_irq_type; 123 irq_desc[M32R_IRQ_SIO1_R].chip = &mappi2_irq_type;
124 irq_desc[M32R_IRQ_SIO1_R].action = 0; 124 irq_desc[M32R_IRQ_SIO1_R].action = 0;
125 irq_desc[M32R_IRQ_SIO1_R].depth = 1; 125 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
126 icu_data[M32R_IRQ_SIO1_R].icucr = 0; 126 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -128,7 +128,7 @@ void __init init_IRQ(void)
128 128
129 /* SIO1_S : uart send data */ 129 /* SIO1_S : uart send data */
130 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; 130 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
131 irq_desc[M32R_IRQ_SIO1_S].handler = &mappi2_irq_type; 131 irq_desc[M32R_IRQ_SIO1_S].chip = &mappi2_irq_type;
132 irq_desc[M32R_IRQ_SIO1_S].action = 0; 132 irq_desc[M32R_IRQ_SIO1_S].action = 0;
133 irq_desc[M32R_IRQ_SIO1_S].depth = 1; 133 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
134 icu_data[M32R_IRQ_SIO1_S].icucr = 0; 134 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -138,7 +138,7 @@ void __init init_IRQ(void)
138#if defined(CONFIG_USB) 138#if defined(CONFIG_USB)
139 /* INT1 : USB Host controller interrupt */ 139 /* INT1 : USB Host controller interrupt */
140 irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED; 140 irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
141 irq_desc[M32R_IRQ_INT1].handler = &mappi2_irq_type; 141 irq_desc[M32R_IRQ_INT1].chip = &mappi2_irq_type;
142 irq_desc[M32R_IRQ_INT1].action = 0; 142 irq_desc[M32R_IRQ_INT1].action = 0;
143 irq_desc[M32R_IRQ_INT1].depth = 1; 143 irq_desc[M32R_IRQ_INT1].depth = 1;
144 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01; 144 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
@@ -147,7 +147,7 @@ void __init init_IRQ(void)
147 147
148 /* ICUCR40: CFC IREQ */ 148 /* ICUCR40: CFC IREQ */
149 irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED; 149 irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
150 irq_desc[PLD_IRQ_CFIREQ].handler = &mappi2_irq_type; 150 irq_desc[PLD_IRQ_CFIREQ].chip = &mappi2_irq_type;
151 irq_desc[PLD_IRQ_CFIREQ].action = 0; 151 irq_desc[PLD_IRQ_CFIREQ].action = 0;
152 irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */ 152 irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
153 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01; 153 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
@@ -156,7 +156,7 @@ void __init init_IRQ(void)
156#if defined(CONFIG_M32R_CFC) 156#if defined(CONFIG_M32R_CFC)
157 /* ICUCR41: CFC Insert */ 157 /* ICUCR41: CFC Insert */
158 irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED; 158 irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
159 irq_desc[PLD_IRQ_CFC_INSERT].handler = &mappi2_irq_type; 159 irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi2_irq_type;
160 irq_desc[PLD_IRQ_CFC_INSERT].action = 0; 160 irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
161 irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */ 161 irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
162 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00; 162 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
@@ -164,7 +164,7 @@ void __init init_IRQ(void)
164 164
165 /* ICUCR42: CFC Eject */ 165 /* ICUCR42: CFC Eject */
166 irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED; 166 irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
167 irq_desc[PLD_IRQ_CFC_EJECT].handler = &mappi2_irq_type; 167 irq_desc[PLD_IRQ_CFC_EJECT].chip = &mappi2_irq_type;
168 irq_desc[PLD_IRQ_CFC_EJECT].action = 0; 168 irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
169 irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */ 169 irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */
170 icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; 170 icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;